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R600/SI: Fixing handling of condition codes
[oota-llvm.git] / lib / Target / R600 / R600Instructions.td
2013-11-22 Tom StellardR600/SI: Fixing handling of condition codes blob | commitdiff | raw
2013-11-13 Tom StellardR600/SI: Add support for private address space load... blob | commitdiff | raw | diff to current
2013-11-11 Vincent LejeuneR600: Use function inputs to represent data stored... blob | commitdiff | raw | diff to current
2013-10-13 Vincent LejeuneR600: Clear the VPM bit of export instructions. blob | commitdiff | raw | diff to current
2013-10-02 Vincent LejeuneR600: Add a ldptr intrinsic to support MSAA. blob | commitdiff | raw | diff to current
2013-10-01 Vincent LejeuneR600: add a pass that merges clauses. blob | commitdiff | raw | diff to current
2013-10-01 Vincent LejeuneR600: Enable -verify-machineinstrs in some tests. blob | commitdiff | raw | diff to current
2013-09-28 Tom StellardR600: Fix handling of NAN in comparison instructions blob | commitdiff | raw | diff to current
2013-09-28 Tom StellardSelectionDAG: Try to expand all condition codes using... blob | commitdiff | raw | diff to current
2013-09-06 Aaron WatryR600: Add support for LDS atomic subtract blob | commitdiff | raw | diff to current
2013-09-05 Tom StellardR600: Add support for local memory atomic add blob | commitdiff | raw | diff to current
2013-09-04 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only... blob | commitdiff | raw | diff to current
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory loads blob | commitdiff | raw | diff to current
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory stores blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600: Add support for i16 and i8 global stores blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600: Add support for v4i32 stores on Cayman blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600: Add IsExport bit to TableGen instruction definitions blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600: Change the RAT instruction assembly names so... blob | commitdiff | raw | diff to current
2013-08-14 Tom StellardR600/SI: Handle MSAA texture targets blob | commitdiff | raw | diff to current
2013-08-01 Tom StellardR600: Add 64-bit float load/store support blob | commitdiff | raw | diff to current
2013-07-31 Tom StellardRevert "R600: Use SchedModel enum for is{Trans,Vector... blob | commitdiff | raw | diff to current
2013-07-31 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only... blob | commitdiff | raw | diff to current
2013-07-31 Vincent LejeuneR600: Remove predicated_break inst blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS... blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Add support for 24-bit MAD instructions blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Add support for 24-bit MUL instructions blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Improve support for < 32-bit loads blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Use KCache for kernel arguments blob | commitdiff | raw | diff to current
2013-07-23 Tom StellardR600: Clean up extended load patterns blob | commitdiff | raw | diff to current
2013-07-19 Vincent LejeuneR600: Don't emit empty then clause and use alu_pop_after blob | commitdiff | raw | diff to current
2013-07-09 Vincent LejeuneR600: Do not predicated basic block with multiple alu... blob | commitdiff | raw | diff to current
2013-07-09 Vincent LejeuneR600: Use DAG lowering pass to handle fcos/fsin blob | commitdiff | raw | diff to current
2013-07-09 Vincent LejeuneR600: Print Export Swizzle blob | commitdiff | raw | diff to current
2013-06-29 Vincent LejeuneR600: Support schedule and packetization of trans-only... blob | commitdiff | raw | diff to current
2013-06-28 Tom StellardR600: Add local memory support via LDS blob | commitdiff | raw | diff to current
2013-06-28 Tom StellardR600: Add support for GROUP_BARRIER instruction blob | commitdiff | raw | diff to current
2013-06-28 Tom StellardR600: Add ALUInst bit to tablegen definitions v2 blob | commitdiff | raw | diff to current
2013-06-25 Tom StellardR600: Use new getNamedOperandIdx function generated... blob | commitdiff | raw | diff to current
2013-06-25 Tom StellardR600: Add support for i32 loads from the constant addre... blob | commitdiff | raw | diff to current
2013-06-24 Aaron WatryR600: Fix spelling error in comment blob | commitdiff | raw | diff to current
2013-06-17 Vincent LejeuneR600: Properly set COUNT_3 bit in TEX clause initiating... blob | commitdiff | raw | diff to current
2013-06-14 Tom StellardR600: Use correct encoding for Vertex Fetch instruction... blob | commitdiff | raw | diff to current
2013-06-14 Tom StellardR600: Use EXPORT_RAT_INST_STORE_DWORD for stores on... blob | commitdiff | raw | diff to current
2013-06-14 Tom StellardR600: Factor the instruction encoding out the RAT_WRITE... blob | commitdiff | raw | diff to current
2013-06-14 Tom StellardR600: Move instruction encoding definitions into a... blob | commitdiff | raw | diff to current
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice... blob | commitdiff | raw | diff to current
2013-06-03 Vincent LejeuneR600: Constraints input regs of interp_xy,_zw blob | commitdiff | raw | diff to current
2013-05-20 Tom StellardR600: Swap the legality of rotl and rotr blob | commitdiff | raw | diff to current
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4. blob | commitdiff | raw | diff to current
2013-05-17 Vincent LejeuneR600: Improve texture handling blob | commitdiff | raw | diff to current
2013-05-17 Vincent LejeuneR600: Rename 128 bit registers. blob | commitdiff | raw | diff to current
2013-05-17 Vincent LejeuneR600: prettier dump of clamp blob | commitdiff | raw | diff to current
2013-05-10 Tom StellardR600: Remove AMDILPeeopholeOptimizer and replace optimi... blob | commitdiff | raw | diff to current
2013-05-03 Tom StellardR600: BFI_INT is a vector-only instruction blob | commitdiff | raw | diff to current
2013-05-03 Tom StellardR600: Add pattern for SHA-256 Ma function blob | commitdiff | raw | diff to current
2013-05-02 Vincent LejeuneR600: Improve asmPrint of ALU clause blob | commitdiff | raw | diff to current
2013-05-02 Vincent LejeuneR600: Prettier asmPrint of Alu blob | commitdiff | raw | diff to current
2013-05-02 Tom StellardR600: Use new tablegen syntax for patterns blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: use native for alu blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Rework Scheduling to handle difference between... blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Add a Bank Swizzle operand blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Turn TEX/VTX into native instructions blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote... blob | commitdiff | raw | diff to current
2013-04-30 Vincent LejeuneR600: Clean up instruction class definitions blob | commitdiff | raw | diff to current
2013-04-29 Tom StellardR600: Fix encoding of CF_END_{EG, R600} instructions blob | commitdiff | raw | diff to current
2013-04-23 Vincent LejeuneR600: Use .AMDGPU.config section to emit stacksize blob | commitdiff | raw | diff to current
2013-04-23 Vincent LejeuneR600: Add CF_END blob | commitdiff | raw | diff to current
2013-04-19 Tom StellardR600: Add pattern for the BFI_INT instruction blob | commitdiff | raw | diff to current
2013-04-17 Vincent LejeuneR600: Make Export Instruction not duplicable blob | commitdiff | raw | diff to current
2013-04-17 Vincent LejeuneR600: Export is emitted as a CF_NATIVE inst blob | commitdiff | raw | diff to current
2013-04-10 Michel DanzerR600/SI: Add pattern for AMDGPUurecip blob | commitdiff | raw | diff to current
2013-04-08 Vincent LejeuneR600: Control Flow support for pre EG gen blob | commitdiff | raw | diff to current
2013-04-01 Vincent LejeuneR600: Add support for native control flow blob | commitdiff | raw | diff to current
2013-04-01 Vincent LejeuneR600: Emit CF_ALU and use true kcache register. blob | commitdiff | raw | diff to current
2013-03-31 Vincent LejeuneR600: Emit native instructions for tex blob | commitdiff | raw | diff to current
2013-03-22 Michel DanzerR600: Use legacy (0 * anything = 0) MUL instructions... blob | commitdiff | raw | diff to current
2013-03-18 Christian KonigR600/SI: add float vector types blob | commitdiff | raw | diff to current
2013-03-11 Vincent LejeuneR600: Fix JUMP handling so that MachineInstr verificati... blob | commitdiff | raw | diff to current
2013-03-08 Tom StellardR600: Improve custom lowering of select_cc blob | commitdiff | raw | diff to current
2013-03-05 Vincent LejeuneR600: Remove LowerConstCopyPass and lower CONST_COPY... blob | commitdiff | raw | diff to current
2013-03-05 Vincent LejeuneR600: CONST_ADDRESS node is not marked as mayLoad anymore blob | commitdiff | raw | diff to current
2013-03-05 Vincent LejeuneR600: Use MUL_IEEE for trig/fdiv intrinsic blob | commitdiff | raw | diff to current
2013-03-05 Vincent LejeuneR600: Add support for indirect addressing of non defaul... blob | commitdiff | raw | diff to current
2013-02-21 Tom StellardR600: Fix for Unigine when MachineSched is enabled blob | commitdiff | raw | diff to current
2013-02-18 Vincent LejeuneR600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for... blob | commitdiff | raw | diff to current
2013-02-18 Vincent LejeuneR600: Support for TBO blob | commitdiff | raw | diff to current
2013-02-14 Vincent LejeuneR600: Export instructions are no longer terminator blob | commitdiff | raw | diff to current
2013-02-14 Vincent LejeuneR600: Fold zero/one in export instructions blob | commitdiff | raw | diff to current
2013-02-13 Tom StellardR600: Add support for 128-bit parameters blob | commitdiff | raw | diff to current
2013-02-12 Michel DanzerR600: Fix regression with shadow array sampler on pre... blob | commitdiff | raw | diff to current
2013-02-10 Vincent LejeuneTest Commit - Remove some trailing whitespace in R600In... blob | commitdiff | raw | diff to current
2013-02-07 Tom StellardR600/SI: Use proper instructions for array/shadow samplers. blob | commitdiff | raw | diff to current
2013-02-07 Tom StellardR600: Consolidate sub register indices. blob | commitdiff | raw | diff to current
2013-02-07 Tom StellardR600: Add support for SET*_DX10 instructions blob | commitdiff | raw | diff to current
2013-02-07 Tom StellardR600: Fix assembly name for SETGT_INT blob | commitdiff | raw | diff to current
2013-02-06 Tom StellardR600: Support for indirect addressing v4 blob | commitdiff | raw | diff to current
2013-02-05 Jakob Stoklund OlesenDon't use MRI liveouts in R600. blob | commitdiff | raw | diff to current
2013-02-05 Tom StellardR600: improve inputs/interpolation handling blob | commitdiff | raw | diff to current
2013-01-31 Tom StellardR600: Make store_dummy intrinsic more general by passin... blob | commitdiff | raw | diff to current
2013-01-23 Tom StellardR600: Add a llvm.R600.store.swizzle intrinsics blob | commitdiff | raw | diff to current
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