ARM64: dts: rk3366-tb: add rk818 support

Change-Id: I8ddd45f6c2eba3ac3a9dd3d8fa962d27a52fda5f
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>

ARM64: configs: rockchip_defconfig enable simple card driver

Change-Id: I2f3daa98ec5cb5ef09710bd1c479c2e0d3c10b42
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: configs: rockchip_defconfig select RT5640

Change-Id: If269722b9383a6fc9b02fe3f85163b143736ed2a
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ASoC: RT5640: make rt5640 driver enable to be selected

Change-Id: I4600f79220ab4faf7bfde1cb75b7fbe7b5fef747
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

UPSTREAM: i2c: make i2c_parse_fw_timings() always visible

This function used to be DT only, so it lived inside a CONFIG_OF block.
Now it uses device attributes and must be moved outside of it. No
further code changes, only one whitespace improvement.

Reported-by: Jim Davis <jim.epost@gmail.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit 54177ccfbe95fcf250a89508a705bfe4706e3b86)

Change-Id: Ie7a73fef09266a97be4d1f50efc295428357c84c

UPSTREAM: i2c: add generic routine to parse DT for timing information

Inspired from the i2c-rk3x driver (thanks guys!) but refactored and
extended. See built-in docs for further information.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit e1dba01ca620bb0b3864d5237c1c597d9e012ebf)

Change-Id: I491e8e51529d2aad1bbeed706a617ccf39ef3205

UPSTREAM: i2c: document generic DT bindings for timing parameters

Also, sort the properties alphabetically and make indentation
consistent. Wording largely taken from i2c-rk3x.txt, thanks guys!

Only "i2c-scl-internal-delay-ns" is new, the rest is used by two drivers
already and was documented in their driver binding documentation.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
(cherry picked from commit 99b809d7bdd17de7a68f1625a8973052c8311657)

Change-Id: I7f60b372e5ec2425ef6976306a7e26a1437f0384

ARM64: dts: rk3366: add config for display

Change-Id: I2112b26b762c56da1c621332743e376255669646
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

dtsi: arm64: rockchip: add pinctrl DT node for rk3399

Change-Id: Ib729c2f6e07aed1e16703541cc0dcc548e6ced06
Signed-off-by: David Wu <david.wu@rock-chips.com>

thermal: rockchip: fix a impossible condition caused by the warning

As the Dan report the smatch check the thermal driver warning:
drivers/thermal/rockchip_thermal.c:551 rockchip_configure_from_dt()
warn: impossible condition '(thermal->tshut_temp > ((~0 >> 1))) =>
(s32min-s32max > s32max)'

Although The shut_temp read from DT is u32,the temperature is currently
represented as int not long in the thermal driver.
Let's change to make shut_temp instead of the thermal->tshut_temp for
the condition.

Fixes: commit 437df2172e8d
("thermal: rockchip: consistently use int for temperatures")

Change-Id: I7951bf83baec2ef0ae8fe50d5735f992a7d3ed41
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

thermal: rockchip: Support the RK3399 SoCs in thermal driver

The RK3399 SoCs have two Temperature Sensors, channel 0 is for CPU.
channel 1 is for GPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
 commit b0d70338bca22cb14367042a9d5cead116e7f2d9)
Change-Id: I12bccb3c4a56c56f16a019c3faad909bfae65b97
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

thermal: rockchip: Support the RK3228 SoCs in thermal driver

The RK3228 SoCs has one Temperature Sensor, channel 0 is for CPU.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
 commit 7b02a5e782fa151a610c455ac06e5a998e9cb3f3)
Change-Id: I45def60892a8f5cd6fd18ad064b4bf7c13260b59
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

clk: rockchip: remove CLK_IGNORE_UNUSED from rk3368 usb otg clocks

Change-Id: Iea6c2e8cd011bcaab30c6f6ce2ed7a9ab7a8711c
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

clk: rockchip: add HCLK_USB_PERI for rk3368 usb

Change-Id: Ib1fad4af45ac5ba42ddd97918385aee3bd58e18e
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: add eMMC/SDMMC/SDIO config for RK3366 SDK boards

Change-Id: Ic469221cfd2f9ff1c9e81c689654fc2a74ea161b
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>

ARM64: dtsi: Rockchip: add eMMC/SDMMC/SDIO node for RK3366

Change-Id: I0ab4980da43c914a2925a41a92807688458759d3
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>

clk: rockchip: add SCLK_CRYPTO for rk3368 crypto

Change-Id: I5ea4bca3e164df50e720ef748f8ece4511330d70
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

Revert "regulator: rk818: remove the repeated operations."

This reverts commit 5d24f688220debafd3de916e9e02c8d7c0472589.

Change-Id: I0a98e803958b3f56b8fd2a0099f402fab9a83ad4
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

ARM64: dts: rockchip: add ion node for rk3366 board

Change-Id: I35cc26100f8eff7408b4d5a55b7544f0b4744b8e
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: rk3366: add mipi dsi node

Change-Id: I3401a98eb5b0c527f25e2a937d59738b1388c025
Signed-off-by: Xubilv <xbl@rock-chips.com>

clk: rockchip: add ids for mipi on rk3366

Change-Id: Ie7c26e9fa1bc5459fcdeefc69a3175a0a50b8260
Signed-off-by: Xiao Feng <xf@rock-chips.com>

ARM64: dts: rk3366: add dmac node

Change-Id: I3037b48c91cbe05e2ba6090ce316844ecbe46420
Signed-off-by: Xiao Feng <xf@rock-chips.com>

thermal: rockchip: fix calculation error for code_to_temp

the calculation use a global table, not their own table.
so adapt the table to the correct one.

Change-Id: Id416e41910de297259a85a3ae06f4cc3c5788035
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: add ids for usbphy_480m and wifi on rk3366

Change-Id: Ie0d1c4cd7c9c7e660608e097780cd253ddd505fe
Signed-off-by: Xiao Feng <xf@rock-chips.com>

UPSTREAM: clk-divider: make sure read-only dividers do not write to their register

Commit e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1") removed
the special ops struct for read-only clocks and instead opted to handle
them inside the regular ops.

On the rk3368 this results in breakage as aclkm now gets set a value.
While it is the same divider value, the A53 core still doesn't like it,
which can result in the cpu ending up in a hang.
The reason being that "ACLKENMasserts one clock cycle before the rising
edge of ACLKM" and the clock should only be touched when STANDBYWFIL2
is asserted.

To fix this, reintroduce the read-only ops but do include the round_rate
callback. That way no writes that may be unsafe are done to the divider
register in any case.

The Rockchip use of the clk_divider_ops is adapted to this split again,
as is the nxp, lpc18xx-ccu driver that was included since the original
commit. On lpc18xx-ccu the divider seems to always be read-only
so only uses the new ops now.

Fixes: e6d5e7d90be9 ("clk-divider: Fix READ_ONLY when divider > 1")
Reported-by: Zhang Qing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from git.kernel.org clk/linux.git clk-next
 commit 50359819794b4a16ae35051cd80f2dab025f6019)

Change-Id: I382323c61f94e79ee7eaec6db16f6c2a9ad387eb

UPSTREAM: clk: rockchip: add new pll-type for rk3036 and similar socs

The rk3036's pll and clock are different with base on the rk3066(rk3188,
rk3288, rk3368 use it), there are different adjust foctors and control
registers, so these should be independent and separate from the series
of rk3066s.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 9c4d6e55377bc9232a33c7388accb5bd10771eba)

Change-Id: I3a4aa2eb470976d69fef6b4fc2a33d9b46989817

ARM64: dts: rk3368-tb: the regulator-names match the hardware.

Change-Id: I7e5de0c05942d622e9f26743bb8c7600f1155406
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

regulator: rk818: remove the repeated operations.

Populates regulator_init_data structure by extracting data from device
tree node, when regulator drivers register a regulator.  so we don't
repeat it.

Change-Id: I481e7c802a24916f15c5b3a5eaf66f32dc0272d7
Signed-off-by: Shengfei xu <xsf@rock-chips.com>

ARM64: dtsi: add nandc config for RK3366

Change-Id: Ib15f6ed6e7ebb80775c57b6c496db712fcc8ea80
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

dts: arm64: rockchip: add rk3366-tb dts file

Change-Id: I9b053677f411f7e0e447b663269689fdf7738ab8
Signed-off-by: David Wu <david.wu@rock-chips.com>

ARM64: dts: rockchip: add sd_card support for RK3368

Change-Id: Icb4c4c23db3a75c90b75cad5374411603c66984b
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>

dtsi: arm64: rockchip: add rk3366 dtsi file

Change-Id: I5a4d3b904f458e2a0df1a0055c97bf5b10b2905f
Signed-off-by: David Wu <david.wu@rock-chips.com>

dtsi: arm64: rk3399: add pmugrf syscon node

Change-Id: I9b07672091e11f3a45bc20af30da94dd92266869
Signed-off-by: David Wu <david.wu@rock-chips.com>

ARM64: dts: rockchip: add dts file for RK3366 fpga

Change-Id: I18f6ee0a5a422b05ebb6cf0ac88cfe1076649a91
Signed-off-by: Hecanyang <hcy@rock-chips.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>

video: rockchip: rename display sysfs node

Backward compatibility with develop-3.10 except for
3dmode, which rename to mode3d.

Change-Id: I9dea6d25adc18c5e1580078f574fa44690791a33
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>

clk: rockchip: rk3368 plls' supports 1188MHz

Since HDMI needs clock rate 74.25MHz, so plls must support
a multiple of it.

For Rockchip rk3368 pll has better jetter with 1188MHz, so
add 1188MHz support.

Change-Id: I68c7333ae076ecabf8637298ee8ca43149cb17d1
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: rockchip: add clock assign for rk3368 cru

Add "assigned-clocks" for rk3368 cru node, to intalize
clock rate for plls, bus and peripher.

Change-Id: Ic36401fef73b005d778b8ccc8527633af408985c
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

UPSTREAM: clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for i2s_2ch

I2S_2CH set freq need to select parent and calculate parent freq.
so just mark it as the CLK_SET_RATE_PARENT flag.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit e8099067de751106d82333e29ce5b6a76ba653f6)

Change-Id: I1e7b75eba06fbe27079c3887170ce801da005ce0

UPSTREAM: clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch

SPDIF_8CH set freq need to select parent and calculate parent freq.
so just mark it as the CLK_SET_RATE_PARENT flag.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit 0bbe62eb92755ff7c16c859e96a3877de56e32c9)

Change-Id: I3deed226430c492dc3b70337ae3e89d201aeb66d

UPSTREAM: clk: rockchip: rk3368: fix edp_24m parent

The edp_24m parent select bit define is:
1'b0:xin24m
1'b1:1'b0(dummy)
so adapt the parent sel bit to the currect one.

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit d566ebc3c06c17b108b5b844f9d08259e3b7ba84)

Change-Id: Ia0530f4e00c8ea15420b49587097f07ac1af5092

UPSTREAM: clk: rockchip: rk3368: fix hdmi_cec gate-register

Fix a typo making the sclk_hdmi_cec access a wrong register to handle
its gate.

Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: zhangqing <zhangqing@rock-chips.com>
Cc: stable@vger.kernel.org
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit fd0c0740fac17a014704ef89d8c8b1768711ca59)

Change-Id: I549ef7e3c29df9fe7d4280288639e401727a001e

UPSTREAM: clk: rockchip: rk3368: fix parents of video encoder/decoder

The vdpu and vepu clocks can also be parented to the npll and current
parent list also is wrong as it would use the npll as "usbphy" source,
so adapt the parent to the correct one.

Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: zhangqing <zhangqing@rock-chips.com>
Cc: stable@vger.kernel.org
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit 0f28d98463498c61c61a38aacbf9f69e92e85e9d)

Change-Id: Ie7e8f1e7d6de5e149705cc5f6d6207e839eca2bd

UPSTREAM: clk: rockchip: rk3368: fix cpuclk core dividers

Similar to commit 9880d4277f6a ("clk: rockchip: fix rk3288 cpuclk core
dividers") it seems the cpuclk dividers are one to high on the rk3368
as well.

And again similar to the previous fix, we opt to make the divider list
contain the values to be written to use the same paradigm for them on all
supported socs.

Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller")
Reported-by: Zhang Qing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: zhangqing <zhangqing@rock-chips.com>
Cc: stable@vger.kernel.org
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit c6d5fe2ca8286f35a79f7345c9378c39d48a1527)

Change-Id: If85678467e8dc4b4cfce07c3d31faf0c11479780

UPSTREAM: clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster

Both clusters have their mux bit in bit 7 of their respective register.
For whatever reason the big cluster currently lists bit 15 which is
definitly wrong.

Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller")
Reported-by: Zhang Qing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: zhangqing <zhangqing@rock-chips.com>
Cc: stable@vger.kernel.org
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.6-clk/next
 commit 535ebd428aeb07c3327947281306f2943f2c9faa)

Change-Id: I26364fdba8cdfe36c8b9ba767b4226c9ac6ff118

dt-bindings: rockchip-thermal: Support the RK3228/RK3399 SoCs compatible

This patchset attempts to new compatible for thermal founding
on RK3228/RK3399 SoCs.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
 commit 4be02530fc76b4b01372dc03ab098674bf059f0b)
Change-Id: I9fd1f52d7b4781230e5436e90ed6d9d2c95d06cb
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

thermal: rockchip: fix a trivial typo

This patchset trys to dictate unified format for driver.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
(cherry picked from git.kernel.org torvalds/linux.git master
 commit 13c1cfda1a6cb0325029ce8bbb8d6483244d5c92)
Change-Id: I9659ae150c9d24f2482fd8c285dcfeb65bf873b1
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

dt-bindings: add documentation of rk3366 clock controller

Add the devicetree binding for the cru on the rk3366 which quite
similar structured as previous clock controllers.

Change-Id: I109da26f88cd733b64d4c4339db63346dd9ffea6
Signed-off-by: Xiao Feng <xf@rock-chips.com>

clk: rockchip: add dt-binding header for rk3366

Add the dt-bindings header for the rk3366, that gets shared between
the clock controller and the clock references in the dts.

Change-Id: Ie4d8f9d02be2331b368d44f5d76a92fd9959b72a
Signed-off-by: Xiao Feng <xf@rock-chips.com>

ARM64: configs: rockchip_defconfig enable cpufreq

Change-Id: Ie49f1c205c3fadac8dec58efbf1746e703e67970
Signed-off-by: Xiao Feng <xf@rock-chips.com>

ARM64: configs: rockchip_defconfig add RK808 clkout

Change-Id: I106c419f92436fc41f95aa57a50bdfc2ba53b0f9
Signed-off-by: Xiao Feng <xf@rock-chips.com>

video: rockchip: update coding style

Change-Id: I7bd8d6875d126db2062e48cd81ec191d954da4bf
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: vop iommu state depend on dts and delete CONFIG_ROCKCHIP_IOMMU

Change-Id: I4de26882995313ed11c81b2162e29bc771e117de
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rk322x: fix crash on suspend/resume

Skip the update_reg_update when vop is suspend, because
register access would hang up the system when vop is suspend.

Change-Id: I01e712736df9a6de88440ee67c624a26ea752d85
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rockchip: vop: 322x: sync with develop-3.10

Change-Id: Iab27d3ac659df8f22198ec0c058cb864fec37c1d
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rk322x: rename vop rk3228 to rk322x

Change-Id: I6d8d9ff84f76d7fa5c820b682081bbe0cb851ff1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rockchip: lvds: rk31xx_lvds.c add support rk3366

Change-Id: Iecd6bacf28cb4620a1141c89ff16612ec4866230
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: lcdc: 3368: add support rk3366

Change-Id: I7e6137418b18c58c53f958089527635ac62eb887
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

staging: ion: cma heap support map/unmap iommu

Add apis for cma-heap to map/unmap iommu.

Change-Id: I993d54285691e7015ffa302a4bb776234ca45bcb
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

video: rk_fb: align 24bit data format

Vop hardware only support the 4 byte align stride, but
if logo's stride is not align with 4 byte, will get
error display.

Change-Id: I543bbbea98f14702ae0e5f058075c39b8fd6fd68
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rk_fb: fix ymirror for kernel logo

kernel logo not use ymirror now, so if uboot logo use ymirror,
we need close it when switch to kernel logo, otherwise, would get
iommu crash

Change-Id: I4a607f75ada4cf6454c7e0f4614b629ef747e851
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

dtsi: display: add fpga rgb screen timing dtsi

Change-Id: I803aa5a4a8b5bf221ab0a56d6d739464cc501de5
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: screen: init extend screen type

if the extend screen type is same to prmry screen type,
the GRF reg config for vop selete will be error;

Change-Id: I6671ae69da175352bd1935254603e434e85900ea
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

ASoC: rockchip: i2s: add rk3399 compatible string

Change-Id: Iaf539e003efc4cb9d219e866f6637368d5b2da81
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

ARM64: dts: rk3399: add i2s node

Change-Id: I02c7fd587c4233910b2a29c99bd8c7fc809779bf
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

doc: dt: add dt-bindings for rockchip ion driver

Change-Id: Ia2ec4985ead6ee986dce9bdb6ac910373ec1cd18
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: rockchip: rk3368 support cma-heap

Support cma-heap, also remove unused id definations.

Change-Id: I81608291b076ed55a1c439abfa9281ba30dff1b6
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

staging: ion: rockchip: support cma-heap

With this patch, ion could alloc by cma heap.

Change-Id: I23b4ebf3b6f8de573c9833574f926f38db1c67bc
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

nand: add ftl driver and nand drivers for rk3366

Change-Id: I2ea7fe6218b32666b91fce54bc17f976feb7f4d2
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

GPU: Rogue_M: update to 1.31_2 version & support gpu pd.

1. Add GPU pd support.
2. Disable RD power island.

Change-Id: Ib2ee45c647d0bed5aaa5c4f0c591c0f527f3d11e
Signed-off-by: zxl <zhuangxl@rock-chips.com>

GPU: Rogue_M: support gpu dvfs & adjust code.

1. Add GPU dvfs support.
2. Adjust the code indentation.
3. Use late_initcall instead of module_init to load gpu driver.

Change-Id: I9bac24b567b43ae6a395d9bac1b1d7e2729c48b4
Signed-off-by: zxl <zhuangxl@rock-chips.com>

ARM64: dts: add dts for Rockchip RK3399 FPGA board

With the RK3399 FPGA dts file, the FPGA board is able to boot with
very simple boot system.

Change-Id: I3484faf02cf9e6adab4379752abcc6cb8c9ed5b2
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: rockchip: fix copy-paste error in rk3399 dtsi file

Change-Id: I4eb21f4ee8e8d4bfc3dd37649e7c57c06489db1d
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

clk: rockchip: add dt-binding header for rk3399

Add the dt-bindings header for the rk3399, that gets shared between
the clock controller and the clock references in the dts.

Change-Id: I01830a46b679f4630506e8cb48b1a39e113a9952
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

clk: rockchip: allow more than 2 parents for cpuclk

RK3228's armclk has 3 parents, so allow cpuclk to have
more than 2 parents.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from linux-next.git
commit ea03835fb8ea4abbad2a2154187401f55c0b932d)

Change-Id: Iddb60e4f7bda91b98b4a3e42f196eee510173dce
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

ARM64: dts: rk3399: add dmac node

Change-Id: Ib59775c317f936c54d521d714293a3ab9a546937
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>

serial: core: remove baud_rates when serial console setup

Currently, when tring to set up a serial console with a higher
baud rate, it would fallback to 921600.

Tested-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Change-Id: Id93f2b559478f38c735213d523d3f72f6745f6a0

video: rk_fb: add BGR888 support

Direct load 24bit bmp data to display, but its data format
is BGR888, so add BGR888 support for uboot logo.

Change-Id: Id93f2b559478f38c735213d523d3f72f6745f6a8
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rk_fb: spilt mirror into x/y mirror

Uboot logo need ymirror function, but now only have mirror_en to
enable both xmirror and ymirror.

Change-Id: Ic676c4451817db2127327a1a56addeccb2436f21
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rk_fb: align uboot logo address

Uboot logo address start point may be not align PAGE_SIZE, it would
align to wrong point by pages vmap, and cause uboot logo error display.

So before pages vmap, align the uboot logo address.

Change-Id: I93f030e1b7ee13a4dc19d1421f520478868318ef
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reported-by: Wen Dingxian <shawn.wen@rock-chips.com>

video: rockchip_fb: synchronous win state

We enable win0 for uboot display, but win last_state is 0,
when we update win config from config_done ioctl, the state judge
is wrong.

Change-Id: I9955bed1683586254a908cb9395d27585e234b10
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rockchip_fb: support ymirror for uboot logo

Now only find rk322x and rk3368 support do ymirror in windows.

Change-Id: Iba49d64bb51db8fb35e6b21cab8aeba23dbd52b6
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

video: rk_fb: widen out var config limit

All layers allow out of right side and bottom side.
And hardware cursor want to support outside of right and bottom.

Change-Id: I27d64b2e12326fbad436f291a9fb5092538428f9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rockchip: add core dtsi file for RK3399

Change-Id: Ie3b824e8ead967d4cb119d73222b7a198478c29c
Signed-off-by: Jianqun xu <jay.xu@rock-chips.com>

ARM64: dts: add nandc node for rk3368

Change-Id: I1c5fab31139e686297dd0da94d7274592fc22782
Signed-off-by: Zhaoyifeng <zyf@rock-chips.com>

ARM64: configs: rockchip_defconfig select RGA2

Change-Id: Id93ffb52d58aaaedaacdd47f0f2d4765e2429a30
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: rockchip: add node for rga2

Change-Id: Icd6fd0917671a1f39e1c75d09387fdb30a8b3292
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

video: rockchip: rga2 driver do codingstyle

Change-Id: I7cc3fbdd37da8e3b3b79779db62b6ac1e9ba61f5
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

ARM64: dts: rockchip: rk3368: add cpu dvfs support for sheep board

Change-Id: Id0361d55f970ea814c6965b2772f7cdc3a004bfc
Signed-off-by: Xiao Feng <xf@rock-chips.com>

cpufreq: rockchip: add driver

This driver will directly use cpufreq-dt driver as backend.

Change-Id: Iec5a4ff05a4829fdbc3535f94e92759d4238623d
Signed-off-by: Xiao Feng <xf@rock-chips.com>

ARM64: config: rockchip_defconfig add rk818-regulator driver.

Change-Id: I7a71bf6583570433f788502e4bdf9b56951c63d5
Signed-off-by: Shenfei xu <xsf@rock-chips.com>

mfd: dt-bindings: Add RK818 device tree bindings document

Add device tree bindings documentation and a header file
for rockchip's RK818 pmic

Change-Id: Ic021c3555e980fa7f083b0720ab43ba757d032e4
Signed-off-by: Shenfei xu <xsf@rock-chips.com>

ARM64: dts: add rk818 node for rk3368.

Change-Id: I7754f5db74db77929a20d3cd636066f0bd12baed
Signed-off-by: Shenfei xu <xsf@rock-chips.com>

mfd: RK818: add new mfd driver for 818.

Change-Id: Iae0797ad17701a81ca91bc2396bfc2ec16241231
Signed-off-by: Shenfei xu <xsf@rock-chips.com>

ARM64: dts: rk3368-tb: modify syr82x nodes

modify syr82x nodes for use the shared driver fan53555

Change-Id: I42269ab63838244da2cde45e916ef953227e95c0
Signed-off-by: zhangqing <zhangqing@rock-chips.com>

ARM64: rockchip: syr82x: support syr82x regulator

Add suspend/resume enable/disable setting function.
Silergy SYR82x regulators share the exact same functionality and register
layout as the Fairchild FAN53555 regulators.
The fan53555 is upstreamed.
Therefore use fan53555.c for support syr82x.

Change-Id: If1d72a34d26c705796bc4d33de7187116edf4aa8
Signed-off-by: zhangqing <zhangqing@rock-chips.com>

dt-bindings: add documentation of rk3399 clock controller

Add the devicetree binding for the cru on the rk3399 which quite
similar structured as previous clock controllers.

Change-Id: I726011854d84312c5b831612246ad0decf317d68
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

dt-bindings: ARM: add arm,cortex-a72 compatible string

Change-Id: Ibbe90aa7a5c9d5b1307d72a81d2b70cfd22e5f74
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Rob Herring <robh@kernel.org>
(cherry picked from commit 182f4f098efcd112bed074ec84854b8e1a016974)

rk: gcc-wrapper.py ignore af_unix.c:1036

Change-Id: Ib850612060af29f271ec35c1b80a4a1a070c2670
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

Merge tag 'v4.4'

Linux 4.4

Linux 4.4