ARM64: dts: rk3366: add dmac node
authorXiao Feng <xf@rock-chips.com>
Sat, 30 Jan 2016 09:29:44 +0000 (17:29 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Mon, 1 Feb 2016 01:55:43 +0000 (09:55 +0800)
Change-Id: I3037b48c91cbe05e2ba6090ce316844ecbe46420
Signed-off-by: Xiao Feng <xf@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3366.dtsi

index 0bc6e9d43c91c3d6b506232c9d2af53f44d90ad0..5cbbec20d0ea082a62b477e4f55556f261fb3392 100644 (file)
                reg = <0x0 0xff738000 0x0 0x1000>;
        };
 
+       amba {
+               compatible = "arm,amba-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               dmac_peri: dma-controller@ff250000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x0 0xff250000 0x0 0x4000>;
+                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&cru ACLK_DMAC_PERI>;
+                       clock-names = "apb_pclk";
+               };
+
+               dmac_bus: dma-controller@ff600000 {
+                       compatible = "arm,pl330", "arm,primecell";
+                       reg = <0x0 0xff600000 0x0 0x4000>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&cru ACLK_DMAC_BUS>;
+                       clock-names = "apb_pclk";
+               };
+       };
+
        cru: clock-controller@ff760000 {
                compatible = "rockchip,rk3366-cru";
                reg = <0x0 0xff760000 0x0 0x1000>;