video: rockchip: lvds: rk31xx_lvds.c add support rk3366
authorHuang Jiachai <hjc@rock-chips.com>
Mon, 25 Jan 2016 02:38:01 +0000 (10:38 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Mon, 25 Jan 2016 12:31:13 +0000 (20:31 +0800)
Change-Id: Iecd6bacf28cb4620a1141c89ff16612ec4866230
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
drivers/video/rockchip/transmitter/rk31xx_lvds.c
drivers/video/rockchip/transmitter/rk31xx_lvds.h

index c81fb7cf28e0d6b113afef6c970117b9db54ce89..49522748788654445ee4fb0269a7afcbe5571c19 100644 (file)
@@ -160,7 +160,7 @@ static int rk31xx_lvds_disable(void)
                 return 0;
        if (lvds->data->soc_type == LVDS_SOC_RK3368) {
                val = v_RK3368_LVDSMODE_EN(0) | v_RK3368_MIPIPHY_TTL_EN(0);
-               lvds_grf_writel(lvds, GRF_SOC_CON7_LVDS, val);
+               lvds_grf_writel(lvds, RK3368_GRF_SOC_CON7_LVDS, val);
        } else {
                grf_writel(v_LVDSMODE_EN(0) | v_MIPIPHY_TTL_EN(0), RK312X_GRF_LVDS_CON0);
        }
@@ -194,7 +194,8 @@ static void rk31xx_output_lvds(struct rk_lvds_device *lvds,
         /* if LVDS transmitter source from VOP, vop_dclk need get invert
          * set iomux in dts pinctrl
          */
-       if (lvds->data->soc_type == LVDS_SOC_RK3368) {
+       if ((lvds->data->soc_type == LVDS_SOC_RK3368) ||
+           (lvds->data->soc_type == LVDS_SOC_RK3366)) {
                /* enable lvds mode */
                val |= v_RK3368_LVDSMODE_EN(1) | v_RK3368_MIPIPHY_TTL_EN(0);
                /* config data source */
@@ -207,7 +208,10 @@ static void rk31xx_output_lvds(struct rk_lvds_device *lvds,
                       v_RK3368_MIPIDPI_FORCEX_EN(1);
                /*rk3368  RK3368_GRF_SOC_CON7 = 0X0041C*/
                /*grf_writel(val, 0x0041C);*/
-               lvds_grf_writel(lvds, GRF_SOC_CON7_LVDS, val);
+               if (lvds->data->soc_type == LVDS_SOC_RK3368)
+                       lvds_grf_writel(lvds, RK3368_GRF_SOC_CON7_LVDS, val);
+               else
+                       lvds_grf_writel(lvds, RK3366_GRF_SOC_CON5_LVDS, val);
        } else {
                /* enable lvds mode */
                val |= v_LVDSMODE_EN(1) | v_MIPIPHY_TTL_EN(0);
@@ -261,7 +265,8 @@ static void rk31xx_output_lvttl(struct rk_lvds_device *lvds,
 {
         u32 val = 0;
 
-       if (lvds->data->soc_type == LVDS_SOC_RK3368) {
+       if ((lvds->data->soc_type == LVDS_SOC_RK3368) ||
+           (lvds->data->soc_type == LVDS_SOC_RK3366)) {
                /* iomux to lcdc */
 #ifdef CONFIG_PINCTRL
                if (lvds->pins && !IS_ERR(lvds->pins->default_state))
@@ -273,9 +278,15 @@ static void rk31xx_output_lvttl(struct rk_lvds_device *lvds,
                val |= v_RK3368_LVDSMODE_EN(0) | v_RK3368_MIPIPHY_TTL_EN(1) |
                        v_RK3368_MIPIPHY_LANE0_EN(1) |
                        v_RK3368_MIPIDPI_FORCEX_EN(1);
-               lvds_grf_writel(lvds, GRF_SOC_CON7_LVDS, val);
-               val = v_RK3368_FORCE_JETAG(0);
-               lvds_grf_writel(lvds, GRF_SOC_CON15_LVDS, val);
+               if (lvds->data->soc_type == LVDS_SOC_RK3368) {
+                       lvds_grf_writel(lvds, RK3368_GRF_SOC_CON7_LVDS, val);
+                       val = v_RK3368_FORCE_JETAG(0);
+                       lvds_grf_writel(lvds, RK3368_GRF_SOC_CON15_LVDS, val);
+               } else {
+                       lvds_grf_writel(lvds, RK3366_GRF_SOC_CON5_LVDS, val);
+                       val = v_RK3368_FORCE_JETAG(0);
+                       lvds_grf_writel(lvds, RK3366_GRF_SOC_CON6_LVDS, val);
+               }
                /*val = v_MIPITTL_CLK_EN(1) | v_MIPITTL_LANE0_EN(1) |
                v_MIPITTL_LANE1_EN(1) | v_MIPITTL_LANE2_EN(1) |
                v_MIPITTL_LANE3_EN(1);
@@ -365,12 +376,17 @@ static struct rk_lvds_drvdata rk3368_lvds_drvdata = {
        .soc_type =  LVDS_SOC_RK3368,
 };
 
+static struct rk_lvds_drvdata rk3366_lvds_drvdata = {
+       .soc_type =  LVDS_SOC_RK3366,
+};
 
 static const struct of_device_id rk31xx_lvds_dt_ids[] = {
        {.compatible = "rockchip,rk31xx-lvds",
         .data = (void *)&rk31xx_lvds_drvdata,},
        {.compatible = "rockchip,rk3368-lvds",
         .data = (void *)&rk3368_lvds_drvdata,},
+       {.compatible = "rockchip,rk3366-lvds",
+        .data = (void *)&rk3366_lvds_drvdata,},
        {}
 };
 
@@ -457,7 +473,8 @@ static int rk31xx_lvds_probe(struct platform_device *pdev)
                return PTR_ERR(lvds->ctrl_reg);
        }
 #ifdef CONFIG_MFD_SYSCON
-       if (lvds->data->soc_type == LVDS_SOC_RK3368) {
+       if ((lvds->data->soc_type == LVDS_SOC_RK3368) ||
+           (lvds->data->soc_type == LVDS_SOC_RK3366)) {
                lvds->grf_lvds_base =
                        syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
                if (IS_ERR(lvds->grf_lvds_base)) {
index 57e6dbee82725e6a8612d3ddfabcd7587e882003..53adcc237cb3e84ab5e8c17eb55293175b4dc3d4 100755 (executable)
@@ -18,7 +18,8 @@
 #define v_MIPIPHY_LANE0_EN(x)   (BITS_MASK(x, 1, 8) | BITS_EN(1, 8))
 #define v_MIPIDPI_FORCEX_EN(x)  (BITS_MASK(x, 1, 9) | BITS_EN(1, 9))
 
-/* RK3368_GRF_SOC_CON7 */
+/* RK3368_GRF_SOC_CON7 0x41c*/
+/* RK3366_GRF_SOC_CON5 0x414*/
 #define v_RK3368_LVDS_OUTPUT_FORMAT(x) (BITS_MASK(x, 3, 13) | BITS_EN(3, 13))
 #define v_RK3368_LVDS_MSBSEL(x)        (BITS_MASK(x, 1, 11) | BITS_EN(1, 11))
 #define v_RK3368_LVDSMODE_EN(x)        (BITS_MASK(x, 1, 12) | BITS_EN(1, 12))
@@ -113,12 +114,16 @@ enum {
 #define v_LANE1_EN(x)           BITS_MASK(x, 1, 6)
 #define v_LANE0_EN(x)           BITS_MASK(x, 1, 7)
 
-#define GRF_SOC_CON7_LVDS      0x041c
-#define GRF_SOC_CON15_LVDS      0x043c
+#define RK3368_GRF_SOC_CON7_LVDS       0x041c
+#define RK3368_GRF_SOC_CON15_LVDS      0x043c
+#define RK3366_GRF_SOC_CON5_LVDS       0x0414
+#define RK3366_GRF_SOC_CON6_LVDS       0x0418
 #define v_RK3368_FORCE_JETAG(x) (BITS_MASK(x, 1, 13) | BITS_EN(1, 13))
+
 enum {
        LVDS_SOC_RK312X,
-       LVDS_SOC_RK3368
+       LVDS_SOC_RK3368,
+       LVDS_SOC_RK3366
 };
 
 struct rk_lvds_drvdata  {