oota-llvm.git
10 years agoMake the LoopRotate pass's maximum header size configurable both programmatically
Owen Anderson [Mon, 26 May 2014 08:58:51 +0000 (08:58 +0000)]
Make the LoopRotate pass's maximum header size configurable both programmatically
and via the command line, mirroring similar functionality in LoopUnroll.  In
situations where clients used custom unrolling thresholds, their intent could
previously be foiled by LoopRotate having a hardcoded threshold.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209617 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Test linkonce-odr functions under LTO.
David Blaikie [Mon, 26 May 2014 06:44:52 +0000 (06:44 +0000)]
DebugInfo: Test linkonce-odr functions under LTO.

This was previously regressed/broken by r192749 (reverted due to this
issue in r192938) and I was about to break it again by accident with
some more invasive changes that deal with the subprogram lists. So to
avoid that and further issues - here's a test.

It's a pretty basic test - in both r192749 and my impending case, this
test would crash, but checking the basics (that we put a subprogram in
just one of the two CUs) seems like a good start.

We still get this wrong in weird ways if the linkonce-odr function
happens to not be identical in the metadata (because it's defined in two
different files (hence the # line directives in this test), etc) even
though it meets the language requirements (identical token stream) for
such a thing. That results in two subprogram DIEs, but only one of them
gets the parameter and high/low pc information, etc. We probably need to
use the DIRef infrastructure to deduplicate functions as we do types to
address this issue - or perhaps teach the BC linker to remove the
duplicate entries in subprogram lists?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209614 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDwarfUnit: Remove some misleading no-op code introduced in r204162.
David Blaikie [Mon, 26 May 2014 05:32:21 +0000 (05:32 +0000)]
DwarfUnit: Remove some misleading no-op code introduced in r204162.

Post commit review feedback from Manman called this out, but it looks
like it slipped through the cracks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209611 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoJust check the entire string.
Rafael Espindola [Mon, 26 May 2014 04:08:51 +0000 (04:08 +0000)]
Just check the entire string.

Thanks to David Blaikie for the suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209610 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReformat linefeeds.
NAKAMURA Takumi [Mon, 26 May 2014 00:25:26 +0000 (00:25 +0000)]
Reformat linefeeds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209609 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTrailing whitespace.
NAKAMURA Takumi [Mon, 26 May 2014 00:25:09 +0000 (00:25 +0000)]
Trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209608 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: avoid use of std::function
Saleem Abdulrasool [Sun, 25 May 2014 21:37:59 +0000 (21:37 +0000)]
tools: avoid use of std::function

Remove the use of the std::function and replace the capturing lambda with a
non-capturing one, opting to pass the user data down to the context.  This is
needed as std::function is not yet available on all hosted platforms (it
requires RTTI, which breaks on Windows).

Thanks to Nico Rieck for pointing this out!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209607 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: split out Win64EHDumper from COFFDumper
Saleem Abdulrasool [Sun, 25 May 2014 20:26:45 +0000 (20:26 +0000)]
tools: split out Win64EHDumper from COFFDumper

Move the implementation of the Win64 EH printer from the COFFDumper into its own
class.  This is in preparation for adding support to print ARM EH information.
The only real change here is in printUnwindInfo where we now lambda lift the
implicit this parameter for the resolveFunction.  Also setup the printing to
handle ARM.  This now has set the stage to introduce ARM EH printing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209606 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: inline simple single-use function
Saleem Abdulrasool [Sun, 25 May 2014 20:26:40 +0000 (20:26 +0000)]
tools: inline simple single-use function

This inlines the single use function in preparation for splitting the Win64EH
printing out of the COFFDumper into its own entity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209605 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: refactor COFFDumper symbol resolution logic
Saleem Abdulrasool [Sun, 25 May 2014 20:26:37 +0000 (20:26 +0000)]
tools: refactor COFFDumper symbol resolution logic

Make the use of the cache more transparent to the users.  There is no reason
that the cached entries really need to be passed along.  The overhead for doing
so is minimal: a single extra parameter.  This requires that some standalone
functions be brought into the COFFDumper class so that they may access the
cache.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209604 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: use references rather than out pointers in COFFDumper
Saleem Abdulrasool [Sun, 25 May 2014 20:26:33 +0000 (20:26 +0000)]
tools: use references rather than out pointers in COFFDumper

Switch to use references for parameters that are guaranteed to be non-null.
Simplifies the code a slight bit in preparation for another change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209603 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Fix inlining with #file directives a little harder
David Blaikie [Sun, 25 May 2014 18:11:35 +0000 (18:11 +0000)]
DebugInfo: Fix inlining with #file directives a little harder

Seems my previous fix was insufficient - we were still not adding the
inlined function to the abstract scope list. Which meant it wasn't
flagged as inline, didn't have nested lexical scopes in the abstract
definition, and didn't have abstract variables - so the inlined variable
didn't reference an abstract variable, instead being described
completely inline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209602 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoStreamline test case by avoiding a temporary file and piping llc output straight...
David Blaikie [Sun, 25 May 2014 15:38:52 +0000 (15:38 +0000)]
Streamline test case by avoiding a temporary file and piping llc output straight to llvm-dwarfdump

We still do temporary files in many cases, just updating this particular
one because I was debugging it and made this change while doing so.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209601 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoEmit data or code export directives based on the type.
Rafael Espindola [Sun, 25 May 2014 12:49:07 +0000 (12:49 +0000)]
Emit data or code export directives based on the type.

Currently we look at the Aliasee to decide what type of export
directive to use. It seems better to use the type of the alias
directly. This is similar to how we handle the alias having the
same address but other attributes (linkage, visibility) from the
aliasee.

With this patch it is now possible to do things like

target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
@foo = global [6 x i8] c"\B8*\00\00\00\C3", section ".text", align 16
@f = dllexport alias i32 (), [6 x i8]* @foo
!llvm.module.flags = !{!0}
!0 = metadata !{i32 6, metadata !"Linker Options", metadata !1}
!1 = metadata !{metadata !2, metadata !3}
!2 = metadata !{metadata !"/DEFAULTLIB:libcmt.lib"}
!3 = metadata !{metadata !"/DEFAULTLIB:oldnames.lib"}

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209600 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake these CHECKs a bit more strict.
Rafael Espindola [Sun, 25 May 2014 12:43:13 +0000 (12:43 +0000)]
Make these CHECKs a bit more strict.

The " at the end of the line makes sure we matched the entire directive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209599 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd an extension point for peephole optimizers.
Peter Collingbourne [Sun, 25 May 2014 10:27:02 +0000 (10:27 +0000)]
Add an extension point for peephole optimizers.

This extension point allows adding passes that perform peephole optimizations
similar to the instruction combiner. These passes will be inserted after
each instance of the instruction combiner pass.

Differential Revision: http://reviews.llvm.org/D3905

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209595 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix some misplaced spaces around 'override'
Hans Wennborg [Sat, 24 May 2014 20:19:40 +0000 (20:19 +0000)]
Fix some misplaced spaces around 'override'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209589 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agobuild: sort llvm-readobj sources
Saleem Abdulrasool [Sat, 24 May 2014 20:04:21 +0000 (20:04 +0000)]
build: sort llvm-readobj sources

Sort the source files.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209587 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-readobj: remove some dead code
Saleem Abdulrasool [Sat, 24 May 2014 19:54:28 +0000 (19:54 +0000)]
llvm-readobj: remove some dead code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209586 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAArch64: disable FastISel for large code model.
Tim Northover [Sat, 24 May 2014 19:45:41 +0000 (19:45 +0000)]
AArch64: disable FastISel for large code model.

The code emitted is what would be expected for the small model, so it
shouldn't be used when objects can be the full 64-bits away.

This fixes MCJIT tests on Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209585 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMachineVerifier: Clean up some syntactic weirdness left behind by find&replace.
Benjamin Kramer [Sat, 24 May 2014 13:31:10 +0000 (13:31 +0000)]
MachineVerifier: Clean up some syntactic weirdness left behind by find&replace.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209581 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCodeGen: Make MachineBasicBlock::back skip to the beginning of the last bundle.
Benjamin Kramer [Sat, 24 May 2014 13:13:17 +0000 (13:13 +0000)]
CodeGen: Make MachineBasicBlock::back skip to the beginning of the last bundle.

This makes front/back symmetric with begin/end, avoiding some confusion.
Added instr_front/instr_back for the old behavior, corresponding to
instr_begin/instr_end. Audited all three in-tree users of back(), all
of them look like they don't want to look inside bundles.

Fixes an assertion (PR19815) when generating debug info on mips, where a
delay slot was bundled at the end of a branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209580 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAArch64/ARM64: move ARM64 into AArch64's place
Tim Northover [Sat, 24 May 2014 12:50:23 +0000 (12:50 +0000)]
AArch64/ARM64: move ARM64 into AArch64's place

This commit starts with a "git mv ARM64 AArch64" and continues out
from there, renaming the C++ classes, intrinsics, and other
target-local objects for consistency.

"ARM64" test directories are also moved, and tests that began their
life in ARM64 use an arm64 triple, those from AArch64 use an aarch64
triple. Both should be equivalent though.

This finishes the AArch64 merge, and everyone should feel free to
continue committing as normal now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
Tim Northover [Sat, 24 May 2014 12:42:26 +0000 (12:42 +0000)]
AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.

I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.

The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.

Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209576 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm/test/Object/ar-error.test: Don't check the message "No such file or directory".
NAKAMURA Takumi [Sat, 24 May 2014 08:47:11 +0000 (08:47 +0000)]
llvm/test/Object/ar-error.test: Don't check the message "No such file or directory".

It didn't match on non-English version of Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209570 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoImplement sext(C1 + C2*X) --> sext(C1) + sext(C2*X) and
Michael Zolotukhin [Sat, 24 May 2014 08:09:57 +0000 (08:09 +0000)]
Implement sext(C1 + C2*X) --> sext(C1) + sext(C2*X) and
sext{C1,+,C2} --> sext(C1) + sext{0,+,C2} transformation in Scalar
Evolution.

That helps SLP-vectorizer to recognize consecutive loads/stores.

<rdar://problem/14860614>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209568 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM64: extract a 32-bit subreg when selecting an inreg extend
Tim Northover [Sat, 24 May 2014 07:05:42 +0000 (07:05 +0000)]
ARM64: extract a 32-bit subreg when selecting an inreg extend

After the load/store refactoring, we were sometimes trying to feed a
GPR64 into a 32-bit register offset operand. This failed in
copyPhysReg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209566 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Generalize some tests to handle variations in attribute ordering.
David Blaikie [Fri, 23 May 2014 21:11:46 +0000 (21:11 +0000)]
DebugInfo: Generalize some tests to handle variations in attribute ordering.

In an effort to fix inlined debug info in situations where the out of
line definition of a function preceeds any inlined usage, the order in
which some attributes are added to subprogram DIEs may change. (in
essence, definition-necessary attributes like DW_AT_low_pc/high_pc will
be added immediately, but the names, types, and other features will be
delayed to module end where they may either be added to the subprogram
DIE or instead reference an abstract definition for those values)

These tests can be generalized to be resilient to this change. 5 or so
tests actually have to be incompatibly changed to cope with this
reordering and will go along with the change that affects the order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209554 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Generalize a test case to not depend on abbreviation numbering.
David Blaikie [Fri, 23 May 2014 21:07:01 +0000 (21:07 +0000)]
DebugInfo: Generalize a test case to not depend on abbreviation numbering.

It's an unnecessary detail for this test and just gets in the way when
making unrelated changes to the output in this test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209553 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTest case comments. Fix sloppiness.
Andrew Trick [Fri, 23 May 2014 20:46:21 +0000 (20:46 +0000)]
Test case comments. Fix sloppiness.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209551 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoclang-format function.
Rafael Espindola [Fri, 23 May 2014 20:39:23 +0000 (20:39 +0000)]
clang-format function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209550 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove a confusing use of a static method.
Rafael Espindola [Fri, 23 May 2014 20:35:47 +0000 (20:35 +0000)]
Remove a confusing use of a static method.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209548 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Put concrete definitions referencing abstract definitions in the same...
David Blaikie [Fri, 23 May 2014 20:25:15 +0000 (20:25 +0000)]
DebugInfo: Put concrete definitions referencing abstract definitions in the same scope as the abstract definition.

This seems like a simple cleanup/improved consistency, but also helps
lay the foundation to fix the bug mentioned in the test case: concrete
definitions preceeding any inlined usage aren't properly split into
concrete + abstract (because they're not known to need it until it's too
late).

Once we start deferring this choice until later, we won't have the
choice to put concrete definitions for inlined subroutines in a
different scope from concrete definitions for non-inlined subroutines
(since we won't know at time-of-construction which one it'll be). This
change brings those two cases into alignment ahead of that future
chaneg/fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209547 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix and improve SCEV ComputeBackedgeTankCount.
Andrew Trick [Fri, 23 May 2014 19:47:13 +0000 (19:47 +0000)]
Fix and improve SCEV ComputeBackedgeTankCount.

This is a follow-up to r209358: PR19799: Indvars miscompile due to an
incorrect max backedge taken count from SCEV.

That fix was incomplete as pointed out by Arnold and Michael Z. The
code was also too confusing. It needed a careful rewrite with more
unit tests. This version will also happen to optimize more cases.

<rdar://17005101> PR19799: Indvars miscompile...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209545 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert part of "Fix broken FileCheck prefixes"
Nico Rieck [Fri, 23 May 2014 19:33:49 +0000 (19:33 +0000)]
Revert part of "Fix broken FileCheck prefixes"

This reverts part of commit r209538.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209544 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUse alias linkage and visibility to decide tls access mode.
Rafael Espindola [Fri, 23 May 2014 19:16:56 +0000 (19:16 +0000)]
Use alias linkage and visibility to decide tls access mode.

This matches both what we do for the non-thread case and what gcc does.

With this patch clang would match gcc's behaviour in

static __thread int a = 42;
extern __thread int b __attribute__((alias("a")));
int *f(void) { return &a; }
int *g(void) { return &b; }

if not for pr19843. Manually writing the IL does produce the same access modes.

It is also a step in the direction of fixing pr19844.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209543 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove unused CHECK lines
Nico Rieck [Fri, 23 May 2014 19:06:44 +0000 (19:06 +0000)]
Remove unused CHECK lines

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209539 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix broken FileCheck prefixes
Nico Rieck [Fri, 23 May 2014 19:06:24 +0000 (19:06 +0000)]
Fix broken FileCheck prefixes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209538 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd the extracted constant offset using GEP
Jingyue Wu [Fri, 23 May 2014 18:39:40 +0000 (18:39 +0000)]
Add the extracted constant offset using GEP

Fixed a TODO in r207783.

Add the extracted constant offset using GEP instead of ugly
ptrtoint+add+inttoptr. Using GEP simplifies future optimizations and makes IR
easier to understand.

Updated all affected tests, and added a new test in split-gep.ll to cover a
corner case where emitting uglygep is necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209537 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[RuntimeDyld] Remove relocation bounds check introduced in r208375 (MachO only).
Lang Hames [Fri, 23 May 2014 18:35:44 +0000 (18:35 +0000)]
[RuntimeDyld] Remove relocation bounds check introduced in r208375 (MachO only).

We do all of our address arithmetic in 64-bit, and operations involving
logically negative 32-bit offsets (actually represented as unsigned 64 bit ints)
often overflow into higher bits. The overflow check could be preserved by
casting to uint32 at the callsite for applyRelocationValue, but this would
eliminate the value of the check.

The right way to handle overflow in relocations is to make relocation processing
target specific, and compute the values for RelocationEntry objects in the
appropriate types (32-bit for 32-bit targets, 64-bit for 64-bit targets). This
is coming as part of the cleanup I'm working on.

This fixes another i386 regression test.

<rdar://problem/16889891>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209536 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd FIXME comment based on code review feedback by Hal Finkel on r209338
David Blaikie [Fri, 23 May 2014 16:53:14 +0000 (16:53 +0000)]
Add FIXME comment based on code review feedback by Hal Finkel on r209338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209529 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoConvert test to use FileCheck.
Rafael Espindola [Fri, 23 May 2014 16:51:13 +0000 (16:51 +0000)]
Convert test to use FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209528 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTeach the table generated emitPseudoExpansionLowering function to not emit a switch...
Aaron Ballman [Fri, 23 May 2014 15:33:39 +0000 (15:33 +0000)]
Teach the table generated emitPseudoExpansionLowering function to not emit a switch statement containing only a default statement (and no cases). Updated some of the code to use range-based for loops as well. No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209521 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAliases are always definition, delete dead code.
Rafael Espindola [Fri, 23 May 2014 15:18:06 +0000 (15:18 +0000)]
Aliases are always definition, delete dead code.

While at it, use a range loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209519 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDelete dead code.
Rafael Espindola [Fri, 23 May 2014 15:07:51 +0000 (15:07 +0000)]
Delete dead code.

GV is never used past this point. This was probably a copy and paste error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209518 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Work around inconsistency in llvm-mc's placement of fixup markers
Daniel Sanders [Fri, 23 May 2014 13:35:24 +0000 (13:35 +0000)]
[mips] Work around inconsistency in llvm-mc's placement of fixup markers

Summary:
Add a second fixup table to MipsAsmBackend::getFixupKindInfo() to correctly
position llvm-mc's fixup placeholders for big-endian.

See PR19836 for full details of the issue. To summarize, the fixup placeholders
do not account for endianness properly and the implementations of
getFixupKindInfo() for each target are measuring MCFixupKindInfo.TargetOffset
from different ends of the instruction encoding to compensate.

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209514 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][mips64r6] t(eq|ge|lt|ne)i and t(ge|lt)iu are not available in MIPS32r6/MIPS64r6
Daniel Sanders [Fri, 23 May 2014 13:24:08 +0000 (13:24 +0000)]
[mips][mips64r6] t(eq|ge|lt|ne)i and t(ge|lt)iu are not available in MIPS32r6/MIPS64r6

Summary: Depends on D3872

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3891

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209513 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6
Daniel Sanders [Fri, 23 May 2014 13:18:02 +0000 (13:18 +0000)]
[mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6

Summary:
Instead the system is required to provide some means of handling unaligned
load/store without special instructions. Options include full hardware
support, full trap-and-emulate, and hybrids such as hardware support within
a cache line and trap-and-emulate for multi-line accesses.

MipsSETargetLowering::allowsUnalignedMemoryAccesses() has been configured to
assume that unaligned accesses are 'fast' on the basis that I expect few
hardware implementations will opt for pure-software handling of unaligned
accesses. The ones that do handle it purely in software can override this.

mips64-load-store-left-right.ll has been merged into load-store-left-right.ll

The stricter testing revealed a Bits!=Bytes bug in passByValArg(). This has
been fixed and the variables renamed to clarify the units they hold.

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3872

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209512 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[asan] properly instrument memory accesses that have small alignment (smaller than...
Kostya Serebryany [Fri, 23 May 2014 11:52:07 +0000 (11:52 +0000)]
[asan] properly instrument memory accesses that have small alignment (smaller than min(8,size)) by making two checks instead of one. This may slowdown some cases, e.g. long long on 32-bit or wide loads produced after loop unrolling. The benefit is higher sencitivity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209508 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUpdated the llvm.mem.parallel_loop_access semantics to include the possibility
Pekka Jaaskelainen [Fri, 23 May 2014 11:35:46 +0000 (11:35 +0000)]
Updated the llvm.mem.parallel_loop_access semantics to include the possibility
to have only some of the loop's memory instructions be annotated and still _help_
the loop carried dependence analysis.

This was discussed in the llvmdev ML (topic: "parallel loop metadata question").

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209507 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFixup sys::getHostCPUFeatures crypto names so it doesn't clash with kernel headers
Bradley Smith [Fri, 23 May 2014 10:14:13 +0000 (10:14 +0000)]
Fixup sys::getHostCPUFeatures crypto names so it doesn't clash with kernel headers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209506 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[YAML] Add an optional argument `EnumMask` to the `yaml::IO::bitSetCase()`.
Simon Atanasyan [Fri, 23 May 2014 08:07:09 +0000 (08:07 +0000)]
[YAML] Add an optional argument `EnumMask` to the `yaml::IO::bitSetCase()`.

Some bit-set fields used in ELF file headers in fact contain two parts.
The first one is a regular bit-field. The second one is an enumeraion.
For example ELF header `e_flags` for MIPS target might contain the
following values:

Bit-set values:

  EF_MIPS_NOREORDER = 0x00000001
  EF_MIPS_PIC       = 0x00000002
  EF_MIPS_CPIC      = 0x00000004
  EF_MIPS_ABI2      = 0x00000020

Enumeration:

  EF_MIPS_ARCH_32   = 0x50000000
  EF_MIPS_ARCH_64   = 0x60000000
  EF_MIPS_ARCH_32R2 = 0x70000000
  EF_MIPS_ARCH_64R2 = 0x80000000

For printing bit-sets we use the `yaml::IO::bitSetCase()`. It does not
support bit-set/enumeration combinations and prints too many flags from
an enumeration part. This patch fixes this problem. New method
`yaml::IO::maskedBitSetCase()` handle "enumeration" part of bitset
defined by provided mask.

Patch reviewed by Nick Kledzik and Sean Silva.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209504 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTypedef NumeredTypesMapTy is not used anywhere.
Yaron Keren [Fri, 23 May 2014 07:31:25 +0000 (07:31 +0000)]
Typedef NumeredTypesMapTy is not used anywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209502 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTest commit.
Jingyue Wu [Fri, 23 May 2014 06:30:12 +0000 (06:30 +0000)]
Test commit.

The keyword "virtual" is not necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209501 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-ar: Output the file we errored on.
Filipe Cabecinhas [Fri, 23 May 2014 05:52:12 +0000 (05:52 +0000)]
llvm-ar: Output the file we errored on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209500 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRename a couple of variables to be more accurate.
David Blaikie [Fri, 23 May 2014 05:03:23 +0000 (05:03 +0000)]
Rename a couple of variables to be more accurate.

It's not really a "ScopeDIE", as such - it's the abstract function
definition's DIE. And we usually use "SP" for subprograms, rather than
"Sub".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209499 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Fix cross-CU references for scopes (and variables within those scopes...
David Blaikie [Fri, 23 May 2014 04:23:06 +0000 (04:23 +0000)]
DebugInfo: Fix cross-CU references for scopes (and variables within those scopes) in abstract definitions of cross-CU inlined functions

Found by Adrian Prantl during post-commit review of r209335.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209498 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMC: remove unnecessary restriction on tests
Saleem Abdulrasool [Fri, 23 May 2014 02:56:51 +0000 (02:56 +0000)]
MC: remove unnecessary restriction on tests

Rafael correctly pointed out that the restriction is unnecessary.  Although the
tests are intended to ensure that we dont abort due to an assertion, running the
tests in all modes is better since it also ensures that we dont crash without
assertions.  Always run these tests to ensure that we can handle invalid input
correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209496 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped...
Jiangning Liu [Fri, 23 May 2014 02:54:50 +0000 (02:54 +0000)]
[ARM64] Fix a bug in shuffle vector lowering to generate corect vext ISD with swapped input vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209495 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAttempt to placate compilers that warn on casts between pointer-to-object and
Richard Smith [Fri, 23 May 2014 01:22:46 +0000 (01:22 +0000)]
Attempt to placate compilers that warn on casts between pointer-to-object and
pointer-to-function types.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209490 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoScalarEvolution: Fix handling of AddRecs in isKnownPredicate
Justin Bogner [Fri, 23 May 2014 00:06:56 +0000 (00:06 +0000)]
ScalarEvolution: Fix handling of AddRecs in isKnownPredicate

ScalarEvolution::isKnownPredicate() can wrongly reduce a comparison
when both the LHS and RHS are SCEVAddRecExprs. This checks that both
LHS and RHS are guarded in the case when both are SCEVAddRecExprs.

The test case is against indvars because I could not find a way to
directly test SCEV.

Patch by Sanjay Patel!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209487 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Graph Writer] Limit the length of the graph name because Windows can't handle it.
Michael J. Spencer [Thu, 22 May 2014 23:32:18 +0000 (23:32 +0000)]
[Graph Writer] Limit the length of the graph name because Windows can't handle it.

Windows can't handle paths longer than 260 code points without \\?\. Even
with \\?\ it can't handle path components longer than 255 code points. So
limit graph names to the arbitrary length of 140. Random characters are still
added to the end, so it's ok if graph names collide.

Differential Revision: http://reviews.llvm.org/D3883

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209483 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake these bool bitfields.
Eric Christopher [Thu, 22 May 2014 23:09:57 +0000 (23:09 +0000)]
Make these bool bitfields.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209481 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[RuntimeDyld] Teach RuntimeDyldMachO how to handle scattered VANILLA relocs on
Lang Hames [Thu, 22 May 2014 22:30:13 +0000 (22:30 +0000)]
[RuntimeDyld] Teach RuntimeDyldMachO how to handle scattered VANILLA relocs on
i386.

This fixes two more MCJIT regression tests on i386:

  ExecutionEngine/MCJIT/2003-05-06-LivenessClobber.ll
  ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll

The implementation of processScatteredVANILLA is tasteless (*ba-dum-ching*),
but I'm working on a substantial tidy-up of RuntimeDyldMachO that should
improve things.

This patch also fixes a type-o in RuntimeDyldMachO::processSECTDIFFRelocation,
and teaches that method to skip over the PAIR reloc following the SECTDIFF.

<rdar://problem/16961886>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209478 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUpdate some AliasAnalysis pass docs for getAdjustedAnalysisPointer.
Eric Christopher [Thu, 22 May 2014 19:38:25 +0000 (19:38 +0000)]
Update some AliasAnalysis pass docs for getAdjustedAnalysisPointer.

Patch by George Burgess.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209467 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Add definition for flat address space ID.
Matt Arsenault [Thu, 22 May 2014 18:27:07 +0000 (18:27 +0000)]
R600: Add definition for flat address space ID.

Use 4 since that's probably what it will be for spir.
Move ADDRESS_NONE to the end to keep the constant_buffer_* values
unchanged, since apparently a bunch of r600 tests use those directly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209463 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Try to convert BFE back to standard bit ops when possible.
Matt Arsenault [Thu, 22 May 2014 18:09:12 +0000 (18:09 +0000)]
R600: Try to convert BFE back to standard bit ops when possible.

This allows existing DAG combines to work on them, and then
we can re-match to BFE if necessary during instruction selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209462 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Add dag combine for BFE
Matt Arsenault [Thu, 22 May 2014 18:09:07 +0000 (18:09 +0000)]
R600: Add dag combine for BFE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209461 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement ComputeNumSignBitsForTargetNode for BFE
Matt Arsenault [Thu, 22 May 2014 18:09:03 +0000 (18:09 +0000)]
R600: Implement ComputeNumSignBitsForTargetNode for BFE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209460 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement computeMaskedBitsForTargetNode for BFE
Matt Arsenault [Thu, 22 May 2014 18:09:00 +0000 (18:09 +0000)]
R600: Implement computeMaskedBitsForTargetNode for BFE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209459 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Expand mul24 for GPUs without it
Matt Arsenault [Thu, 22 May 2014 18:00:24 +0000 (18:00 +0000)]
R600: Expand mul24 for GPUs without it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209458 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Expand mad24 for GPUs without it
Matt Arsenault [Thu, 22 May 2014 18:00:20 +0000 (18:00 +0000)]
R600: Expand mad24 for GPUs without it

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209457 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Add intrinsics for mad24
Matt Arsenault [Thu, 22 May 2014 18:00:15 +0000 (18:00 +0000)]
R600: Add intrinsics for mad24

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209456 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReturn false if we're not going to do anything.
Eric Christopher [Thu, 22 May 2014 17:49:33 +0000 (17:49 +0000)]
Return false if we're not going to do anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209455 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Move instruction pattern to instruction definition
Matt Arsenault [Thu, 22 May 2014 17:45:20 +0000 (17:45 +0000)]
R600/SI: Move instruction pattern to instruction definition

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209454 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove LLVMContextImpl::optimizationRemarkEnabledFor.
Diego Novillo [Thu, 22 May 2014 17:19:01 +0000 (17:19 +0000)]
Remove LLVMContextImpl::optimizationRemarkEnabledFor.

Summary:
This patch moves the handling of -pass-remarks* over to
lib/DiagnosticInfo.cpp. This allows the removal of the
optimizationRemarkEnabledFor functions from LLVMContextImpl, as they're
not needed anymore.

Reviewers: qcolombet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3878

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209453 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] Improve the lowering of BITCAST from MVT::f64 to MVT::v4i16/MVT::v8i8.
Andrea Di Biagio [Thu, 22 May 2014 16:21:39 +0000 (16:21 +0000)]
[X86] Improve the lowering of BITCAST from MVT::f64 to MVT::v4i16/MVT::v8i8.

This patch teaches the x86 backend how to efficiently lower ISD::BITCAST dag
nodes from MVT::f64 to MVT::v4i16 (and vice versa), and from MVT::f64 to
MVT::v8i8 (and vice versa).

This patch extends the logic from revision 208107 to also handle MVT::v4i16
and MVT::v8i8. Also, this patch correctly propagates Undef values when
performing the widening of a vector (example: when widening from v2i32 to
v4i32, the upper 64bits of the resulting vector are 'undef').

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209451 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM64: remove '#' from annotation of add/sub immediate
Tim Northover [Thu, 22 May 2014 14:20:05 +0000 (14:20 +0000)]
ARM64: remove '#' from annotation of add/sub immediate

The full string used to be "// =#12" for example, which looks too
busy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209443 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd support for missed and analysis optimization remarks.
Diego Novillo [Thu, 22 May 2014 14:19:46 +0000 (14:19 +0000)]
Add support for missed and analysis optimization remarks.

Summary:
This adds two new diagnostics: -pass-remarks-missed and
-pass-remarks-analysis. They take the same values as -pass-remarks but
are intended to be triggered in different contexts.

-pass-remarks-missed is used by LLVMContext::emitOptimizationRemarkMissed,
which passes call when they tried to apply a transformation but
couldn't.

-pass-remarks-analysis is used by LLVMContext::emitOptimizationRemarkAnalysis,
which passes call when they want to inform the user about analysis
results.

The patch also:

1- Adds support in the inliner for the two new remarks and a
   test case.

2- Moves emitOptimizationRemark* functions to the llvm namespace.

3- Adds an LLVMContext argument instead of making them member functions
   of LLVMContext.

Reviewers: qcolombet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3682

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209442 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSegmented stacks: omit __morestack call when there's no frame.
Tim Northover [Thu, 22 May 2014 13:03:43 +0000 (13:03 +0000)]
Segmented stacks: omit __morestack call when there's no frame.

Patch by Florian Zeitz

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209436 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM64: these work too
Tim Northover [Thu, 22 May 2014 12:14:49 +0000 (12:14 +0000)]
ARM64: these work too

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209430 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoYes they do
Tim Northover [Thu, 22 May 2014 12:14:02 +0000 (12:14 +0000)]
Yes they do

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209429 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM64: model pre/post-indexed operations properly.
Tim Northover [Thu, 22 May 2014 11:56:20 +0000 (11:56 +0000)]
ARM64: model pre/post-indexed operations properly.

We should be keeping track of the writeback on these instructions,
otherwise we're relying on LLVM's stupidity for correct code.

Fortunately, the MC layer can now handle all required constraints,
which means we can get rid of the CodeGen only PseudoInsts too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209426 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM64: separate load/store operands to simplify assembler
Tim Northover [Thu, 22 May 2014 11:56:09 +0000 (11:56 +0000)]
ARM64: separate load/store operands to simplify assembler

This changes ARM64 to use separate operands for each component of an
address, and look for separate '[', '$Rn, ..., ']' tokens when
parsing.

This allows us to do away with quite a bit of special C++ code to
handle monolithic "addressing modes" in the MC components. The more
incremental matching of the assembler operands also allows for better
diagnostics when LLVM is presented with invalid input.

Most of the complexity here is with the register-offset instructions,
which were extremely dodgy beforehand: even when the instruction used
wM, LLVM's model had xM as an operand. We papered over this
discrepancy before, but that approach doesn't work now so I split them
into separate X and W variants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209425 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Make unalignedload.ll test stricter and easier to modify for MIPS32r6/MIPS64r6
Daniel Sanders [Thu, 22 May 2014 11:55:04 +0000 (11:55 +0000)]
[mips] Make unalignedload.ll test stricter and easier to modify for MIPS32r6/MIPS64r6

Summary:
* Split into two functions, one to test each struct.
* R0 and R2 must be defined by an lw with a %got reference to the correct
  symbol.
* Test for $4 (first argument) where appropriate instead of accepting any
  register.
* Test that the two lbu's are correctly combined into $4

Depends on D3844

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3845

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209424 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Change lwl and lwr in inlineasm_constraint.ll to lw
Daniel Sanders [Thu, 22 May 2014 11:51:06 +0000 (11:51 +0000)]
[mips] Change lwl and lwr in inlineasm_constraint.ll to lw

Summary:
lwl and lwr are not available in MIPS32r6/MIPS64r6. The purpose of the test
is to check that the '$1' expands to '0($x)' rather than to test something related
to the lwl or lwr instructions so we can simply switch to lw.

Depends on D3842

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3844

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209423 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Use addiu in inline assembly tests since addi is not available in all ISA's
Daniel Sanders [Thu, 22 May 2014 11:46:58 +0000 (11:46 +0000)]
[mips] Use addiu in inline assembly tests since addi is not available in all ISA's

Summary:
This patch is necessary so that they do not fail on MIPS32r6/MIPS64r6 when
-integrated-as is enabled by default and we correctly detect the host CPU.

No functional change since these tests are testing the behaviour of the
constraint used for the third operand rather than the mnemonic.

Depends on D3842

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3843

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209421 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoExtend sys::getHostCPUFeatures to work on AArch64 platforms
Bradley Smith [Thu, 22 May 2014 11:44:34 +0000 (11:44 +0000)]
Extend sys::getHostCPUFeatures to work on AArch64 platforms

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209420 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6
Daniel Sanders [Thu, 22 May 2014 11:42:31 +0000 (11:42 +0000)]
[mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6

Summary: Depends on D3787. Tablegen will raise an assertion without it.

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3842

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209419 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][mips64r6] Test that paired single instructions are invalid
Daniel Sanders [Thu, 22 May 2014 11:37:38 +0000 (11:37 +0000)]
[mips][mips64r6] Test that paired single instructions are invalid

Summary:
These emit the 'unknown instruction' instead of the correct error
because they have not been implemented in LLVM for any MIPS ISA.

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3841

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209418 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][mips64r6] Add b[on]vc
Daniel Sanders [Thu, 22 May 2014 11:23:21 +0000 (11:23 +0000)]
[mips][mips64r6] Add b[on]vc

Summary:
This required me to implement the disassembler for MIPS64r6 since the encodings
are ambiguous with other instructions. This in turn revealed a few
assembly/disassembly bugs which I have fixed.

* da[ht]i only take two operands according to the spec, not three.
* DecodeBranchTarget2[16] correctly handles wider immediates than simm16
  * Also made non-functional change to DecodeBranchTarget and
    DecodeBranchTargetMM to keep implementation style consistent between
    them.
* Difficult encodings are handled by a custom decode method on the most
  general encoding in the group. This method will convert the MCInst to a
  different opcode if necessary.

DecodeBranchTarget is not currently the inverse of getBranchTargetOpValue
so disassembling some branch instructions emit incorrect output. This seems
to affect branches with delay slots on all MIPS ISA's. I've left this bug
for now and temporarily removed the check for the immediate on
bc[12]eqz/bc[12]nez in the MIPS32r6/MIPS64r6 tests.

jialc and jic crash the disassembler for some reason. I've left these
instructions commented out for the moment.

Depends on D3760

Reviewers: jkolek, zoran.jovanovic, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3761

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209415 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM64: assert if we see i64 -> i64 extend in the DAG.
Tim Northover [Thu, 22 May 2014 07:41:37 +0000 (07:41 +0000)]
ARM64: assert if we see i64 -> i64 extend in the DAG.

Should be no change in behaviour, but it makes the intended
functionality a bit clearer and means we only have to reason about
real extend operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209409 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAArch64/ARM64: enable more AArch64 tests.
Tim Northover [Thu, 22 May 2014 07:40:55 +0000 (07:40 +0000)]
AArch64/ARM64: enable more AArch64 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209408 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMC: initialise MCAsmParser variable
Saleem Abdulrasool [Thu, 22 May 2014 06:02:59 +0000 (06:02 +0000)]
MC: initialise MCAsmParser variable

Properly initialise HadError to false during construction.  Detected as
use-of-uninitialised variable by MSan!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209393 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove unused variable.
Eric Christopher [Thu, 22 May 2014 05:33:03 +0000 (05:33 +0000)]
Remove unused variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209391 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: introduce llvm.arm.undefined intrinsic
Saleem Abdulrasool [Thu, 22 May 2014 04:46:46 +0000 (04:46 +0000)]
ARM: introduce llvm.arm.undefined intrinsic

This intrinsic permits the emission of platform specific undefined sequences.
ARM has reserved the 0xde opcode which takes a single integer parameter (ignored
by the CPU).  This permits the operating system to implement custom behaviour on
this trap.  The llvm.arm.undefined intrinsic is meant to provide a means for
generating the target specific behaviour from the frontend.  This is
particularly useful for Windows on ARM which has made use of a series of these
special opcodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209390 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Match fp_to_uint / uint_to_fp for f64
Matt Arsenault [Thu, 22 May 2014 03:20:30 +0000 (03:20 +0000)]
R600/SI: Match fp_to_uint / uint_to_fp for f64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209388 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMC: formalise some assertions into proper errors
Saleem Abdulrasool [Thu, 22 May 2014 02:18:10 +0000 (02:18 +0000)]
MC: formalise some assertions into proper errors

Now that clang can be used as an assembler via the IAS, invalid assembler inputs
would cause the assertions to trigger.  Although we cannot recover from the
errors here, nor provide caret diagnostics, attempt to handle them slightly more
gracefully by reporting a fatal error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209387 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoOverride runOnMachineFunction for ARMISelDAGToDAG so that we can
Eric Christopher [Thu, 22 May 2014 02:00:27 +0000 (02:00 +0000)]
Override runOnMachineFunction for ARMISelDAGToDAG so that we can
reset the subtarget on each function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209386 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoOverride runOnMachineFunction for X86ISelDAGToDAG so that we can
Eric Christopher [Thu, 22 May 2014 01:53:26 +0000 (01:53 +0000)]
Override runOnMachineFunction for X86ISelDAGToDAG so that we can
reset the subtarget on each function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209384 91177308-0d34-0410-b5e6-96231b3b80d8