oota-llvm.git
12 years agoRemove unused variables.
Benjamin Kramer [Sat, 21 Jan 2012 10:42:44 +0000 (10:42 +0000)]
Remove unused variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148635 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix PR11819 introduced by r148537. I'd commit the test case, but the generated code...
Craig Topper [Sat, 21 Jan 2012 08:49:33 +0000 (08:49 +0000)]
Fix PR11819 introduced by r148537. I'd commit the test case, but the generated code is terrible as it gets fully scalarized. Expect a future commit to fix that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148632 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix an obvious typo.
Evan Cheng [Sat, 21 Jan 2012 03:31:03 +0000 (03:31 +0000)]
Fix an obvious typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148622 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHandle register masks in LiveVariables.
Jakob Stoklund Olesen [Sat, 21 Jan 2012 00:58:53 +0000 (00:58 +0000)]
Handle register masks in LiveVariables.

A register mask operand kills any live physreg that isn't preserved.
Unlike an implicit-def operand, the clobbered physregs are never live
afterwards.

This means LiveVariables has to track a much smaller number of live
physregs, and it should spend much less time in addRegisterDead().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148609 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRuntimeDyld alignment adjustment from MachO file.
Jim Grosbach [Sat, 21 Jan 2012 00:21:53 +0000 (00:21 +0000)]
RuntimeDyld alignment adjustment from MachO file.

The MachO file stores section alignment as log2(alignment-in-bytes). The
allocation routines want the raw alignment-in-bytes value, so adjust
for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148604 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 'add rd, pc, imm' alternate form for 'adr' instruction.
Jim Grosbach [Sat, 21 Jan 2012 00:07:56 +0000 (00:07 +0000)]
Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148601 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDelete an unused member variable.
Jakob Stoklund Olesen [Fri, 20 Jan 2012 22:48:59 +0000 (22:48 +0000)]
Delete an unused member variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148594 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix inverted condition.
Jim Grosbach [Fri, 20 Jan 2012 22:44:03 +0000 (22:44 +0000)]
Fix inverted condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148593 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel syntax: Robustify register parsing.
Devang Patel [Fri, 20 Jan 2012 22:32:05 +0000 (22:32 +0000)]
Intel syntax: Robustify register parsing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148591 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSupport register masks in MachineLICM.
Jakob Stoklund Olesen [Fri, 20 Jan 2012 22:27:12 +0000 (22:27 +0000)]
Support register masks in MachineLICM.

Only PostRA LICM is affected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148589 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHandle register masks in DeadMachineInstructionElim.
Jakob Stoklund Olesen [Fri, 20 Jan 2012 22:27:09 +0000 (22:27 +0000)]
Handle register masks in DeadMachineInstructionElim.

Don't track live physregs that are clobbered by a register mask operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148588 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMore dead code removal (using -Wunreachable-code)
David Blaikie [Fri, 20 Jan 2012 21:51:11 +0000 (21:51 +0000)]
More dead code removal (using -Wunreachable-code)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHandle a corner case with IV chain collection with bailout instead of assert.
Andrew Trick [Fri, 20 Jan 2012 21:23:40 +0000 (21:23 +0000)]
Handle a corner case with IV chain collection with bailout instead of assert.

Fixes PR11783: bad cast to AddRecExpr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148572 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTest case comments missing from my previous checkin.
Andrew Trick [Fri, 20 Jan 2012 21:21:27 +0000 (21:21 +0000)]
Test case comments missing from my previous checkin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148571 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel syntax: Parse ... PTR [-8]
Devang Patel [Fri, 20 Jan 2012 21:21:01 +0000 (21:21 +0000)]
Intel syntax: Parse ... PTR [-8]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148570 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.
Devang Patel [Fri, 20 Jan 2012 21:14:06 +0000 (21:14 +0000)]
Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148569 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>
Bob Wilson [Fri, 20 Jan 2012 20:59:56 +0000 (20:59 +0000)]
ARM vector any_extends need to be selected to vmovl.  <rdar://problem/10723651>

We have patterns for vector sext and zext operations but were missing
anyext.  Without those patterns, codegen will fail when the selection DAG
has any_extend nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148568 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTblGen diagnostic for mismatched template instantiation.
Jim Grosbach [Fri, 20 Jan 2012 20:02:39 +0000 (20:02 +0000)]
TblGen diagnostic for mismatched template instantiation.

Providing a template argment to a non-templatized class was crashing
tblgen. Add a diagnostic.

For example,
$ cat bug.td
class A;

def B : A<0> {
}
$ llvm-tblgen bug.td
bug.td:3:11: error: template argument provided to non-template class
def B : A<0> {
          ^

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148565 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoVST2 four-register w/ update pseudos for fixed/register update.
Jim Grosbach [Fri, 20 Jan 2012 19:16:00 +0000 (19:16 +0000)]
VST2 four-register w/ update pseudos for fixed/register update.

rdar://10724489

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148560 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoNEON use vmov.i32 to splat some f32 values into vectors.
Jim Grosbach [Fri, 20 Jan 2012 18:09:51 +0000 (18:09 +0000)]
NEON use vmov.i32 to splat some f32 values into vectors.

For bit patterns that aren't representable using the 8-bit floating point
representation for vmov.f32, but are representable via vmov.i32, treat
the .f32 syntax as an alias. Most importantly, this covers the case
'vmov.f32 Vd, #0.0'.

rdar://10616677

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148556 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDon't use my favorite C++11 feature (comma at end of enum).
Benjamin Kramer [Fri, 20 Jan 2012 18:08:30 +0000 (18:08 +0000)]
Don't use my favorite C++11 feature (comma at end of enum).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148555 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoExtend Attributes to 64 bits
Kostya Serebryany [Fri, 20 Jan 2012 17:56:17 +0000 (17:56 +0000)]
Extend Attributes to 64 bits

Problem: LLVM needs more function attributes than currently available (32 bits).
One such proposed attribute is "address_safety", which shows that a function is being checked for address safety (by AddressSanitizer, SAFECode, etc).

Solution:
- extend the Attributes from 32 bits to 64-bits
- wrap the object into a class so that unsigned is never erroneously used instead
- change "unsigned" to "Attributes" throughout the code, including one place in clang.
- the class has no "operator uint64 ()", but it has "uint64_t Raw() " to support packing/unpacking.
- the class has "safe operator bool()" to support the common idiom:  if (Attributes attr = getAttrs()) useAttrs(attr);
- The CTOR from uint64_t is marked explicit, so I had to add a few explicit CTOR calls
- Add the new attribute "address_safety". Doing it in the same commit to check that attributes beyond first 32 bits actually work.
- Some of the functions from the Attribute namespace are worth moving inside the class, but I'd prefer to have it as a separate commit.

Tested:
"make check" on Linux (32-bit and 64-bit) and Mac (10.6)
built/run spec CPU 2006 on Linux with clang -O2.

This change will break clang build in lib/CodeGen/CGCall.cpp.
The following patch will fix it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148553 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoProtect SmallVectorImpl's constructor and a few other methods that aren't meant to...
Benjamin Kramer [Fri, 20 Jan 2012 16:39:46 +0000 (16:39 +0000)]
Protect SmallVectorImpl's constructor and a few other methods that aren't meant to be public.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148550 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd missing breaks to switch.
Benjamin Kramer [Fri, 20 Jan 2012 14:42:37 +0000 (14:42 +0000)]
Add missing breaks to switch.

Found by the clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148543 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove a bunch of unused variable assignments.
Benjamin Kramer [Fri, 20 Jan 2012 14:42:32 +0000 (14:42 +0000)]
Remove a bunch of unused variable assignments.

Found by the clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148541 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove obviously invalid early exit that prevented analyzing ConstantAggregateZeros.
Benjamin Kramer [Fri, 20 Jan 2012 14:42:25 +0000 (14:42 +0000)]
Remove obviously invalid early exit that prevented analyzing ConstantAggregateZeros.

Found by the clang static analyzer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148540 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDon't use -fvisibility-inlines-hidden on mingw to try to avoid a lot of
Rafael Espindola [Fri, 20 Jan 2012 13:10:10 +0000 (13:10 +0000)]
Don't use -fvisibility-inlines-hidden on mingw to try to avoid a lot of
warnings from gcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148539 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoImprove 256-bit shuffle splitting to allow 2 sources in each 128-bit lane. As long...
Craig Topper [Fri, 20 Jan 2012 09:29:03 +0000 (09:29 +0000)]
Improve 256-bit shuffle splitting to allow 2 sources in each 128-bit lane. As long as only a single lane of the source is used in the lane in the destination. This makes the splitting match much closer to what happens with 256-bit shuffles when AVX is disabled and only 128-bit XMM is allowed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148537 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix CountCodeReductionForAlloca to more accurately represent what SROA can and
Nick Lewycky [Fri, 20 Jan 2012 08:35:20 +0000 (08:35 +0000)]
Fix CountCodeReductionForAlloca to more accurately represent what SROA can and
can't handle. Also don't produce non-zero results for things which won't be
transformed by SROA at all just because we saw the loads/stores before we saw
the use of the address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148536 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSCEVExpander fixes. Affects LSR and indvars.
Andrew Trick [Fri, 20 Jan 2012 07:41:13 +0000 (07:41 +0000)]
SCEVExpander fixes. Affects LSR and indvars.

LSR has gradually been improved to more aggressively reuse existing code, particularly existing phi cycles. This exposed problems with the SCEVExpander's sloppy treatment of its insertion point. I applied some rigor to the insertion point problem that will hopefully avoid an endless bug cycle in this area. Changes:

- Always used properlyDominates to check safe code hoisting.

- The insertion point provided to SCEV is now considered a lower bound. This is usually a block terminator or the use itself. Under no cirumstance may SCEVExpander insert below this point.

- LSR is reponsible for finding a "canonical" insertion point across expansion of different expressions.

- Robust logic to determine whether IV increments are in "expanded" form and/or can be safely hoisted above some insertion point.

Fixes PR11783: SCEVExpander assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148535 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for selecting 256-bit PALIGNR.
Craig Topper [Fri, 20 Jan 2012 05:53:00 +0000 (05:53 +0000)]
Add support for selecting 256-bit PALIGNR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148532 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agocmake: pass -fvisibility-inlines-hidden if it is supported. In a
Rafael Espindola [Fri, 20 Jan 2012 04:07:48 +0000 (04:07 +0000)]
cmake: pass -fvisibility-inlines-hidden if it is supported. In a
Release+Asserts build with -DBUILD_SHARED_LIBS=ON, the install
directory goes from 72MB to 70MB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148530 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove a low-quality test which was failing on Windows; test/CodeGen/X86/sret.ll...
Eli Friedman [Fri, 20 Jan 2012 02:06:40 +0000 (02:06 +0000)]
Remove a low-quality test which was failing on Windows; test/CodeGen/X86/sret.ll is a better test for the relevant behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148526 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoWhen lowering the 'resume' instruction, look to see if we can eliminate the
Bill Wendling [Fri, 20 Jan 2012 00:53:28 +0000 (00:53 +0000)]
When lowering the 'resume' instruction, look to see if we can eliminate the
'insertvalue' instructions that recreate the structure returned by the
'landingpad' instruction. Because the 'insertvalue' instruction isn't supported
by FastISel, this can save a bit of time during -O0 compilation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148520 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSupport MSVC x86-32 sret convention. PR11688. Patch by Joe Groff.
Eli Friedman [Fri, 20 Jan 2012 00:05:46 +0000 (00:05 +0000)]
Support MSVC x86-32 sret convention.  PR11688.  Patch by Joe Groff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148513 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix typo.
Chad Rosier [Thu, 19 Jan 2012 21:50:08 +0000 (21:50 +0000)]
Fix typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148497 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSilence warnings about mixing enums.
Benjamin Kramer [Thu, 19 Jan 2012 21:11:13 +0000 (21:11 +0000)]
Silence warnings about mixing enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148495 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a dump() implementation for sub-instruction MCOperands.
Owen Anderson [Thu, 19 Jan 2012 19:32:20 +0000 (19:32 +0000)]
Add a dump() implementation for sub-instruction MCOperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148493 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a new form of MCOperand, for representing sub-instructions. This is intended...
Owen Anderson [Thu, 19 Jan 2012 19:24:37 +0000 (19:24 +0000)]
Add a new form of MCOperand, for representing sub-instructions.  This is intended for supporting bundles through the MC layer, rather than lowering them pre-MC as we currently do for Thumb2 IT blocks.  Since these sub-instruction operands hold pointers to the sub-instructions, it is the responsibility of the target's AsmPrinter to provide storage for them for the duration of the EmitInstruction() call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148492 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSet the "tail" flag on pattern-matched objc_storeStrong calls.
Dan Gohman [Thu, 19 Jan 2012 19:14:36 +0000 (19:14 +0000)]
Set the "tail" flag on pattern-matched objc_storeStrong calls.
rdar://10531041.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148490 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPost process 'and', 'sub' instructions and select better encoding, if available.
Devang Patel [Thu, 19 Jan 2012 18:40:55 +0000 (18:40 +0000)]
Post process 'and', 'sub' instructions and select better encoding, if available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148489 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoActually, this code handles wrapped sets just fine. Noticed by inspection.
Nick Lewycky [Thu, 19 Jan 2012 18:19:42 +0000 (18:19 +0000)]
Actually, this code handles wrapped sets just fine. Noticed by inspection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148487 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel syntax: There is no need to create unary expr for simple negative displacement.
Devang Patel [Thu, 19 Jan 2012 18:15:51 +0000 (18:15 +0000)]
Intel syntax: There is no need to create unary expr for simple negative displacement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148486 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPost process 'xor', 'or' and 'cmp' instructions and select better encoding, if available.
Devang Patel [Thu, 19 Jan 2012 17:53:25 +0000 (17:53 +0000)]
Post process 'xor', 'or' and 'cmp' instructions and select better encoding, if available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148485 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEmit ARM EHABI unwinding instructions for 3 more Thumb instructions.
Evgeniy Stepanov [Thu, 19 Jan 2012 12:53:06 +0000 (12:53 +0000)]
Emit ARM EHABI unwinding instructions for 3 more Thumb instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148473 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFolding table additions and fixes for AVX.
Craig Topper [Thu, 19 Jan 2012 08:50:38 +0000 (08:50 +0000)]
Folding table additions and fixes for AVX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148467 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMerge 128-bit and 256-bit SHUFPS/SHUFPD handling.
Craig Topper [Thu, 19 Jan 2012 08:19:12 +0000 (08:19 +0000)]
Merge 128-bit and 256-bit SHUFPS/SHUFPD handling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148466 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMore bundle related API additions.
Evan Cheng [Thu, 19 Jan 2012 07:47:03 +0000 (07:47 +0000)]
More bundle related API additions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148465 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRewriter should definitly rewrite instructions inside bundles.
Evan Cheng [Thu, 19 Jan 2012 07:46:36 +0000 (07:46 +0000)]
Rewriter should definitly rewrite instructions inside bundles.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148464 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntroduce a new MutableArrayRef class, which refers to a series of mutable
Chris Lattner [Thu, 19 Jan 2012 06:34:52 +0000 (06:34 +0000)]
Introduce a new MutableArrayRef class, which refers to a series of mutable
T's that are consequtively in memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148463 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEnhance finalizeBundle to return end of bundle iterator because it makes sense.
Evan Cheng [Thu, 19 Jan 2012 06:13:10 +0000 (06:13 +0000)]
Enhance finalizeBundle to return end of bundle iterator because it makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148462 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM assembly diagnostic caret in better position for FPImm.
Jim Grosbach [Thu, 19 Jan 2012 02:47:30 +0000 (02:47 +0000)]
ARM assembly diagnostic caret in better position for FPImm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148459 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 relaxation for tADR to t2ADR.
Jim Grosbach [Thu, 19 Jan 2012 02:09:38 +0000 (02:09 +0000)]
Thumb2 relaxation for tADR to t2ADR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148456 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd comment and fix range check in condition.
Jim Grosbach [Thu, 19 Jan 2012 01:50:30 +0000 (01:50 +0000)]
Add comment and fix range check in condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148455 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd testcase.
Jim Grosbach [Thu, 19 Jan 2012 01:36:59 +0000 (01:36 +0000)]
Add testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148454 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdded methods to get the live range immediately before a given slot. Intended to...
Lang Hames [Thu, 19 Jan 2012 01:36:06 +0000 (01:36 +0000)]
Added methods to get the live range immediately before a given slot. Intended to parallel the getVNInfoBefore method.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148453 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSpace after punctuation.
Nick Lewycky [Thu, 19 Jan 2012 01:13:47 +0000 (01:13 +0000)]
Space after punctuation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148451 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago- Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing
Evan Cheng [Thu, 19 Jan 2012 00:46:06 +0000 (00:46 +0000)]
- Slight change to finalizeBundle() interface. LastMI is not exclusive (pointing
  to instruction right after the last instruction in the bundle.
- Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code
  will find the last instruction in the bundle by following the 'InsideBundle'
  marker. This is useful in case bundles are formed early (i.e. during MI
  scheduling) but finalized later (i.e. after register allocator has finished
  rewriting virtual registers with physical registers).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148444 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a TargetOption for disabling tail calls.
Nick Lewycky [Thu, 19 Jan 2012 00:34:10 +0000 (00:34 +0000)]
Add a TargetOption for disabling tail calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148442 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRename Finalizebundle to finalizeBundle to conform to coding guideline.
Evan Cheng [Thu, 19 Jan 2012 00:06:10 +0000 (00:06 +0000)]
Rename Finalizebundle to finalizeBundle to conform to coding guideline.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148440 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd experimental -x86-use-regmask command line option.
Jakob Stoklund Olesen [Wed, 18 Jan 2012 23:52:22 +0000 (23:52 +0000)]
Add experimental -x86-use-regmask command line option.

It adds register mask operands to x86 call instructions.  Once all the
backend passes support register mask operands, this will be permanently
enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148438 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIgnore register mask operands when lowering instructions to MC.
Jakob Stoklund Olesen [Wed, 18 Jan 2012 23:52:19 +0000 (23:52 +0000)]
Ignore register mask operands when lowering instructions to MC.

This is similar to implicit register operands.  MC doesn't understand
register liveness and call clobbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148437 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a RegisterMaskSDNode class.
Jakob Stoklund Olesen [Wed, 18 Jan 2012 23:52:12 +0000 (23:52 +0000)]
Add a RegisterMaskSDNode class.

This SelectionDAG node will be attached to call nodes by LowerCall(),
and eventually becomes a MO_RegisterMask MachineOperand on the
MachineInstr representing the call instruction.

LowerCall() will attach a register mask that depends on the calling
convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148436 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for the gnueabihf environment. Patch by Sylvestre Ledru.
Rafael Espindola [Wed, 18 Jan 2012 23:35:29 +0000 (23:35 +0000)]
Add support for the gnueabihf environment. Patch by Sylvestre Ledru.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148434 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 alternate syntax for LDR(literal) and friends.
Jim Grosbach [Wed, 18 Jan 2012 22:46:46 +0000 (22:46 +0000)]
Thumb2 alternate syntax for LDR(literal) and friends.

Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]".

rdar://10250964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148432 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoProcess instructions after match to select alternative encoding which may be more...
Devang Patel [Wed, 18 Jan 2012 22:42:29 +0000 (22:42 +0000)]
Process instructions after match to select alternative encoding which may be more desirable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148431 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoReplace FIXME with explanatory comment.
Jim Grosbach [Wed, 18 Jan 2012 22:04:42 +0000 (22:04 +0000)]
Replace FIXME with explanatory comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148427 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 relaxation for LDR(literal).
Jim Grosbach [Wed, 18 Jan 2012 21:54:16 +0000 (21:54 +0000)]
Thumb2 relaxation for LDR(literal).

If the fixup is out of range for the Thumb1 instruction, relax it
to the Thumb2 encoding instead.

rdar://10711829

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148424 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMCAssembler tweak for determining when a symbol difference is resolved.
Jim Grosbach [Wed, 18 Jan 2012 21:54:12 +0000 (21:54 +0000)]
MCAssembler tweak for determining when a symbol difference is resolved.

If the two fragments are in the same Atom, then the difference
expression is resolvable at compile time. Previously we were checking
that they were in the same fragment, but that breaks down in the
presence of instruction relaxation which has multiple fragments in the
same atom.

rdar://10711829

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148423 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRename pattern for clarity.
Jim Grosbach [Wed, 18 Jan 2012 21:54:09 +0000 (21:54 +0000)]
Rename pattern for clarity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148422 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a depth limit to avoid runaway recursion.
Dan Gohman [Wed, 18 Jan 2012 21:24:45 +0000 (21:24 +0000)]
Add a depth limit to avoid runaway recursion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148419 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse llvm.global_ctors to locate global constructors instead
Dan Gohman [Wed, 18 Jan 2012 21:19:38 +0000 (21:19 +0000)]
Use llvm.global_ctors to locate global constructors instead
of recognizing them by name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148416 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove trailing spaces and unneeded includes.
Jakub Staszak [Wed, 18 Jan 2012 21:16:33 +0000 (21:16 +0000)]
Remove trailing spaces and unneeded includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148415 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDocument the fact that the selection dag changes the vselect condition type
Nadav Rotem [Wed, 18 Jan 2012 20:50:30 +0000 (20:50 +0000)]
Document the fact that the selection dag changes the vselect condition type

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148411 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed macro condition.
Lang Hames [Wed, 18 Jan 2012 19:48:31 +0000 (19:48 +0000)]
Fixed macro condition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148408 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. 80 columns.
Jim Grosbach [Wed, 18 Jan 2012 18:52:20 +0000 (18:52 +0000)]
Tidy up. 80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148401 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. MCAsmBackend naming conventions.
Jim Grosbach [Wed, 18 Jan 2012 18:52:16 +0000 (18:52 +0000)]
Tidy up. MCAsmBackend naming conventions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148400 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove dead code.
Bill Wendling [Wed, 18 Jan 2012 10:10:28 +0000 (10:10 +0000)]
Remove dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148384 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix a bug in the type-legalization of vector integers. When we bitcast one vector...
Nadav Rotem [Wed, 18 Jan 2012 08:33:18 +0000 (08:33 +0000)]
Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148383 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPa...
Pete Cooper [Wed, 18 Jan 2012 04:16:16 +0000 (04:16 +0000)]
Fix ISD::REG_SEQUENCE to accept physical registers and change TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148377 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThumb2 load/store fixups don't set the thumb bit.
Jim Grosbach [Wed, 18 Jan 2012 00:40:25 +0000 (00:40 +0000)]
Thumb2 load/store fixups don't set the thumb bit.

Load/store instructions w/ a fixup to be relative a function marked as thumb
don't use the low bit to specify thumb vs. non-thumb like interworking
branches do, so don't set it when dealing with those fixups.

rdar://10348687.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148366 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove some ARM specific MCAssmebler bits into the ARMAsmBackend.
Jim Grosbach [Wed, 18 Jan 2012 00:23:57 +0000 (00:23 +0000)]
Move some ARM specific MCAssmebler bits into the ARMAsmBackend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148364 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a CoveredBySubRegs property to Register descriptions.
Jakob Stoklund Olesen [Wed, 18 Jan 2012 00:16:39 +0000 (00:16 +0000)]
Add a CoveredBySubRegs property to Register descriptions.

When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148363 91177308-0d34-0410-b5e6-96231b3b80d8

12 years ago[lit] Add a --filter option which is useful when dealing with virtual test
Daniel Dunbar [Wed, 18 Jan 2012 00:03:12 +0000 (00:03 +0000)]
[lit] Add a --filter option which is useful when dealing with virtual test
paths.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148362 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove unneeded include.
Jakub Staszak [Tue, 17 Jan 2012 23:53:08 +0000 (23:53 +0000)]
Remove unneeded include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148360 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoImplement ARMBaseRegisterInfo::getCallPreservedMask().
Jakob Stoklund Olesen [Tue, 17 Jan 2012 23:09:00 +0000 (23:09 +0000)]
Implement ARMBaseRegisterInfo::getCallPreservedMask().

Move ARM callee-saved lists into ARMCallingConv.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148357 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix MCJIT memory leak of owned TargetMachine.
Jim Grosbach [Tue, 17 Jan 2012 23:08:46 +0000 (23:08 +0000)]
Fix MCJIT memory leak of owned TargetMachine.

The JIT is expected to take ownership of the TM that's passed in. The MCJIT
wasn't freeing it, resulting in leaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148356 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove X86 callee saved register lists to the X86CallConv .td file.
Jakob Stoklund Olesen [Tue, 17 Jan 2012 22:47:01 +0000 (22:47 +0000)]
Move X86 callee saved register lists to the X86CallConv .td file.

Add a trivial implementation of the getCallPreservedMask() hook.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148347 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd TableGen support for callee saved registers.
Jakob Stoklund Olesen [Tue, 17 Jan 2012 22:46:58 +0000 (22:46 +0000)]
Add TableGen support for callee saved registers.

Targets can now add CalleeSavedRegs defs to their *CallingConv.td file.
TableGen will use this to create a *_SaveList array suitable for
returning from getCalleeSavedRegs() as well as a *_RegMask bit mask
suitable for returning from getCallPreservedMask().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148346 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTest case rename
Andrew Trick [Tue, 17 Jan 2012 22:27:45 +0000 (22:27 +0000)]
Test case rename

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148344 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMove includes to the .cpp file.
Jakub Staszak [Tue, 17 Jan 2012 22:16:31 +0000 (22:16 +0000)]
Move includes to the .cpp file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148342 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMC tweak symbol difference resolution for non-local symbols.
Jim Grosbach [Tue, 17 Jan 2012 22:14:39 +0000 (22:14 +0000)]
MC tweak symbol difference resolution for non-local symbols.

When the non-local symbol in the expression is in the same fragment
as the second symbol, the assembler can still evaluate the expression
without needing a relocation.

For example, on ARM:
_foo:
ldr lr, (_foo - 4)

rdar://10348687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148341 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up.
Jim Grosbach [Tue, 17 Jan 2012 22:03:42 +0000 (22:03 +0000)]
Tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148339 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel syntax: Fix parser match class to check memory operand size.
Devang Patel [Tue, 17 Jan 2012 21:48:03 +0000 (21:48 +0000)]
Intel syntax: Fix parser match class to check memory operand size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148338 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTransform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.
Nadav Rotem [Tue, 17 Jan 2012 21:44:01 +0000 (21:44 +0000)]
Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148337 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoIntel syntax: Parse "BYTE PTR [RDX + RCX]"
Devang Patel [Tue, 17 Jan 2012 21:25:10 +0000 (21:25 +0000)]
Intel syntax: Parse "BYTE PTR [RDX + RCX]"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148334 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTrailing spaces.
Jakub Staszak [Tue, 17 Jan 2012 20:58:08 +0000 (20:58 +0000)]
Trailing spaces.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148332 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a new ObjC ARC optimization pass to eliminate unneeded
Dan Gohman [Tue, 17 Jan 2012 20:52:24 +0000 (20:52 +0000)]
Add a new ObjC ARC optimization pass to eliminate unneeded
autorelease push+pop pairs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148330 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a new PassManagerBuilder customization point,
Dan Gohman [Tue, 17 Jan 2012 20:51:32 +0000 (20:51 +0000)]
Add a new PassManagerBuilder customization point,
EP_ModuleOptimizerEarly, to allow passes to be added before the
main ModulePass optimizers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148329 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUntabify.
Devang Patel [Tue, 17 Jan 2012 19:09:22 +0000 (19:09 +0000)]
Untabify.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148322 91177308-0d34-0410-b5e6-96231b3b80d8