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Rename pattern for clarity.
author
Jim Grosbach
<grosbach@apple.com>
Wed, 18 Jan 2012 21:54:09 +0000
(21:54 +0000)
committer
Jim Grosbach
<grosbach@apple.com>
Wed, 18 Jan 2012 21:54:09 +0000
(21:54 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148422
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/ARM/ARMInstrThumb.td
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diff --git
a/lib/Target/ARM/ARMInstrThumb.td
b/lib/Target/ARM/ARMInstrThumb.td
index d55b08dc53e97d8cdd02c6859aaf5f8c1d3751af..30aa424343c4dd37dd644c1ad1fdf235746e74e7 100644
(file)
--- a/
lib/Target/ARM/ARMInstrThumb.td
+++ b/
lib/Target/ARM/ARMInstrThumb.td
@@
-672,10
+672,9
@@
def tLDRpci : T1pIs<(outs tGPR:$Rt), (ins t_addrmode_pc:$addr), IIC_iLoad_i,
}
// FIXME: Remove this entry when the above ldr.n workaround is fixed.
-// For disassembly use only.
-def tLDRpciDIS : T1pIs<(outs tGPR:$Rt), (ins t_addrmode_pc:$addr), IIC_iLoad_i,
- "ldr", "\t$Rt, $addr",
- [/* disassembly only */]>,
+// For assembly/disassembly use only.
+def tLDRpciASM : T1pIs<(outs tGPR:$Rt), (ins t_addrmode_pc:$addr), IIC_iLoad_i,
+ "ldr", "\t$Rt, $addr", []>,
T1Encoding<{0,1,0,0,1,?}> {
// A6.2 & A8.6.59
bits<3> Rt;