Thumb2 relaxation for tADR to t2ADR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148456 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 2a8f7c6dc4e84a2ae62c8d0ed354a28e74b77e9f..ed1ea21e553534200a77aeb14370a03b4173ef75 100644 (file)
--- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -154,6 +154,7 @@ static unsigned getRelaxedOpcode(unsigned Op) {
   default: return Op;
   case ARM::tBcc:       return ARM::t2Bcc;
   case ARM::tLDRpciASM: return ARM::t2LDRpci;
+  case ARM::tADR:       return ARM::t2ADR;
   }
 }
 
@@ -179,6 +180,7 @@ bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
     int64_t Offset = int64_t(Value) - 4;
     return Offset > 254 || Offset < -256;
   }
+  case ARM::fixup_thumb_adr_pcrel_10:
   case ARM::fixup_arm_thumb_cp: {
     // If the immediate is negative, greater than 1020, or not a multiple
     // of four, the wide version of the instruction must be used.