Silence warnings about mixing enums.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148495 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index ed1ea21e553534200a77aeb14370a03b4173ef75..55ea023d97ffb59a3a6b2455d12b97f09098a41d 100644 (file)
--- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -168,8 +168,7 @@ bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
                                          uint64_t Value,
                                          const MCInstFragment *DF,
                                          const MCAsmLayout &Layout) const {
-  switch (Fixup.getKind()) {
-  default: assert(0 && "Unexpected fixup kind in fixupNeedsRelaxation()!");
+  switch ((unsigned)Fixup.getKind()) {
   case ARM::fixup_arm_thumb_bcc: {
     // Relaxing tBcc to t2Bcc. tBcc has a signed 9-bit displacement with the
     // low bit being an implied zero. There's an implied +4 offset for the
@@ -188,7 +187,7 @@ bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup,
     return Offset > 1020 || Offset < 0 || Offset & 3;
   }
   }
-  llvm_unreachable("Invalid switch/cash!?");
+  llvm_unreachable("Unexpected fixup kind in fixupNeedsRelaxation()!");
 }
 
 void ARMAsmBackend::relaxInstruction(const MCInst &Inst, MCInst &Res) const {