"foo" is not a ppc instruction, don't try to parse it.
[oota-llvm.git] / lib / Target /
2014-02-13 Daniel SandersRe-commit: Demote EmitRawText call in AsmPrinter::EmitI...
2014-02-13 Tim NorthoverARM: remove floating-point patterns for @llvm.arm.neon...
2014-02-13 Oliver StannardAdd Cortex-A53 and Cortex-A57 cores to the AArch64...
2014-02-13 Hao Liu[AArch64]Fix the problems that can't select mul/add...
2014-02-13 Hao Liu[AArch64]Add support for spilling FPR8/FPR16.
2014-02-12 Andrea Di Biagio[Vectorizer] Add a new 'OperandValueKind' in TargetTran...
2014-02-12 Andrea Di Biagio[X86] Teach the backend how to lower vector shift left...
2014-02-12 Daniel SandersRevert r201237+r201238: Demote EmitRawText call in...
2014-02-12 Daniel SandersDemote EmitRawText call in AsmPrinter::EmitInlineAsm...
2014-02-12 Benjamin KramerR600: Always implement both versions of isTruncateFree...
2014-02-12 Craig TopperMark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly...
2014-02-11 Evan ChengTweak ARM fastcc by adopting these two AAPCS rules:
2014-02-11 Matt ArsenaultR600/SI: Fix assertion on infinite loops.
2014-02-11 Jim GrosbachARM: Thumb2 LDR(literal) can target SP.
2014-02-11 Robert LyttonXCore target: fix const section handling
2014-02-11 Robert Lytton XCore target: Lower ATOMIC_LOAD & ATOMIC_STORE
2014-02-11 Elena DemikhovskyAVX: fixed a bug in LowerVECTOR_SHUFFLE
2014-02-11 Elena DemikhovskyAVX-512: Optimized BUILD_VECTOR pattern;
2014-02-10 Matt ArsenaultR600: Implement isTruncateFree
2014-02-10 Tom StellardR600/SI: Initialize M0 and emit S_WQM_B64 whenever...
2014-02-10 Tom StellardR600/SI: Only use S_WQM_B64 in pixel shaders
2014-02-10 Tim NorthoverARM: use natural LLVM IR for vshll instructions
2014-02-10 Chad Rosier[AArch64] Handle aliases of conditional branches withou...
2014-02-10 Oliver StannardARM: r12 is callee-saved for interrupt handlers
2014-02-10 Tim NorthoverARM: use LLVM IR to represent the vshrn operation
2014-02-10 Matheus Almeida[mips][msa] Add DLSA instruction.
2014-02-10 Matheus Almeida[mips][msa] Make LSA_DESC a parameterizable class.
2014-02-10 Elena DemikhovskyAVX-512: Fixed extract_vector_elt for v16i1 and v8i1...
2014-02-10 Craig TopperRecommit r201059 and r201060 with hopefully a fix for...
2014-02-10 Bob WilsonRevert r201059 and r201060.
2014-02-10 Hao Liu[AArch64]Implement the copy of two FPR8 registers by...
2014-02-10 Craig TopperAdd MRMXr/MRMXm form to X86 for use by instructions...
2014-02-09 Rafael EspindolaUse a consistent argument order in TargetLoweringObject...
2014-02-08 Rafael EspindolaPass the Mangler by reference.
2014-02-08 Rafael EspindolaAdd LLVM_OVERRIDE to a few declarations.
2014-02-07 Rafael EspindolaRemove dead code.
2014-02-07 Renato GolinRemove -arm-disable-ehabi option
2014-02-07 Sasa Stankovic[mips] Forbid the use of registers t6, t7 and t8 if...
2014-02-07 Oliver StannardLLVM-1163: AAPCS-VFP violation when CPRC allocated...
2014-02-07 Venkatraman Govind... [Sparc] Add support for parsing synthetic instruction...
2014-02-07 Venkatraman Govind... [Sparc] Emit correct encoding for atomic instructions...
2014-02-07 Venkatraman Govind... [Sparc] Emit relocations for Thread Local Storage ...
2014-02-07 Venkatraman Govind... [Sparc] Emit correct relocations for PIC code when...
2014-02-07 Venkatraman Govind... [Sparc] Use SparcMCExpr::VariantKind itself as MachineO...
2014-02-07 Jim GrosbachX86: Resolve a long standing FIXME and properly isel...
2014-02-06 Evan ChengRevert r200095 and r200152. It turns out when compiling...
2014-02-06 Tom StellardR600/SI: Add a MUBUF store pattern for Reg+Imm offsets
2014-02-06 Tom StellardR600/SI: Add a MUBUF store pattern for Imm offsets
2014-02-06 Tom StellardR600/SI: Add a MUBUF load pattern for Reg+Imm offsets
2014-02-06 Tom StellardR600/SI: Use immediates offsets for SMRD instructions...
2014-02-06 David PeixottoRemove const_cast for STI when parsing inline asm
2014-02-06 Tim NorthoverX86: add costs for 64-bit vector ext/trunc & rebalance
2014-02-06 Tim NorthoverX86: deduplicate V[SZ]EXT_MOVL and V[SZ]EXT nodes
2014-02-06 Kevin EnderbyUpdate the X86 assembler for .intel_syntax to accept
2014-02-06 Rafael Espindoladon't set HasReliableSymbolDifference for ELF.
2014-02-06 Rafael EspindoladoesSectionRequireSymbols is meaningless on ELF, remove.
2014-02-06 Rafael EspindolaJust returning false is the default.
2014-02-05 Matt ArsenaultAdd address space argument to allowsUnalignedMemoryAccess.
2014-02-05 Rafael EspindolaRemove support for not using .loc directives.
2014-02-05 Petar Jovanovic[mips] Add NaCl target and forbid indexed loads and...
2014-02-05 Elena DemikhovskyAVX-512: optimized icmp -> sext -> icmp pattern
2014-02-05 Logan ChienARM: Resolve thumb_bl fixup in same MCFragment.
2014-02-05 Elena DemikhovskyAVX-512: fixed a bug in EVEX encoding (the bug appeared...
2014-02-05 Michel DanzerR600/SI: Add pattern for zero-extending i1 to i32
2014-02-05 Kai NackeARM: Enable use of relocation type tlsldo in debug...
2014-02-05 Craig TopperMove matching for x86 BMI BLSI/BLSMSK/BLSR instructions...
2014-02-05 Elena DemikhovskyAVX-512: Added intrinsic for cvtph2ps.
2014-02-04 Benjamin KramerSimplifyLibCalls: Push TLI through the exp2->ldexp...
2014-02-04 Lang Hames[X86] Only 213 FMA3 variants should be marked commutable.
2014-02-04 Duncan P. N. Exon... cleanup: scc_iterator consumers should use isAtEnd
2014-02-04 Petar Jovanovic[mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2...
2014-02-04 Rafael EspindolaEvery target uses .align. Simplify.
2014-02-04 Rafael EspindolaUse the default values.
2014-02-04 David PeixottoFix PR18345: ldr= pseudo instruction produces incorrect...
2014-02-04 Tom StellardR600/SI: Expand i1 BR_CC
2014-02-04 Tom StellardR600/SI: Don't assume copies will be coalesced in SIFix...
2014-02-04 Tom StellardR600/SI: Custom lower i64 ISD::SELECT
2014-02-04 Tom StellardR600: Enable vector fpow.
2014-02-04 Tim NorthoverOS X: the correct function is __sincospif_stret, not...
2014-02-04 Tim NorthoverARM & AArch64: merge NEON absolute compare intrinsics
2014-02-04 Tim NorthoverARM: fix fast-isel assertion failure
2014-02-04 Michel DanzerR600/SI: Fix fneg for 0.0
2014-02-04 Kai NackeRevert: ARM: Enable use of relocation type tlsldo in...
2014-02-04 Kai NackeARM: Enable use of relocation type tlsldo in debug...
2014-02-03 Matt ArsenaultAdd DEBUG_TYPE to SIAnnotateControlFlow
2014-02-03 Tim NorthoverAArch64 & ARM: refactor crypto intrinsics to take scalars
2014-02-03 Craig TopperRemove unnecessary include of AArch64GenInstrInfo.inc...
2014-02-02 Joerg SonnenbergerUnaligned access is supported on ARMv6 and ARMv7 for...
2014-02-02 Craig TopperMerge x86 HasOpSizePrefix/HasOpSize16Prefix into a...
2014-02-02 Craig TopperMerge HasVEXPrefix/HasEVEXPrefix/HasXOPPrefix into...
2014-02-02 Hal FinkelReplace PPC instruction-size code with MCInstrDesc...
2014-02-02 Matt ArsenaultR600/SI: Fix insertelement with dynamic indices.
2014-02-01 Venkatraman Govind... [Sparc] Set %o7 as the return address register instead...
2014-02-01 Arnold SchwaighoferARMTTI: We don't have 16 allocatable scalar registers
2014-02-01 Craig TopperSimplify some x86 format classes and remove some ambigu...
2014-01-31 Reid KlecknerImplement inalloca codegen for x86 with the new inalloc...
2014-01-31 Reid KlecknerDon't put non-static allocas in the static alloca map
2014-01-31 Rafael EspindolaRemove another hasRawTextSupport.
2014-01-31 Rafael EspindolaRemove the last hasRawTextSupport call from R600.
2014-01-31 Rafael EspindolaReplace another use with hasRawTextSupport+EmitRawText...
next