projects / oota-llvm.git / search
? search:
summary | shortlog | log | commit | commitdiff | tree
first ⋅ prev ⋅ next
R600: Fix a rare bug where swizzle optimization returns wrong values
2013-07-09 Vincent LejeuneR600: Fix a rare bug where swizzle optimization returns...
commit | commitdiff | tree
2013-07-09 Vincent LejeuneR600: Fix wrong export reswizzling
 commit | commitdiff | tree
2013-07-09 Vincent LejeuneR600: Use DAG lowering pass to handle fcos/fsin
 commit | commitdiff | tree
2013-07-09 Vincent LejeuneR600: Print Export Swizzle
 commit | commitdiff | tree
2013-06-30 Vincent LejeuneR600: Fix an unitialized variable in R600InstrInfo.cpp
 commit | commitdiff | tree
2013-06-29 Vincent LejeuneR600: Support schedule and packetization of trans-only...
commit | commitdiff | tree
2013-06-29 Vincent LejeuneR600: Bank Swizzle now display SCL equivalent
 commit | commitdiff | tree
2013-06-17 Vincent LejeuneR600: PV stores Reg id, not index
 commit | commitdiff | tree
2013-06-17 Vincent LejeuneR600: Properly set COUNT_3 bit in TEX clause initiating...
commit | commitdiff | tree
2013-06-07 Vincent LejeuneR600: Use a refined heuristic to choose when switching...
commit | commitdiff | tree
2013-06-07 Vincent LejeuneR600: Anti dep better handled in tex clause
 commit | commitdiff | tree
2013-06-07 Vincent LejeuneR600: Remove an extra break in R600OptimizeVectorRegisters.cpp
 commit | commitdiff | tree
2013-06-06 Vincent LejeuneR600: Rewrite an awkward loop in R600MachineScheduler
 commit | commitdiff | tree
2013-06-06 Vincent LejeuneR600: Remove leftover code in R600MachineScheduler.cpp
 commit | commitdiff | tree
2013-06-05 Vincent LejeuneR600: Add a pass that merge Vector Register
 commit | commitdiff | tree
2013-06-05 Vincent LejeuneR600: Schedule copy from phys register at beginning...
commit | commitdiff | tree
2013-06-04 Vincent LejeuneR600: Add a pass that merge Vector Register
 commit | commitdiff | tree
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4
 commit | commitdiff | tree
2013-06-04 Vincent LejeuneR600: Swizzle texture/export instructions
 commit | commitdiff | tree
2013-06-04 Vincent LejeuneR600: Add a test for r183108
 commit | commitdiff | tree
2013-06-03 Vincent LejeuneR600: 3 op instructions have no write bit but the result...
commit | commitdiff | tree
2013-06-03 Vincent LejeuneR600: CALL_FS consumes a stack size entry
 commit | commitdiff | tree
2013-06-03 Vincent LejeuneR600: use capital letter for PV channel
 commit | commitdiff | tree
2013-06-03 Vincent LejeuneR600: Constraints input regs of interp_xy,_zw
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Lower int_load_input to copyFromReg instead of...
commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Use bottom up scheduling algorithm
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Use depth first scheduling algorithm
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Replace big texture opcode switch in scheduler...
commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4.
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Improve texture handling
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Rename 128 bit registers.
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Some factorization
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: Factorize Fetch size limit inside AMDGPUSubTarget
 commit | commitdiff | tree
2013-05-17 Vincent LejeuneR600: prettier dump of clamp
 commit | commitdiff | tree
2013-05-02 Vincent LejeuneR600: Signed literals are 64bits wide
 commit | commitdiff | tree
2013-05-02 Vincent LejeuneR600: If previous bundle is dot4, PV valid chan is...
commit | commitdiff | tree
2013-05-02 Vincent LejeuneR600: Add a test to check that use_kill is emitted
 commit | commitdiff | tree
2013-05-02 Vincent LejeuneR600: Improve asmPrint of ALU clause
 commit | commitdiff | tree
2013-05-02 Vincent LejeuneR600: Prettier asmPrint of Alu
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: fix loop-address.ll test
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Always use texture cache for compute shaders
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: use native for alu
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Packetize instructions
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Rework Scheduling to handle difference between...
commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Add a Bank Swizzle operand
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Take inner dependency into tex/vtx clauses
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Turn TEX/VTX into native instructions
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote...
v2[Vincent Lejeune]: Split FetchInst into usesTextureCache...
commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Add some new processor variants
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: Clean up instruction class definitions
 commit | commitdiff | tree
2013-04-30 Vincent LejeuneR600: config section now reports use of killgt
 commit | commitdiff | tree
2013-04-23 Vincent LejeuneR600: Use .AMDGPU.config section to emit stacksize
 commit | commitdiff | tree
2013-04-23 Vincent LejeuneR600: Add CF_END
 commit | commitdiff | tree
2013-04-17 Vincent LejeuneR600: Make Export Instruction not duplicable
 commit | commitdiff | tree
2013-04-17 Vincent LejeuneR600: Export is emitted as a CF_NATIVE inst
 commit | commitdiff | tree
2013-04-17 Vincent LejeuneR600: Emit used GPRs count
 commit | commitdiff | tree
2013-04-10 Vincent LejeuneR600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when...
commit | commitdiff | tree
2013-04-08 Vincent LejeuneR600: Control Flow support for pre EG gen
 commit | commitdiff | tree
2013-04-04 Vincent LejeuneR600: Use a mask for offsets when encoding instructions
 commit | commitdiff | tree
2013-04-04 Vincent LejeuneR600: Fix wrong address when substituting ENDIF
 commit | commitdiff | tree
2013-04-04 Vincent LejeuneR600: Take export into account when computing cf address
 commit | commitdiff | tree
2013-04-03 Vincent LejeuneR600: Fix last ALU of a clause being emitted in a separate...
commit | commitdiff | tree
2013-04-03 Vincent LejeuneR600: Factorize maximum alu per clause in a single...
commit | commitdiff | tree
2013-04-03 Vincent LejeuneR600: Simplify data structure and add DEBUG to R600ControlFl...
commit | commitdiff | tree
2013-04-03 Vincent LejeuneR600: Consider KILLGT as an ALU instruction
 commit | commitdiff | tree
2013-04-01 Vincent LejeuneR600: Add support for native control flow
 commit | commitdiff | tree
2013-04-01 Vincent LejeuneR600/SI: Share code recording ShaderTypeAttribute between...
commit | commitdiff | tree
2013-04-01 Vincent LejeuneR600: Emit CF_ALU and use true kcache register.
 commit | commitdiff | tree
2013-03-31 Vincent LejeuneR600: Emit native instructions for tex
 commit | commitdiff | tree
2013-03-14 Vincent LejeuneR600: Factorize code handling Const Read Port limitation
 commit | commitdiff | tree
2013-03-13 Vincent LejeuneR600: Remove unused Outputs variable
 commit | commitdiff | tree
2013-03-11 Vincent LejeuneR600: Fix JUMP handling so that MachineInstr verification...
commit | commitdiff | tree
2013-03-08 Vincent LejeuneR600: Change addresspace in fold-kcache.ll
 commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: Do not predicate vector op
 commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: initial scheduler code
Vincent Lejeune:
Vincent Lejeune: [v2]
Vincent Lejeune: [v3]
 commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: Remove LowerConstCopyPass and lower CONST_COPY...
commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: Turn BUILD_VECTOR into Reg_Sequence
 commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: CONST_ADDRESS node is not marked as mayLoad anymore
 commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: Use MUL_IEEE for trig/fdiv intrinsic
 commit | commitdiff | tree
2013-03-05 Vincent LejeuneR600: Add support for indirect addressing of non default...
commit | commitdiff | tree
2013-02-18 Vincent LejeuneR600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for...
commit | commitdiff | tree
2013-02-18 Vincent LejeuneR600: Support for TBO
 commit | commitdiff | tree
2013-02-18 Vincent LejeuneR600: Increase number of ArrayBase Reg to 32
 commit | commitdiff | tree
2013-02-14 Vincent LejeuneR600: Do not fold single instruction with more that...
commit | commitdiff | tree
2013-02-14 Vincent LejeuneR600: Export instructions are no longer terminator
 commit | commitdiff | tree
2013-02-14 Vincent LejeuneR600: Fold zero/one in export instructions
 commit | commitdiff | tree
2013-02-14 Vincent LejeuneR600: Do not fold modifier/litterals in vector inst
 commit | commitdiff | tree
2013-02-10 Vincent LejeuneTest Commit - Remove some trailing whitespace in R600Instruc...
commit | commitdiff | tree
C/C++ LLVM-based compilers that forbids OOTA behaviors