oota-llvm.git
10 years agoblockfreq: Implement Pass::releaseMemory()
Duncan P. N. Exon Smith [Tue, 25 Mar 2014 18:01:38 +0000 (18:01 +0000)]
blockfreq: Implement Pass::releaseMemory()

Implement Pass::releaseMemory() in BlockFrequencyInfo and
MachineBlockFrequencyInfo.  Just delete the private implementation when
not in use.  Switch to a std::unique_ptr to make the logic more clear.

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204741 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoblockfreq: Use const in MachineBlockFrequencyInfo
Duncan P. N. Exon Smith [Tue, 25 Mar 2014 18:01:32 +0000 (18:01 +0000)]
blockfreq: Use const in MachineBlockFrequencyInfo

<rdar://problem/14292693>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204740 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86TTI] Make constant base pointers for getElementPtr opaque.
Juergen Ributzka [Tue, 25 Mar 2014 18:01:25 +0000 (18:01 +0000)]
[X86TTI] Make constant base pointers for getElementPtr opaque.

If getElementPtr uses a constant as base pointer, then make the constant opaque.
This prevents constant folding it with the offset. The offset can usually be
encoded in the load/store instruction itself and the base address doesn't have
to be rematerialized several times.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204739 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Stackmaps][X86TTI] Fix think-o in getIntImmCost calculation.
Juergen Ributzka [Tue, 25 Mar 2014 18:01:23 +0000 (18:01 +0000)]
[Stackmaps][X86TTI] Fix think-o in getIntImmCost calculation.

The cost for the first four stackmap operands was always TCC_Free.
This is only true for the first two operands. All other operands
are TCC_Free if they are within 64bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204738 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[DAG] Keep the opaque constant flag when performing unary constant folding operations.
Juergen Ributzka [Tue, 25 Mar 2014 18:01:20 +0000 (18:01 +0000)]
[DAG] Keep the opaque constant flag when performing unary constant folding operations.

Usually opaque constants shouldn't be folded, unless they are simple unary
operations that don't create new constants. Although this shouldn't drop the
opaque constant flag. This commit fixes this.

Related to <rdar://problem/14774662>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204737 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] Generate VPSHUFB for in-place v16i16 shuffles
Adam Nemet [Tue, 25 Mar 2014 17:47:06 +0000 (17:47 +0000)]
[X86] Generate VPSHUFB for in-place v16i16 shuffles

This used to resort to splitting the 256-bit operation into two 128-bit
shuffles and then recombining the results.

Fixes <rdar://problem/16167303>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204735 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] Factor out new helper getPSHUFB
Adam Nemet [Tue, 25 Mar 2014 17:47:03 +0000 (17:47 +0000)]
[X86] Factor out new helper getPSHUFB

I found three implementations of this.  This splits it out into a new function
and uses it from the three places.

My plan is to add a fourth use when lowering a vector_shuffle:v16i16.

Compared the assembly output of test/CodeGen/X86 before and after.

The only change is due to how the first PSHUFB was generated in
LowerVECTOR_SHUFFLEv8i16.  If the shuffle mask specified undef (i.e. -1), the
old implementation would write -1 * 2 and -1 * 2 + 1 (254 and 255) in the
control mask.  Now we write 0x80.  These are of course interchangeable since
bit 7 decides if a constant zero is written in the result byte.  The other
instances of this code use 0x80 consistently.

Related to <rdar://problem/16167303>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204734 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[InstCombine] Don't fold bitcast into store if it would need addrspacecast
Richard Osborne [Tue, 25 Mar 2014 17:21:41 +0000 (17:21 +0000)]
[InstCombine] Don't fold bitcast into store if it would need addrspacecast

Summary:
Previously the code didn't check if the before and after types for the
store were pointers to different address spaces. This resulted in
instcombine using a bitcast to convert between pointers to different
address spaces, causing an assertion due to the invalid cast.

It is not be appropriate to use addrspacecast this case because it is
not guaranteed to be a no-op cast. Instead bail out and do not do the
transformation.

CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D3117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204733 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReuse earlier variables to make it clear the types involved in the cast.
Richard Osborne [Tue, 25 Mar 2014 17:21:35 +0000 (17:21 +0000)]
Reuse earlier variables to make it clear the types involved in the cast.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204732 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd missing slash to make the doxygen output less confusing.
Benjamin Kramer [Tue, 25 Mar 2014 17:20:28 +0000 (17:20 +0000)]
Add missing slash to make the doxygen output less confusing.

PR19187.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204731 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Add failing testcase for <3 x i32> stores.
Matt Arsenault [Tue, 25 Mar 2014 16:50:55 +0000 (16:50 +0000)]
R600: Add failing testcase for <3 x i32> stores.

This is supposed to have the same store size and alignment as <4 x i32>,
but currently is split into a 64-bit and 32-bit store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204729 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoScalarEvolution: Compute exit counts for loops with a power-of-2 step.
Benjamin Kramer [Tue, 25 Mar 2014 16:25:12 +0000 (16:25 +0000)]
ScalarEvolution: Compute exit counts for loops with a power-of-2 step.

If we have a loop of the form
for (unsigned n = 0; n != (k & -32); n += 32) {}
then we know that n is always divisible by 32 and the loop must
terminate. Even if we have a condition where the loop counter will
overflow it'll always hold this invariant.

PR19183. Our loop vectorizer creates this pattern and it's also
occasionally formed by loop counters derived from pointers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204728 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix creating illegal setcc cond codes.
Matt Arsenault [Tue, 25 Mar 2014 16:09:21 +0000 (16:09 +0000)]
Fix creating illegal setcc cond codes.

If GT/UGT or LT/ULT were set to expand, a comparison
with a constant would replace it with the illegal
cond code.

There are several more places later in this function that
will have the same basic problem.

Theoretically R600 should hit this problem for a test,
but for some reason it doesn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204727 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[msan] Relax the test some more.
Evgeniy Stepanov [Tue, 25 Mar 2014 14:32:05 +0000 (14:32 +0000)]
[msan] Relax the test some more.

This may or may not fix the bots. R204720 did not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204721 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[msan] Make some tests less strict.
Evgeniy Stepanov [Tue, 25 Mar 2014 14:15:14 +0000 (14:15 +0000)]
[msan] Make some tests less strict.

This may or may not fix the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204720 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix these tests on windows.
Rafael Espindola [Tue, 25 Mar 2014 13:19:03 +0000 (13:19 +0000)]
Fix these tests on windows.

It is impossible to create a hard link to a non existing file, so create a
dummy file, create the link an delete the dummy file.

On windows one cannot remove the current directory, so chdir first.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204719 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[msan] More precise instrumentation of select IR.
Evgeniy Stepanov [Tue, 25 Mar 2014 13:08:34 +0000 (13:08 +0000)]
[msan] More precise instrumentation of select IR.

Some bits of select result may be initialized even if select condition
is not.

https://code.google.com/p/memory-sanitizer/issues/detail?id=50

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204716 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] '.set at=$0' should be equivalent to '.set noat'
Daniel Sanders [Tue, 25 Mar 2014 13:01:06 +0000 (13:01 +0000)]
[mips] '.set at=$0' should be equivalent to '.set noat'

Differential Revision: http://llvm-reviews.chandlerc.com/D3171

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204714 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix AVX2 Gather execution domains.
Cameron McInally [Tue, 25 Mar 2014 12:36:38 +0000 (12:36 +0000)]
Fix AVX2 Gather execution domains.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204713 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Correct testcase for .set at=$reg and emit the new warnings for numeric regist...
Daniel Sanders [Tue, 25 Mar 2014 11:16:03 +0000 (11:16 +0000)]
[mips] Correct testcase for .set at=$reg and emit the new warnings for numeric registers too.

Summary:
Remove the XFAIL added in my previous commit and correct the test such that
it correctly tests the expansion of the assembler temporary.

Also added a test to check that $at is always $1 when written by the
user.

Corrected the new assembler temporary warnings so that they are emitted for
numeric registers too.

Differential Revision: http://llvm-reviews.chandlerc.com/D3169

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204711 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Fix assembler temporary expansion and add associated warnings about the use...
Daniel Sanders [Tue, 25 Mar 2014 10:57:07 +0000 (10:57 +0000)]
[mips] Fix assembler temporary expansion and add associated warnings about the use of $at.

Summary:
The assembler temporary is normally $at ($1) but can be reassigned using
'.set at=$reg'. Regardless of which register is nominated as the assembler
temporary, $at remains $1 when written by the user.

Adds warnings under the following conditions:
* The register nominated as the assembler temporary is used by the user.
* '.set noat' is in effect and $at is used by the user.
Both of these only work for named registers. I have a follow up commit that makes it work for numeric registers as well.

XFAIL set-at-directive.s since it incorrectly tests that $at is redefined by
'.set at=$reg'. Testcases will follow in a separate commit.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3167

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204710 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove cmake module support for Visual C++ 2010 (MSVC10)
Yaron Keren [Tue, 25 Mar 2014 09:34:20 +0000 (09:34 +0000)]
Remove cmake module support for Visual C++ 2010 (MSVC10)
but keep the MSVC11 (Visual C++ 2012) support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204706 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSimplify loop that worked around bugs in old GCC/Xcode.
Erik Verbruggen [Tue, 25 Mar 2014 09:06:18 +0000 (09:06 +0000)]
Simplify loop that worked around bugs in old GCC/Xcode.

GCC 4.0.1 and Xcode 2 are no longer supported for building llvm/clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204705 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDisable Visual C++ warning 4722 about aborting a destructor,
Yaron Keren [Tue, 25 Mar 2014 08:42:49 +0000 (08:42 +0000)]
Disable Visual C++ warning 4722 about aborting a destructor,
it has no value for us.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204704 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWinCOFF: Add support for -fdata-sections
David Majnemer [Tue, 25 Mar 2014 06:14:26 +0000 (06:14 +0000)]
WinCOFF: Add support for -fdata-sections

This is a pretty straight forward translation for COFF, we just need to
stick the data in a COMDAT section marked as
IMAGE_COMDAT_SELECT_NODUPLICATES.

N.B. We must be careful to avoid sticking entities with private linkage
in COMDAT groups.  COFF is pretty hostile to the renaming of entities so
we must be careful to disallow GlobalVariables with unstable names.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204703 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Add GNU_addr_base and GNU_ranges_base only when there are addresses or...
David Blaikie [Tue, 25 Mar 2014 05:34:24 +0000 (05:34 +0000)]
DebugInfo: Add GNU_addr_base and GNU_ranges_base only when there are addresses or ranges

Based on code review feedback from Eric in r204672.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204702 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotest: fix CHECK lines
Saleem Abdulrasool [Tue, 25 Mar 2014 03:39:39 +0000 (03:39 +0000)]
test: fix CHECK lines

Thanks to gix for pointing out that the CHECK-LABEL lines were incorrect!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204700 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSLP vectorizer: Don't hoist vector extracts of phis.
Andrew Trick [Tue, 25 Mar 2014 02:18:47 +0000 (02:18 +0000)]
SLP vectorizer: Don't hoist vector extracts of phis.

Extracts coming from phis were being hoisted, while all others were
sunk to their uses. This was inconsistent and didn't seem to serve a
purpose. Changing all extracts to be sunk to uses is a prerequisite
for adding block frequency to the SLP vectorizer's cost model.

I benchmarked the change in isolation (without block frequency). I
only saw noise on x86 and some potentially significant improvements on
ARM. No major regressions is good enough for me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204699 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Support debug_loc under fission
David Blaikie [Tue, 25 Mar 2014 01:44:02 +0000 (01:44 +0000)]
DebugInfo: Support debug_loc under fission

Implement debug_loc.dwo, as well as llvm-dwarfdump support for dumping
this section.

Outlined in the DWARF5 spec and http://gcc.gnu.org/wiki/DebugFission the
debug_loc.dwo section has more variation than the standard debug_loc,
allowing 3 different forms of entry (plus the end of list entry). GCC
seems to, and Clang certainly, only use one form, so I've just
implemented dumping support for that for now.

It wasn't immediately obvious that there was a good refactoring to share
the implementation of dumping support between debug_loc and
debug_loc.dwo, so they're separate for now - ideas welcome or I may come
back to it at some point.

As per a comment in the code, we could choose different forms that may
reduce the number of debug_addr entries we emit, but that will require
further study.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204697 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Remove unnecessary zero-size check
David Blaikie [Tue, 25 Mar 2014 01:43:56 +0000 (01:43 +0000)]
DebugInfo: Remove unnecessary zero-size check

This seems excessive - switching section isn't expensive (or if it is
we're already being wasteful, since we emitted the debug_loc section
symbol earlier anyway) and otherwise there's no work that happens in
this function when the list is empty.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204696 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport: Functions for consuming endian specific data from a buffer.
Justin Bogner [Tue, 25 Mar 2014 01:04:44 +0000 (01:04 +0000)]
Support: Functions for consuming endian specific data from a buffer.

This adds a function to Endian.h that reads from and updates a pointer
into a buffer with endian specific data. This is more convenient for
stream-like reading of data than endian::read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204693 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRegister Allocator: check other options before using a CSR for the first time.
Manman Ren [Tue, 25 Mar 2014 00:16:25 +0000 (00:16 +0000)]
Register Allocator: check other options before using a CSR for the first time.

When register allocator's stage is RS_Spill, we choose spill over using the CSR
for the first time, if the spill cost is lower than CSRCost.
When register allocator's stage is < RS_Split, we choose pre-splitting over
using the CSR for the first time, if the cost of splitting is lower than
CSRCost.

CSRCost is set with command-line option "regalloc-csr-first-time-cost". The
default value is 0 to generate the same codes as before this commit.

With a value of 15 (1 << 14 is the entry frequency), I measured performance
gain of 3% on 253.perlbmk and 1.7% on 197.parser, with instrumented PGO,
on an arm device.

rdar://16162005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204690 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix crashes when assembler directives are used that are not
Kevin Enderby [Tue, 25 Mar 2014 00:05:50 +0000 (00:05 +0000)]
Fix crashes when assembler directives are used that are not
for Mach-O object files by generating an error instead.

rdar://16335232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204687 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRegister Allocator: refactoring (no functionality change).
Manman Ren [Mon, 24 Mar 2014 23:23:42 +0000 (23:23 +0000)]
Register Allocator: refactoring (no functionality change).

Factor out two functions calculateRegionSplitCost and doRegionSplit
from tryRegionSplit. These two functions will be used in coming patches.

rdar://16162005

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204684 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Simplify debug loc list handling by keeping separate lists
David Blaikie [Mon, 24 Mar 2014 22:38:38 +0000 (22:38 +0000)]
DebugInfo: Simplify debug loc list handling by keeping separate lists

Rather than using a flat list with "empty" entries (ala the actual
on-disk format), keep separate lists for each variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204680 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDwarfDebug: Simplify debug_loc merging
David Blaikie [Mon, 24 Mar 2014 22:27:06 +0000 (22:27 +0000)]
DwarfDebug: Simplify debug_loc merging

No functional change intended.

Merging up-front rather than delaying this task until later. This just
seems simpler and more efficient (avoiding growing the debug loc list
only to have to skip over those post-merged entries, etc).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204679 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoGet rid of an unnecessary use of the * and & operators.
Adrian Prantl [Mon, 24 Mar 2014 21:33:01 +0000 (21:33 +0000)]
Get rid of an unnecessary use of the * and & operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204673 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Add DW_AT_GNU_ranges_base to skeleton CUs
David Blaikie [Mon, 24 Mar 2014 21:31:35 +0000 (21:31 +0000)]
DebugInfo: Add DW_AT_GNU_ranges_base to skeleton CUs

This is used to avoid relocations in the dwo file by allowing
DW_AT_ranges specified in debug_info.dwo to be relative to this base
address. (r204667 implements the base-relative DW_AT_ranges side of
this)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204672 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport: Document Endian.h functions
Justin Bogner [Mon, 24 Mar 2014 21:30:55 +0000 (21:30 +0000)]
Support: Document Endian.h functions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204671 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Implement relative addressing for DW_AT_ranges under fission
David Blaikie [Mon, 24 Mar 2014 21:07:27 +0000 (21:07 +0000)]
DebugInfo: Implement relative addressing for DW_AT_ranges under fission

This removes the debug_ranges relocations from debug_info.dwo (but
doesn't implement the DW_AT_GNU_ranges_base which is also necessary for
correct functioning)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204668 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Don't emit relocations to abbreviations in debug_info.dwo
David Blaikie [Mon, 24 Mar 2014 20:53:02 +0000 (20:53 +0000)]
DebugInfo: Don't emit relocations to abbreviations in debug_info.dwo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204667 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDwarfDebug: Remove an unused parameter
David Blaikie [Mon, 24 Mar 2014 20:31:01 +0000 (20:31 +0000)]
DwarfDebug: Remove an unused parameter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204665 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Don't viewCFG() under DEBUG() except on failure.
Matt Arsenault [Mon, 24 Mar 2014 20:29:02 +0000 (20:29 +0000)]
R600: Don't viewCFG() under DEBUG() except on failure.

Having these popping up every time you use -debug is really
irritating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204664 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove unused parameter
David Blaikie [Mon, 24 Mar 2014 20:28:10 +0000 (20:28 +0000)]
Remove unused parameter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204663 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Fix extra mov from legalizing 64-bit SALU ops.
Matt Arsenault [Mon, 24 Mar 2014 20:08:13 +0000 (20:08 +0000)]
R600/SI: Fix extra mov from legalizing 64-bit SALU ops.

Check the register class of each operand individually
to avoid an extra copy to a vgpr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204662 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Sub-optimial fix for 64-bit immediates with SALU ops.
Matt Arsenault [Mon, 24 Mar 2014 20:08:09 +0000 (20:08 +0000)]
R600/SI: Sub-optimial fix for 64-bit immediates with SALU ops.

No longer asserts, but now you get moves loading legal immediates
into the split 32-bit operations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204661 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Fix 64-bit bit ops that require the VALU.
Matt Arsenault [Mon, 24 Mar 2014 20:08:05 +0000 (20:08 +0000)]
R600/SI: Fix 64-bit bit ops that require the VALU.

Try to match scalar and first like the other instructions.
Expand 64-bit ands to a pair of 32-bit ands since that is not
available on the VALU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204660 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoIn Release modes, Visual Studio complains that the Operator destructor in User.cpp
Yaron Keren [Mon, 24 Mar 2014 19:48:13 +0000 (19:48 +0000)]
In Release modes, Visual Studio complains that the Operator destructor in User.cpp
never returns, which is true by design.

Initially assumed that the reason is llvm_unreachable being dependent on NDEBUG.

However, even if llvm_unreachable is replaced by __assume(false), VC still warns in
Release modes but not in Debug modes...

The real reason turned out to be optimization flags.
With /Od in Debug modes the warning is not issued whereas with /O1 it is.

I could not find any documentation to this effect, but it is reproducable:

Try compiling http://msdn.microsoft.com/en-us/library/khwfyc5d(v=vs.90).aspx
with /O1 and then with /Od.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204659 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement isNarrowingProfitable.
Matt Arsenault [Mon, 24 Mar 2014 19:43:31 +0000 (19:43 +0000)]
R600: Implement isNarrowingProfitable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204658 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Move splitting 64-bit immediates to separate function.
Matt Arsenault [Mon, 24 Mar 2014 18:26:52 +0000 (18:26 +0000)]
R600/SI: Move splitting 64-bit immediates to separate function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204651 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdding some very nascent information about the clang tablegen backends, with a promis...
Aaron Ballman [Mon, 24 Mar 2014 18:18:31 +0000 (18:18 +0000)]
Adding some very nascent information about the clang tablegen backends, with a promise to add more information later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204635 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Generate little-endian object files
Ulrich Weigand [Mon, 24 Mar 2014 18:16:09 +0000 (18:16 +0000)]
[PowerPC] Generate little-endian object files

As a first step towards real little-endian code generation, this patch
changes the PowerPC MC layer to actually generate little-endian object
files.  This involves passing the little-endian flag through the various
layers, including down to createELFObjectWriter so we actually get basic
little-endian ELF objects, emitting instructions in little-endian order,
and handling fixups and relocations as appropriate for little-endian.

The bulk of the patch is to update most test cases in test/MC/PowerPC
to verify both big- and little-endian encodings.  (The only test cases
*not* updated are those that create actual big-endian ABI code, like
the TLS tests.)

Note that while the object files are now little-endian, the generated
code itself is not yet updated, in particular, it still does not adhere
to the ELFv2 ABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204634 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86][ISelDAG] Add missing fallback patterns for avx2 broadcast instructions.
Quentin Colombet [Mon, 24 Mar 2014 17:54:19 +0000 (17:54 +0000)]
[X86][ISelDAG] Add missing fallback patterns for avx2 broadcast instructions.
Those patterns are used when the load cannot be folded into the related broadcast
during the select phase.
This happens when the load gets additional uses that were not anticipated during
the previous lowering phases (constant vector to constant load, then constant
load reused) or when selection DAG is not able to prove that folding the load
will not create a cycle in the DAG.

<rdar://problem/16074331>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204631 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Fix 64-bit private loads.
Matt Arsenault [Mon, 24 Mar 2014 17:50:46 +0000 (17:50 +0000)]
R600/SI: Fix 64-bit private loads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204630 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoVS integration installer: set SUCCESS=1 if we find VS 2013
Hans Wennborg [Mon, 24 Mar 2014 17:33:22 +0000 (17:33 +0000)]
VS integration installer: set SUCCESS=1 if we find VS 2013

Previously we would print an error message on machines where the only VS
version we find is 2013, even though we successfully install the integration
files for it.

Also, we shouldn't have two END labels.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204629 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd test to test/CodeGen/NVPTX for "alloca buffer" arguments.
Eli Bendersky [Mon, 24 Mar 2014 16:52:30 +0000 (16:52 +0000)]
Add test to test/CodeGen/NVPTX for "alloca buffer" arguments.

Make sure such IR gets properly lowered to PTX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204624 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] Fix non-determinism in LowerVectorAllZeroTest
Adam Nemet [Mon, 24 Mar 2014 16:52:08 +0000 (16:52 +0000)]
[X86] Fix non-determinism in LowerVectorAllZeroTest

This can be observed with the old testcase of CodeGen/X86/pr12312.ll:

47c47
<       vorps   %ymm0, %ymm1, %ymm0
---
>       vorps   %ymm1, %ymm0, %ymm0
97c97
<       vorps   %ymm1, %ymm0, %ymm0
---
>       vorps   %ymm0, %ymm1, %ymm0

The vector VecIns is populated with all the values from VecInMap. This is done
while iterating VecInMap.  VecInMap uses a hash of pointer values so the
resulting order can vary depending on the memory layout.

The fix is to populate the vector VecIns earlier as VecInMap is populated.
This is done in DAG traversal order.

Fixes <rdar://problem/16398806>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204623 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Add error message when trying to use $at in '.set noat' mode.
Daniel Sanders [Mon, 24 Mar 2014 16:48:01 +0000 (16:48 +0000)]
[mips] Add error message when trying to use $at in '.set noat' mode.

Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204621 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemoves the NVPTXSplitBBatBar pass.
Eli Bendersky [Mon, 24 Mar 2014 16:36:39 +0000 (16:36 +0000)]
Removes the NVPTXSplitBBatBar pass.

This pass is a historic remnant and actually causes less efficient code to be
generated in some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204620 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Fix warning with gcc 4.8.2
Tom Stellard [Mon, 24 Mar 2014 16:12:34 +0000 (16:12 +0000)]
R600/SI: Fix warning with gcc 4.8.2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204618 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Promote fp64 SELECT to i64
Tom Stellard [Mon, 24 Mar 2014 16:07:30 +0000 (16:07 +0000)]
R600/SI: Promote fp64 SELECT to i64

This type promotion is replacing a Tablegen pattern and it is already
covered by existing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204617 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSelectionDAG: Allow promotion of SELECT nodes from float to int types
Tom Stellard [Mon, 24 Mar 2014 16:07:28 +0000 (16:07 +0000)]
SelectionDAG: Allow promotion of SELECT nodes from float to int types

And vice-versa, as long as the types are the same width.

There are a few R600 tests that will cover this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204616 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Reorganize tablegen instruction definitions
Tom Stellard [Mon, 24 Mar 2014 16:07:25 +0000 (16:07 +0000)]
R600: Reorganize tablegen instruction definitions

Each GPU family now has its own file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204615 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PPC64LE] ELFv2 ABI updates for the .opd section
Will Schmidt [Mon, 24 Mar 2014 16:04:15 +0000 (16:04 +0000)]
[PPC64LE] ELFv2 ABI updates for the .opd section

[PPC64LE] ELFv2 ABI updates for the .opd section
The PPC64 Little Endian (PPC64LE) target supports the ELFv2 ABI, and as
such, does not have a ".opd" section.  This is keyed off a _CALL_ELF=2
macro check.

The CALL_ELF check is not clearly documented at this time.  The basis
for usage in this patch is from the gcc thread here:
http://gcc.gnu.org/ml/gcc-patches/2013-11/msg01144.html

> Adding comment from Uli:
Looks good to me.  I think the old-style JIT doesn't really work
anyway for 64-bit, but at least with this patch LLVM will compile
and link again on a ppc64le host ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204614 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Add regression tests for parenthetic expressions in MIPS assembly.
Daniel Sanders [Mon, 24 Mar 2014 15:42:21 +0000 (15:42 +0000)]
[mips] Add regression tests for parenthetic expressions in MIPS assembly.

Summary:
These expressions already worked but weren't tested.

Patch by Robert N. M. Watson and David Chisnall (it was originally two patches)
Their work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204612 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Allow dsubu to take an immediate as an alias for dsubiu.
Daniel Sanders [Mon, 24 Mar 2014 15:38:00 +0000 (15:38 +0000)]
[mips] Allow dsubu to take an immediate as an alias for dsubiu.

Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3155

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204611 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Mark many instructions as commutative
Hal Finkel [Mon, 24 Mar 2014 15:07:28 +0000 (15:07 +0000)]
[PowerPC] Mark many instructions as commutative

I'm under the impression that we used to infer the isCommutable flag from the
instruction-associated pattern. Regardless, we don't seem to do this (at least
by default) any more. I've gone through all of our instruction definitions, and
marked as commutative all of those that should be trivial to commute (by
exchanging the first two operands). There has been special code for the RL*
instructions, and that's not changed.

Before this change, we had the following commutative instructions:

 RLDIMI
 RLDIMIo
 RLWIMI
 RLWIMI8
 RLWIMI8o
 RLWIMIo
 XSADDDP
 XSMULDP
 XVADDDP
 XVADDSP
 XVMULDP
 XVMULSP

After:

 ADD4
 ADD4o
 ADD8
 ADD8o
 ADDC
 ADDC8
 ADDC8o
 ADDCo
 ADDE
 ADDE8
 ADDE8o
 ADDEo
 AND
 AND8
 AND8o
 ANDo
 CRAND
 CREQV
 CRNAND
 CRNOR
 CROR
 CRXOR
 EQV
 EQV8
 EQV8o
 EQVo
 FADD
 FADDS
 FADDSo
 FADDo
 FMADD
 FMADDS
 FMADDSo
 FMADDo
 FMSUB
 FMSUBS
 FMSUBSo
 FMSUBo
 FMUL
 FMULS
 FMULSo
 FMULo
 FNMADD
 FNMADDS
 FNMADDSo
 FNMADDo
 FNMSUB
 FNMSUBS
 FNMSUBSo
 FNMSUBo
 MULHD
 MULHDU
 MULHDUo
 MULHDo
 MULHW
 MULHWU
 MULHWUo
 MULHWo
 MULLD
 MULLDo
 MULLW
 MULLWo
 NAND
 NAND8
 NAND8o
 NANDo
 NOR
 NOR8
 NOR8o
 NORo
 OR
 OR8
 OR8o
 ORo
 RLDIMI
 RLDIMIo
 RLWIMI
 RLWIMI8
 RLWIMI8o
 RLWIMIo
 VADDCUW
 VADDFP
 VADDSBS
 VADDSHS
 VADDSWS
 VADDUBM
 VADDUBS
 VADDUHM
 VADDUHS
 VADDUWM
 VADDUWS
 VAND
 VAVGSB
 VAVGSH
 VAVGSW
 VAVGUB
 VAVGUH
 VAVGUW
 VMADDFP
 VMAXFP
 VMAXSB
 VMAXSH
 VMAXSW
 VMAXUB
 VMAXUH
 VMAXUW
 VMHADDSHS
 VMHRADDSHS
 VMINFP
 VMINSB
 VMINSH
 VMINSW
 VMINUB
 VMINUH
 VMINUW
 VMLADDUHM
 VMULESB
 VMULESH
 VMULEUB
 VMULEUH
 VMULOSB
 VMULOSH
 VMULOUB
 VMULOUH
 VNMSUBFP
 VOR
 VXOR
 XOR
 XOR8
 XOR8o
 XORo
 XSADDDP
 XSMADDADP
 XSMAXDP
 XSMINDP
 XSMSUBADP
 XSMULDP
 XSNMADDADP
 XSNMSUBADP
 XVADDDP
 XVADDSP
 XVMADDADP
 XVMADDASP
 XVMAXDP
 XVMAXSP
 XVMINDP
 XVMINSP
 XVMSUBADP
 XVMSUBASP
 XVMULDP
 XVMULSP
 XVNMADDADP
 XVNMADDASP
 XVNMSUBADP
 XVNMSUBASP
 XXLAND
 XXLNOR
 XXLOR
 XXLXOR

This is a by-inspection change, and I'm not sure how to write a reliable test
case. I would like advice on this, however.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204609 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Implement shorthand add / sub forms for MIPS.
Daniel Sanders [Mon, 24 Mar 2014 14:05:39 +0000 (14:05 +0000)]
[mips] Implement shorthand add / sub forms for MIPS.

Summary:
- If only two registers are passed to a three-register operation, then the
  first argument is both source and destination register.

- If a non-register is passed as the last argument, generate the immediate
  version of the instruction.

Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

CC: theraven
Differential Revision: http://llvm-reviews.chandlerc.com/D3148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204605 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[NVPTX] Add isel patterns for addrspacecast
Justin Holewinski [Mon, 24 Mar 2014 11:17:53 +0000 (11:17 +0000)]
[NVPTX] Add isel patterns for addrspacecast

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204600 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUpdate release notes with EHABI current behaviour
Renato Golin [Mon, 24 Mar 2014 11:02:38 +0000 (11:02 +0000)]
Update release notes with EHABI current behaviour

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204598 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Don't schedule VSX copy legalization unless VSX is enabled
Hal Finkel [Mon, 24 Mar 2014 09:51:41 +0000 (09:51 +0000)]
[PowerPC] Don't schedule VSX copy legalization unless VSX is enabled

There is no need to schedule this extra pass if it will have nothing to do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204594 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Update comment re: VSX copy-instruction selection
Hal Finkel [Mon, 24 Mar 2014 09:36:36 +0000 (09:36 +0000)]
[PowerPC] Update comment re: VSX copy-instruction selection

I've done some experimentation with this, and it looks like using the
lower-latency (but lower throughput) copy instruction is essentially always the
right thing to do.

My assumption is that, in order to be relatively sure that the higher-latency
copy will increase throughput, we'd want to have it unlikely to be in-flight
with its use. On the P7, the global completion table (GCT) can hold a maximum
of 120 instructions, shared among all active threads (up to 4), giving 30
instructions per thread.  So specifically, I'd require at least that many
instructions between the copy and the use before the high-latency variant is
used.

Trying this, however, over the entire test suite resulted in zero cases where
the high-latency form would be preferable. This may be a consequence of the
fact that the scheduler views copies as free, and so they tend to end up close
to their uses. For this experiment I created a function:

  unsigned chooseVSXCopy(MachineBasicBlock &MBB,
                         MachineBasicBlock::iterator I,
                         unsigned DestReg, unsigned SrcReg,
                         unsigned StartDist = 1,
                         unsigned Depth = 3) const;

with an implementation like:

  if (!Depth)
    return PPC::XXLOR;

  const unsigned MaxDist = 30;
  unsigned Dist = StartDist;
  for (auto J = I, JE = MBB.end(); J != JE && Dist <= MaxDist; ++J) {
    if (J->isTransient() && !J->isCopy())
      continue;

    if (J->isCall() || J->isReturn() || J->readsRegister(DestReg, TRI))
      return PPC::XXLOR;

    ++Dist;
  }

  // We've exceeded the required distance for the high-latency form, use it.
  if (Dist > MaxDist)
    return PPC::XVCPSGNDP;

  // If this is only an exit block, use the low-latency form.
  if (MBB.succ_empty())
    return PPC::XXLOR;

  // We've reached the end of the block, check the successor blocks (up to some
  // depth), and use the high-latency form if that is okay with all successors.
  for (auto J = MBB.succ_begin(), JE = MBB.succ_end(); J != JE; ++J) {
    if (chooseVSXCopy(**J, (*J)->begin(), DestReg, SrcReg,
                      Dist, --Depth) == PPC::XXLOR)
      return PPC::XXLOR;
  }

  // All of our successor blocks seem okay with the high-latency variant, so
  // we'll use it.
  return PPC::XVCPSGNDP;

and then changed the copy opcode selection from:
    Opc = PPC::XXLOR;
to:
    Opc = chooseVSXCopy(MBB, std::next(I), DestReg, SrcReg);

In conclusion, I'm removing the FIXME from the comment, because I believe that
there is, at least absent other examples, nothing to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204591 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTeach llvm-readobj to print human friendly description of reserved sections.
Rafael Espindola [Mon, 24 Mar 2014 05:00:34 +0000 (05:00 +0000)]
Teach llvm-readobj to print human friendly description of reserved sections.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204584 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAllow constant folding of ceil function whenever feasible
Karthik Bhat [Mon, 24 Mar 2014 04:36:06 +0000 (04:36 +0000)]
Allow constant folding of ceil function whenever feasible

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204583 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd back tests that were reverted in r204203.
Rafael Espindola [Mon, 24 Mar 2014 03:48:15 +0000 (03:48 +0000)]
Add back tests that were reverted in r204203.

They pass again with the fix in r204581.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204582 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPropagate section from base to derived symbol.
Rafael Espindola [Mon, 24 Mar 2014 03:43:21 +0000 (03:43 +0000)]
Propagate section from base to derived symbol.

We were already propagating the section in

a = b

With this patch we also propagate it for

a = b + 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204581 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoInstrProf: Silence spurious warnings in GCC 4.8
Duncan P. N. Exon Smith [Mon, 24 Mar 2014 00:47:18 +0000 (00:47 +0000)]
InstrProf: Silence spurious warnings in GCC 4.8

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204580 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupportTests.LockFileManagerTest: Add assertions for Win32.
NAKAMURA Takumi [Sun, 23 Mar 2014 23:55:57 +0000 (23:55 +0000)]
SupportTests.LockFileManagerTest: Add assertions for Win32.

  - create_link doesn't work for nonexistent file.
  - remove cannot remove working directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204579 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: no need to update SplatBits as it is not used
Arnaud A. de Grandmaison [Sun, 23 Mar 2014 21:14:32 +0000 (21:14 +0000)]
ARM: no need to update SplatBits as it is not used

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204575 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-profdata: Check for bad data in the show command
Justin Bogner [Sun, 23 Mar 2014 20:55:53 +0000 (20:55 +0000)]
llvm-profdata: Check for bad data in the show command

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204573 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-profdata: Use Format.h instead of handrolling a formatter
Justin Bogner [Sun, 23 Mar 2014 20:43:50 +0000 (20:43 +0000)]
llvm-profdata: Use Format.h instead of handrolling a formatter

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204571 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWinCOFF: Add support for -ffunction-sections
David Majnemer [Sun, 23 Mar 2014 17:47:39 +0000 (17:47 +0000)]
WinCOFF: Add support for -ffunction-sections

This is a pretty straight forward translation for COFF, we just need to
stick the function in a COMDAT section marked as
IMAGE_COMDAT_SELECT_NODUPLICATES.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204565 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoremove a bunch of unused private methods
Nuno Lopes [Sun, 23 Mar 2014 17:09:26 +0000 (17:09 +0000)]
remove a bunch of unused private methods
found with a smarter version of -Wunused-member-function that I'm playwing with.
Appologies in advance if I removed someone's WIP code.

 include/llvm/CodeGen/MachineSSAUpdater.h            |    1
 include/llvm/IR/DebugInfo.h                         |    3
 lib/CodeGen/MachineSSAUpdater.cpp                   |   10 --
 lib/CodeGen/PostRASchedulerList.cpp                 |    1
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp    |   10 --
 lib/IR/DebugInfo.cpp                                |   12 --
 lib/MC/MCAsmStreamer.cpp                            |    2
 lib/Support/YAMLParser.cpp                          |   39 ---------
 lib/TableGen/TGParser.cpp                           |   16 ---
 lib/TableGen/TGParser.h                             |    1
 lib/Target/AArch64/AArch64TargetTransformInfo.cpp   |    9 --
 lib/Target/ARM/ARMCodeEmitter.cpp                   |   12 --
 lib/Target/ARM/ARMFastISel.cpp                      |   84 --------------------
 lib/Target/Mips/MipsCodeEmitter.cpp                 |   11 --
 lib/Target/Mips/MipsConstantIslandPass.cpp          |   12 --
 lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp              |   21 -----
 lib/Target/NVPTX/NVPTXISelDAGToDAG.h                |    2
 lib/Target/PowerPC/PPCFastISel.cpp                  |    1
 lib/Transforms/Instrumentation/AddressSanitizer.cpp |    2
 lib/Transforms/Instrumentation/BoundsChecking.cpp   |    2
 lib/Transforms/Instrumentation/MemorySanitizer.cpp  |    1
 lib/Transforms/Scalar/LoopIdiomRecognize.cpp        |    8 -
 lib/Transforms/Scalar/SCCP.cpp                      |    1
 utils/TableGen/CodeEmitterGen.cpp                   |    2
 24 files changed, 2 insertions(+), 261 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204560 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Make use of VSX f64 <-> i64 conversion instructions
Hal Finkel [Sun, 23 Mar 2014 05:35:00 +0000 (05:35 +0000)]
[PowerPC] Make use of VSX f64 <-> i64 conversion instructions

When VSX is available, these instructions should be used in preference to the
older variants that only have access to the scalar floating-point registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204559 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r204076 for now - it caused significant regressions in a number of
Lang Hames [Sun, 23 Mar 2014 04:22:31 +0000 (04:22 +0000)]
Revert r204076 for now - it caused significant regressions in a number of
benchmarks.

<rdar://problem/16368461>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204558 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoInstrProf: Check pointer size in raw profile
Duncan P. N. Exon Smith [Sun, 23 Mar 2014 03:38:12 +0000 (03:38 +0000)]
InstrProf: Check pointer size in raw profile

Since the profile can come from 32-bit machines, we need to check the
pointer size.  Change the magic number to facilitate this.

Adds tests for reading 32-bit and 64-bit binaries (both big- and
little-endian).  The tests write a binary using printf in RUN lines
(like raw-magic-but-no-header.test).  Assuming the bots don't complain,
this seems like a better way forward for testing RawInstrProfReader than
committing binary files.

<rdar://problem/16400648>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204557 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPropagate types from symbol to aliases.
Rafael Espindola [Sun, 23 Mar 2014 03:33:20 +0000 (03:33 +0000)]
Propagate types from symbol to aliases.

This is similar, but not identical to what gas does. The logic in MC is to just
compute the symbol table after parsing the entire file. GAS is mixed, given

.type b, @object
a = b
b:
.type b, @function

It will propagate the change and make 'a' a function. Given

.type b, @object
b:
a = b
.type b, @function

the type of 'a' is still object.

Since we do the computation in the end, we produce a function in both cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204555 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[CMake] LLVMProfileData: No need to add LINK_LIBS here. LLVMBuild should do.
NAKAMURA Takumi [Sun, 23 Mar 2014 01:23:36 +0000 (01:23 +0000)]
[CMake] LLVMProfileData: No need to add LINK_LIBS here. LLVMBuild should do.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204553 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-profdata doesn't require LLVMCore.
NAKAMURA Takumi [Sun, 23 Mar 2014 01:23:26 +0000 (01:23 +0000)]
llvm-profdata doesn't require LLVMCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204552 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-profdata: Don't pipe stderr into show for the tests
Justin Bogner [Sat, 22 Mar 2014 23:53:43 +0000 (23:53 +0000)]
llvm-profdata: Don't pipe stderr into show for the tests

Some text shows up on stderr when using guard malloc, and this test
was trying to treat that as input to llvm-profdata show. There's no
reason to pipe stderr into show at all here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204549 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPrune includes in ARM target.
Craig Topper [Sat, 22 Mar 2014 23:51:00 +0000 (23:51 +0000)]
Prune includes in ARM target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204548 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM IAS: properly handle function entries in .thumb
Saleem Abdulrasool [Sat, 22 Mar 2014 19:26:18 +0000 (19:26 +0000)]
ARM IAS: properly handle function entries in .thumb

When a label is parsed, check if there is type information available for the
label.  If so, check if the symbol is a function.  If the symbol is a function
and we are in thumb mode and no explicit thumb_func has been emitted, adjust the
symbol data to indicate that the function definition is a thumb function.

The application of this inferencing is improved value handling in the object
file (the required thumb bit is set on symbols which are thumb functions).  It
also helps improve compatibility with binutils.

The one complication that arises from this handling is the MCAsmStreamer.  The
default implementation of getOrCreateSymbolData in MCStreamer does not support
tracking the symbol data.  In order to support the semantics of thumb functions,
track symbol data in assembly streamer.  Although O(n) in number of labels in
the TU, this is already done in various other streamers and as such the memory
overhead is not a practical concern in this scenario.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204544 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Fix the VSX v2f64 return register
Hal Finkel [Sat, 22 Mar 2014 18:24:43 +0000 (18:24 +0000)]
[PowerPC] Fix the VSX v2f64 return register

v2f64 values, like other 128-bit values, are returned under VSX in register
vs34 (Altivec register v2).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204543 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[TableGen] Don't assert, produce an error, when an instruction has too few operands
Hal Finkel [Sat, 22 Mar 2014 11:33:32 +0000 (11:33 +0000)]
[TableGen] Don't assert, produce an error, when an instruction has too few operands

When an instruction's operand list does not have a sufficient number of
operands to match with all of the variables that contribute to its
encoding, instead of asserting inside a call to getSubOperandNumber, produce an
informative error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204542 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-profdata: Avoid F_Text in "merge" for now, since "llvm-profdata show" is confuse...
NAKAMURA Takumi [Sat, 22 Mar 2014 05:38:22 +0000 (05:38 +0000)]
llvm-profdata: Avoid F_Text in "merge" for now, since "llvm-profdata show" is confused with CRLF.

FIXME: line_iterator should be tolerant of CR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204540 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Constant Hoisting] Erase dead cast instructions.
Juergen Ributzka [Sat, 22 Mar 2014 01:49:30 +0000 (01:49 +0000)]
[Constant Hoisting] Erase dead cast instructions.

The cleanup code that removes dead cast instructions only removed them from the
basic block, but didn't delete them. This fix erases them now too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204538 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[Constant Hoisting] Fix multiple entries for the same basic block in PHI nodes.
Juergen Ributzka [Sat, 22 Mar 2014 01:49:27 +0000 (01:49 +0000)]
[Constant Hoisting] Fix multiple entries for the same basic block in PHI nodes.

A PHI node usually has only one value/basic block pair per incoming basic block.
In the case of a switch statement it is possible that a following PHI node may
have more than one such pair per incoming basic block. E.g.:
%0 = phi i64 [ 123456, %case2 ], [ 654321, %Entry ], [ 654321, %Entry ]
This is valid and the verfier doesn't complain, because both values are the
same.

Constant hoisting materializes the constant for each operand separately and the
value is still the same, but the variable names have changed. As a result the
verfier can't recognize anymore that they are the same value and complains.

This fix adds special update code for PHI node in constant hoisting to prevent
this corner case.

This fixes <rdar://problem/16394449>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204537 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[DAG] Fix an assertion failure caused by an invalid cast in method 'BuildVectorSDNode...
Andrea Di Biagio [Sat, 22 Mar 2014 01:47:22 +0000 (01:47 +0000)]
[DAG] Fix an assertion failure caused by an invalid cast in method 'BuildVectorSDNode::isConstantSplat'

This patch renames method 'isConstantSplat' as 'getConstantSplatValue'
(mainly for consistency reasons), and rewrites its logic to ensure
that we always perform a legal 'cast<ConstantSDNode>'.

Added test shift-combine-crash.ll to verify that DAGCombiner no longer crashes with an assertion failure in the attempt to simplify a vector shift by a vector of all undef counts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204536 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSuppress SupportTests.LockFileManagerTest on win32 for investigating.
NAKAMURA Takumi [Sat, 22 Mar 2014 00:27:17 +0000 (00:27 +0000)]
Suppress SupportTests.LockFileManagerTest on win32 for investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204533 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDelete stale comment. Thanks, Eric!
Adrian Prantl [Fri, 21 Mar 2014 22:58:25 +0000 (22:58 +0000)]
Delete stale comment. Thanks, Eric!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204530 91177308-0d34-0410-b5e6-96231b3b80d8