[mips] Implement shorthand add / sub forms for MIPS.
authorDaniel Sanders <daniel.sanders@imgtec.com>
Mon, 24 Mar 2014 14:05:39 +0000 (14:05 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Mon, 24 Mar 2014 14:05:39 +0000 (14:05 +0000)
commit67db74e02c1608ceb6845db4a6a80f7804f26a6c
treeec07050f3e0bfc33ebe96550fa3fd5f5d14ab16d
parentb8cb7098582e980529713fc00b6da96c45be4cf5
[mips] Implement shorthand add / sub forms for MIPS.

Summary:
- If only two registers are passed to a three-register operation, then the
  first argument is both source and destination register.

- If a non-register is passed as the last argument, generate the immediate
  version of the instruction.

Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

CC: theraven
Differential Revision: http://llvm-reviews.chandlerc.com/D3148

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204605 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsSchedule.td
test/MC/Mips/mips-alu-instructions.s
test/MC/Mips/mips64-alu-instructions.s