Convert test to FileCheck. NFC.
[oota-llvm.git] / test /
2014-12-29 Rafael EspindolaConvert test to FileCheck. NFC.
2014-12-29 Colin LeMahieu[Hexagon] Renaming old multiclass for removal. Adding...
2014-12-29 Rafael EspindolaAdd segmented stack support for DragonFlyBSD.
2014-12-28 NAKAMURA Takumillvm/test/CodeGen/X86/fast-isel-call-bool.ll: Add expli...
2014-12-28 Keno Fischer[X86][ISel] Fix a regression I introduced in r224884
2014-12-28 Michael Kuperstein[X86] Add missing memory variants to AVX false dependen...
2014-12-28 Andrea Di Biagio[CodeGenPrepare] Teach when it is profitable to specula...
2014-12-28 Elena DemikhovskyScalarizer for masked load and store intrinsics.
2014-12-27 David MajnemerPowerPC: CTR shouldn't fire if a TLS call is in the...
2014-12-27 Keno Fischer[FastIsel][X86] Fix invalid register replacement for...
2014-12-26 Rafael EspindolaConvert test to llvm-readobj. NFC.
2014-12-26 Colin LeMahieu[Hexagon] Adding auto-incrementing loads with and witho...
2014-12-26 Colin LeMahieu[Hexagon] Adding locked loads.
2014-12-26 Colin LeMahieu[Hexagon] Adding deallocframe and circular addressing...
2014-12-26 Colin LeMahieu[Hexagon] Adding remaining post-increment instruction...
2014-12-26 Colin LeMahieu[Hexagon] Adding post-increment unsigned byte loads.
2014-12-26 Colin LeMahieu[Hexagon] Adding post-increment signed byte loads with...
2014-12-26 Rafael EspindolaUse llvm-readobj. NFC.
2014-12-26 Craig Topper[X86] Add the debug registers DR8-DR15 so we can assemb...
2014-12-26 Craig Topper[X86] Don't fail disassembly if REX.R/REX.B is used...
2014-12-26 Timur IskhodzhanovBand-aid fix for PR22032: don't emit DWARF debug info...
2014-12-26 Rafael EspindolaNo need to run llvm-as. NFC.
2014-12-26 David MajnemerInstCombine: Infer nuw for multiplies
2014-12-26 David MajnemerInstCombe: Infer nsw for multiplies
2014-12-26 Craig TopperTeach disassembler to handle illegal immediates on...
2014-12-25 Hal Finkel[PowerPC] [FastISel] i1 constants must be zero extended
2014-12-25 Elena DemikhovskyMasked Load/Store - Changed the order of parameters...
2014-12-24 David MajnemerCodeGen: Error on redefinitions instead of asserting
2014-12-24 David MajnemerCodeGen: Allow aliases to be overridden by variables
2014-12-24 David MajnemerMC: Label definitions are permitted after .set directives
2014-12-24 Saleem AbdulrasoolIAS: correct debug line info for asm macros
2014-12-24 David MajnemerMC: Don't emit .no_dead_strip on targets which don...
2014-12-24 Peter Zotov[OCaml] PR21901: Update tests.
2014-12-24 Peter Zotov[OCaml] Expose Llvm_executionengine.get_{global_value...
2014-12-24 Adrian PrantlDebug Info: In symmetry to DW_TAG_pointer_type, do...
2014-12-23 Kevin EnderbyAdd printing the LC_THREAD load commands with llvm...
2014-12-23 Kostya Serebryany[asan] change the coverage collection scheme so that...
2014-12-23 Hal Finkel[PowerPC] Ensure that the TOC reload directly follows...
2014-12-23 Colin LeMahieu[Hexagon] Adding doubleword load.
2014-12-23 Colin LeMahieu[Hexagon] Reapplying 224775 load words.
2014-12-23 Jozef Kolek[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB...
2014-12-23 Colin LeMahieuReverting 224775 until mayLoad flag is addressed.
2014-12-23 Rafael EspindolaFinish removing DestroySource.
2014-12-23 Colin LeMahieu[Hexagon] Adding word loads.
2014-12-23 Colin LeMahieu[Hexagon] Adding signed halfword loads.
2014-12-23 Jozef Kolek[mips][microMIPS] Implement LWSP and SWSP instructions
2014-12-23 Michael Kuperstein[ValueTracking] Move GlobalAlias handling to be after...
2014-12-23 Elena DemikhovskyAVX-512: Added FMA instructions, intrinsics an tests...
2014-12-23 Hal Finkel[PowerPC] Don't mark the return-address slot as immutable
2014-12-23 Elena DemikhovskyAVX-512: BLENDM - fixed encoding of the broadcast version
2014-12-23 Michael Kuperstein[DagCombine] Improve DAGCombiner BUILD_VECTOR when...
2014-12-23 Hal Finkel[PowerPC] Don't attempt a 64-bit pow2 division on PPC32
2014-12-23 Michael Liao[SimplifyCFG] Revise common code sinking
2014-12-23 Ahmed Bougacha[ARM] Don't break alignment when combining base updates...
2014-12-23 Chandler CarruthRevert r224739: Debug info: Teach SROA how to update...
2014-12-23 Jim GrosbachX86: Don't over-align combined loads.
2014-12-22 Reid KlecknerMake musttail more robust for vector types on x86
2014-12-22 Adrian PrantlThumb1 frame lowering: Mark CFI instructions with the...
2014-12-22 Bruno Cardoso Lopes[LCSSA] Handle PHI insertion in disjoint loops
2014-12-22 Adrian PrantlDebug info: Teach SROA how to update debug info for...
2014-12-22 Reid KlecknerFix Windows unwind info for functions in sections other...
2014-12-22 Colin LeMahieu[Hexagon] Adding memb instruction. Fixing whitespace...
2014-12-22 Colin LeMahieu[Hexagon] Adding classes and load unsigned byte instruc...
2014-12-22 Bruno Cardoso Lopes[x86] Add vector @llvm.ctpop intrinsic custom lowering
2014-12-22 Quentin Colombet[CodeGenPrepare] Handle properly the promotion of opera...
2014-12-22 Elena DemikhovskyAVX-512: Added all forms of BLENDM instructions,
2014-12-22 Karthik BhatLower multiply-negate operation to mneg on AArch64
2014-12-22 Rafael EspindolaConvert a few tests to FileCheck. NFC.
2014-12-21 Matt ArsenaultEnable (sext x) == C --> x == (trunc C) combine
2014-12-20 Saleem AbdulrasoolARM: further improve deprecated diagnosis (LDM)
2014-12-20 David MajnemerThis should have been part of r224676.
2014-12-20 David MajnemerInstCombine: Squash an icmp+select into bitwise arithmetic
2014-12-20 David MajnemerInstSimplify: Optimize away pointless comparisons
2014-12-20 Chandler Carruth[x86] Change the test added in r223774 to first check...
2014-12-19 Elena DemikhovskyMasked load and store codegen - fixed 128-bit vectors
2014-12-19 Matt ArsenaultR600/SI: Only form min/max with 1 use.
2014-12-19 Kevin EnderbyAdd printing the LC_ROUTINES load commands with llvm...
2014-12-19 Reid KlecknerAdd the ExceptionHandling::MSVC enumeration
2014-12-19 Sanjay PatelModel sqrtss as a binary operation with one source...
2014-12-19 Tom StellardR600/SI: Make sure non-inline constants aren't folded...
2014-12-19 Kevin EnderbyAdd printing the LC_SUB_CLIENT load command with llvm...
2014-12-19 Peter CollingbourneCodeGen: do not attempt to invalidate virtual registers...
2014-12-19 Colin LeMahieu[Hexagon] Removing old variants of instructions and...
2014-12-19 Sanjay Patelmerge consecutive stores of extracted vector elements
2014-12-19 Colin LeMahieu[Hexagon] Adding bit extraction and table indexing...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit insertion instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding more xtype shift instructions.
2014-12-19 Kevin EnderbyAdd printing the LC_SUB_LIBRARY load command with llvm...
2014-12-19 Colin LeMahieu[Hexagon] Adding xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding transfers to and from control registers.
2014-12-19 Bruno Cardoso LopesReapply: [InstCombine] Fix visitSwitchInst to use right...
2014-12-19 Sanjay Pateluse -0.0 when creating an fneg instruction
2014-12-19 Bruno Cardoso LopesRevert "[InstCombine] Fix visitSwitchInst to use right...
2014-12-19 Bruno Cardoso Lopes[InstCombine] Fix visitSwitchInst to use right operand...
2014-12-19 Juergen Ributzka[Object] Don't crash on empty export lists.
2014-12-19 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-18 David MajnemerConstantFold: Shifting undef by zero results in undef
2014-12-18 Colin LeMahieuReverting 224550, was not ready for commit.
2014-12-18 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-18 Kevin EnderbyAdd printing the LC_SUB_UMBRELLA load command with...
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