Make this test a bit more strict.
[oota-llvm.git] / test / CodeGen /
2014-10-21 Rafael EspindolaMake this test a bit more strict.
2014-10-20 Quentin Colombet[X86] Fix a bug in the lowering of the mask of VSELECT.
2014-10-20 Simon Pilgrim[X86] Memory folding for commutative instructions ...
2014-10-20 Tim NorthoverARM: rework Thumb1 frame index rewriting
2014-10-20 Gerolf Hoflehner[AArch64] test case for compfail fixed by r219748
2014-10-20 Oliver Stannard[ARM] Do not select SMULW[BT] or SMLAW[BT]
2014-10-20 Oliver Stannard[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex
2014-10-19 Bill Schmidt[PowerPC] Clean up -mattr=+vsx tests to always specify...
2014-10-19 Bill Schmidt[PowerPC] Temporarily disable VSX for PowerPC fast...
2014-10-19 Bill Schmidt[PowerPC] Re-enable VSX test line for fma.ll with ...
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw xchg
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw xor
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw or
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw min/umin
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw max/umax
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw and
2014-10-17 Aaron WatryR600/SI: Add global atomicrmw sub
2014-10-17 Aaron WatryR600/SI: Fix/add tests for atomicrmw add
2014-10-17 Aaron WatryR600: Rename atomic_load global tests to atomic_add
2014-10-17 Pete CooperCheck for dynamic alloca's when selecting lifetime...
2014-10-17 Bill Schmidt[PowerPC] Disable +vsx RUN line for fma.ll due to incon...
2014-10-17 Bill Schmidt[PowerPC] Change liveness testing in VSX FMA mutation...
2014-10-17 Matt ArsenaultR600/SI: Allow commuting with source modifiers
2014-10-17 Matt ArsenaultR600/SI: Allow comuting fp immediates
2014-10-17 Matt ArsenaultR600/SI: Remove SI_BUFFER_RSRC pseudo
2014-10-17 Juergen Ributzka[Stackmaps] Enable invoking the patchpoint intrinsic.
2014-10-17 Andrea Di Biagio[X86] Fix missed selection of non-temporal store of...
2014-10-17 James Molloy[AArch64] Fix a silent codegen fault in BUILD_VECTOR...
2014-10-17 Bill Schmidt[PowerPC] Enable use of lxvw4x/stxvw4x in VSX code...
2014-10-17 Jan VeselyR600: Add EG to FMA test
2014-10-17 Jan VeselySelectionDAG: Add sext_inreg optimizations
2014-10-17 Bill Schmidt[PPC] Adjust some PowerPC tests to account for presence...
2014-10-17 Akira HatanakaARM: Fix a bug which was causing convergence failure...
2014-10-16 Robin MorissetErase fence insertion from SelectionDAGBuilder.cpp...
2014-10-16 Matt ArsenaultR600: Fix nonsensical implementation of computeKnownBit...
2014-10-16 Rafael EspindolaDelete -std-compile-opts.
2014-10-16 Juergen Ributzka[AArch64] Fix miscompile of sdiv-by-power-of-2.
2014-10-16 Vasileios Kalintiris[mips] Account for endianess when expanding BuildPairF6...
2014-10-15 Adam Nemet[AVX512] Add DQ subvector inserts
2014-10-15 Adam Nemet[AVX512] Add SKX testing to avx512-insert-extract.ll
2014-10-15 Adam Nemet[AVX512] Fix test to produce a defined value
2014-10-15 Tom StellardR600/SI: Fix bug where immediates were being used in...
2014-10-15 Juergen RibutzkaReapply "[FastISel][AArch64] Add custom lowering for...
2014-10-15 Matt ArsenaultR600/SI: Also try to use 0 base for misaligned 8-byte...
2014-10-15 Matt ArsenaultR600: Fix miscompiles when BFE has multiple uses
2014-10-15 Juergen RibutzkaRevert "[FastISel][AArch64] Add custom lowering for...
2014-10-15 Jingyue Wu[MachineSink] Use the real post dominator tree
2014-10-14 Gerolf Hoflehner[AAarch64] Optimize CSINC-branch sequence
2014-10-14 Simon Pilgrim[X86][SSE] pslldq/psrldq shuffle mask decodes
2014-10-14 Tim NorthoverARM: remove ARM/Thumb distinction for preferred alignment.
2014-10-14 Tim NorthoverARM: allow misaligned local variables in Thumb1 mode.
2014-10-14 Juergen Ributzka[FastISel][AArch64] Add custom lowering for GEPs.
2014-10-14 Tim NorthoverARM: set preferred aggregate alignment to 32 universally.
2014-10-14 Juergen Ributzka[FastISel][AArch64] Fix sign-/zero-extend folding when...
2014-10-14 Jan VeselyReapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 Rafael EspindolaRevert "R600: Add new intrinsic to read work dimensions"
2014-10-14 Jan VeselyR600: Add new intrinsic to read work dimensions
2014-10-14 Matt ArsenaultR600/SI: Use DS offsets for constant addresses
2014-10-14 Bradley Smith[AArch64] Fix crash with empty/pseudo-only blocks in...
2014-10-14 Hao Liu[AArch64]Select wide immediate offset into [Base+XReg...
2014-10-13 Filipe CabecinhasFix a broadcast related regression on the vector shuffl...
2014-10-13 Renato GolinAdds support for the Cortex-A17 to the ARM backend
2014-10-13 Daniel Sanders[mips] Mark redundant instructions with a comment in...
2014-10-13 Bradley Smith[AArch64] Add workaround for Cortex-A53 erratum (835769)
2014-10-13 NAKAMURA TakumiRevert r219584, "[X86] Memory folding for commutative...
2014-10-12 Simon Pilgrim[X86] Memory folding for commutative instructions.
2014-10-12 NAKAMURA Takumillvm/test/CodeGen: Some tests don't REQUIRE asserts...
2014-10-11 Reed KotlerAdd basic conditional branches in mips fast-isel
2014-10-10 Matt ArsenaultR600/SI: Change how DS offsets are printed
2014-10-10 Matt ArsenaultR600/SI: Match read2/write2 stride 64 versions
2014-10-10 Matt ArsenaultR600/SI: Add load / store machine optimizer pass.
2014-10-10 Reed KotlerImplement floating point compare for mips fast-isel
2014-10-10 Reed Kotlerimplement integer compare in mips fast-isel
2014-10-10 Hal Finkel[MiSched] Fix a logic error in tryPressure()
2014-10-10 Reed KotlerImplement floating point to integer conversion in mips...
2014-10-09 Sanjay PatelImprove sqrt estimate algorithm (fast-math)
2014-10-09 Samuel AntaoFix bug in GPR to FPR moves in PPC64LE.
2014-10-09 Tom StellardR600/SI: Legalize CopyToReg during instruction selection
2014-10-09 Tom StellardR600/SI: Legalize INSERT_SUBREG instructions during...
2014-10-08 Adam Nemet[AVX512] Intrinsics for vextract*x4
2014-10-08 Robin Morisset[X86] Don't transform atomic-load-add into an inc/dec...
2014-10-08 Robin Morisset[X86] Avoid generating inc/dec when slow for x.atomic_s...
2014-10-08 Robert Khasanov[AVX512] Added intrinsics for 128-, 256- and 512-bit...
2014-10-08 Renato GolinEmit unaligned access build attribute for ARM
2014-10-08 Chad Rosier[AArch64] Generate vector signed/unsigned mul and mla...
2014-10-07 Robin Morisset[X86] Fix a bug with fetch_add(INT32_MIN)
2014-10-07 Tom StellardR600/SI: Remove assertion in SIInstrInfo::areLoadsFromS...
2014-10-07 Daniel Sanders[mips] Return {f128} correctly for N32/N64.
2014-10-07 Juergen Ributzka[FastISel][AArch64] Teach the address computation code...
2014-10-07 Juergen Ributzka[FastISel][AArch64] Teach the address computation to...
2014-10-07 Juergen Ributzka[FastISel][AArch64] Fix "Fold sign-/zero-extends into...
2014-10-06 Hal Finkel[DAGCombine] Remove SIGN_EXTEND-related inf-loop
2014-10-06 Sanjay PatelFast-math fold: x / (y * sqrt(z)) -> x * (rsqrt(z...
2014-10-05 Chandler Carruth[x86] Remove the 2-addr-to-3-addr "optimization" from...
2014-10-05 Chandler Carruth[x86, dag] Teach the DAG combiner to prune inputs toa...
2014-10-05 Benjamin KramerX86: Don't drop half of the mask when converting 2...
2014-10-05 Elena DemikhovskyAVX-512-SKX: Added instruction VPMOVM2B/W/D/Q.
2014-10-05 Chandler Carruth[x86] Fix PR21139, one of the last remaining regression...
2014-10-05 Chandler Carruth[x86] Teach the new vector shuffle lowering how to...
2014-10-04 Chandler Carruth[x86] Slap a triple on this test since it is poking...
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