ARM: set preferred aggregate alignment to 32 universally.

Before, ARM and Thumb mode code had different preferred alignments, which could
lead to some rather unexpected results. There's justification for reducing it
from the default 64-bits (wasted space), but I don't think there is for going
below 32-bits.

There's no actual ABI change here, just to reassure people.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219719 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp
index a3ade981740dbf37e7c3beb4eb5aac9bc33b5b9e..bc04f37331eb0cbce6c40959a7aa3533c7122254 100644 (file)
--- a/lib/Target/ARM/ARMSubtarget.cpp
+++ b/lib/Target/ARM/ARMSubtarget.cpp
@@ -123,10 +123,9 @@ static std::string computeDataLayout(ARMSubtarget &ST) {
   else
     Ret += "-v128:64:128";
 
-  // On thumb and APCS, only try to align aggregates to 32 bits (the default is
-  // 64 bits).
-  if (ST.isThumb() || ST.isAPCS_ABI())
-    Ret += "-a:0:32";
+  // Try to align aggregates to 32 bits (the default is 64 bits, which has no
+  // particular hardware support on 32-bit ARM).
+  Ret += "-a:0:32";
 
   // Integer registers are 32 bits.
   Ret += "-n32";

diff --git a/test/CodeGen/ARM/aggregate-align.ll b/test/CodeGen/ARM/aggregate-align.ll
new file mode 100644 (file)
index 0000000..22fc57c
--- /dev/null
+++ b/test/CodeGen/ARM/aggregate-align.ll
@@ -0,0 +1,6 @@
+; RUN: llc -mtriple=armv7-linux-gnueabi %s -o - | FileCheck %s
+
+@var = global {i8, i8} zeroinitializer
+
+; CHECK: .globl var
+; CHECK-NEXT: .align 2