[TableGen] Include header for each cpp file first. NFC
[oota-llvm.git] / test / CodeGen /
2015-05-25 Simon Pilgrim[X86][AVX2] Vectorized i16 shift operators
2015-05-25 Tom StellardR600/SI: Fix bug with v_interp_p1_f32 instructions...
2015-05-25 Kit BartonThis patch adds support for the vector quadword add...
2015-05-25 Michael Kuperstein[X86] When pattern-matching scalar FMA3 intrinsics...
2015-05-25 Elena DemikhovskyAdded promotion to EXTRACT_SUBVECTOR operand.
2015-05-24 Matt ArsenaultAdd target hook to allow merging stores of nonzero...
2015-05-23 Hal Finkel[PowerPC] Fix fast-isel when compare is split from...
2015-05-23 Akira HatanakaStop resetting NoFramePointerElim in TargetMachine...
2015-05-23 Akira HatanakaRemove unnecessary command line option "-disable-fp...
2015-05-23 Rafael EspindolaRevert "make reciprocal estimate code generation more...
2015-05-22 Ahmed Bougacha[AArch64][CGP] Sink zext feeding stxr/stlxr into the...
2015-05-22 Ahmed Bougacha[AArch64] Robustize atomic cmpxchg test a little more...
2015-05-22 Sanjay Patelmake reciprocal estimate code generation more flexible...
2015-05-22 Ahmed Bougacha[AArch64] Robustize atomic cmpxchg test. NFC.
2015-05-22 Quentin ColombetReapply r238011 with a fix for the trap instruction.
2015-05-22 NAKAMURA TakumiRevert r237954, "Resubmit r237708 (MIR Serialization...
2015-05-21 Peter CollingbourneRevert r237590, "ARM: allow jump tables to be placed...
2015-05-21 Chad Rosier[AArch64] Enhance the load/store optimizer with target...
2015-05-21 Alex LorenzResubmit r237708 (MIR Serialization: print and parse...
2015-05-21 Bill Schmidt[PPC64] Handle vpkudum mask pattern correctly when...
2015-05-21 Nemanja IvanovicAdd support for VSX scalar single-precision arithmetic...
2015-05-21 Elena DemikhovskyAVX-512: Enabled SSE intrinsics on AVX-512.
2015-05-21 Simon Pilgrim[X86][SSE] Improve support for 128-bit vector sign...
2015-05-20 Andrew Kaylor[WinEH] C++ EH state numbering fixes
2015-05-20 Reid Kleckner[WinEH] Store pointers to the LSDA in the exception...
2015-05-20 Hans WennborgRevert r237828 "[X86] Remove unused node after morphing...
2015-05-20 Davide Italiano[Target/ARM] Only enable OptimizeBarrierPass at -O1...
2015-05-20 Benjamin Kramer[X86] Remove unused node after morphing it from shr...
2015-05-20 Pawel BylicaFix icmp lowering
2015-05-20 Elena DemikhovskyAVX-512: fixed algorithm of building vectors of i1...
2015-05-20 Daniel SandersRevert r237789 - [mips] The naming convention for priva...
2015-05-20 Daniel Sanders[mips] Fix ehframe-indirect.ll test.
2015-05-20 Daniel Sanders[mips] The naming convention for private labels is...
2015-05-20 Igor Laevsky[StatepointLowering] Support of the gc.relocates for...
2015-05-20 David Majnemer[X86] Implement the local-exec TLS model for Windows...
2015-05-19 Alex LorenzRevert r237708 (MIR serialization) - incremental buildb...
2015-05-19 Alex LorenzFix MIR testcase committed in r237708 - remove target...
2015-05-19 Alex LorenzFix llc path in MIR testcases committed in r237708.
2015-05-19 Alex LorenzMIR Serialization: print and parse LLVM IR using MIR...
2015-05-19 Daniel Sanders[mips] Correct and improve special-case shuffle instruc...
2015-05-19 Michael Kuperstein[X86] ABI change for x86-32: pass 3 vector arguments...
2015-05-18 Reid KlecknerRe-land r237175: [X86] Always return the sret parameter...
2015-05-18 Tim NorthoverARM: allow jump tables to be placed as constant islands.
2015-05-18 Oliver StannardRevert r237579, as it broke windows buildbots
2015-05-18 James Y KnightAdd support for the Sparc implementation-defined "ASR...
2015-05-18 Oliver Stannard[LLVM - ARM/AArch64] Add ACLE special register intrinsics
2015-05-18 Elena DemikhovskyAVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS...
2015-05-18 Elena DemikhovskyAVX-512: Added patterns for scalar-to-vector broadcast
2015-05-18 Hal Finkel[PowerPC] Add extra r2 read deps on @toc@l relocations
2015-05-17 Elena DemikhovskyAVX-512: fixed extended load to 512-bit register
2015-05-17 Elena DemikhovskyAVX-512: fixed a bug in mask operations - (i1 1) pattern
2015-05-16 Bill Schmidt[PPC64] Add vector pack/unpack support from ISA 2.07
2015-05-15 James MolloyMark SMIN/SMAX/UMIN/UMAX nodes as legal and add pattern...
2015-05-14 Brendon Cahoon[Hexagon] Generate hardware loop for a vectorized loop
2015-05-14 Brendon Cahoon[Hexagon] Remove dead constant assignment in hardware...
2015-05-14 Brendon Cahoon[Hexagon] Check for underflow/wrap in hardware loop...
2015-05-14 Vasileios Kalintiris[mips] Do not place users of $ra in the delay slot...
2015-05-14 Artyom SkrobovRe-apply r237247 - [AArch64] Codegen VMAX/VMIN for...
2015-05-14 Elena DemikhovskyAVX-512: Added i1 type handling for calling conventions.
2015-05-14 Ahmed Bougacha[CodeGen] Use standard -not gnueabi- naming for f16...
2015-05-13 Brendon Cahoon[Hexagon] Generate loop1 instruction for nested loops
2015-05-13 Brendon Cahoon[Hexagon] Generate hardware loop when loop has a critic...
2015-05-13 Silviu BarangaRevert r237247 - [AArch64] Codegen VMAX/VMIN.. as it...
2015-05-13 Artyom Skrobov[AArch64] Codegen VMAX/VMIN for safe math cases
2015-05-12 Sanjoy Das[Statepoints] Support for "patchable" statepoints.
2015-05-12 Saleem AbdulrasoolCodeGen: ignore DEBUG_VALUE nodes in KILL tagging
2015-05-12 Chandler CarruthRevert r237175: [X86] Always return the sret parameter...
2015-05-12 Reid Kleckner[X86] Always return the sret parameter in eax/rax,...
2015-05-12 Sundeep Kushwaha[PATCH] [HEXAGON] Add a test program to verify calling...
2015-05-12 Pat Gavlin[Statepoints] Split the calling convention and statepoi...
2015-05-12 Petar Jovanovic[Mips] Return false for isFPCloseToIncomingSP()
2015-05-12 Tom StellardR600/SI: add pass to mark CF live ranges as non-spillable
2015-05-12 Sunil SrivastavaChanged renaming of local symbols by inserting a dot...
2015-05-12 Tom StellardR600/SI: Remove M0Reg register class
2015-05-12 Tom StellardR600/SI: Remove explicit m0 operand from DS instructions
2015-05-12 Tom StellardR600/SI: Make sendmsg test more strict
2015-05-12 Elena DemikhovskyAVX-512, X86: Added lowering for shift operations for...
2015-05-12 John Brawn[ARM] Use AEABI aligned function variants
2015-05-12 Igor LaevskyReverse ordering of base and derived pointer during...
2015-05-12 Vasileios Kalintiris[mips][FastISel] Handle calls with non legal types...
2015-05-12 Vasileios Kalintiris[mips][FastISel] Simplify callabi.ll by using multiple...
2015-05-12 Vasileios Kalintiris[mips][FastISel] Allow computation of addresses from...
2015-05-12 Elena DemikhovskyAVX-512: select operation for i1 vectors
2015-05-12 Michael Kuperstein[X86] DAGCombine should not assume arbitrary vector...
2015-05-12 Eric ChristopherMigrate existing backends that care about software...
2015-05-11 Andrew Kaylor[WinEH] Handle nested landing pads that return directly...
2015-05-11 Andrew Kaylor[WinEH] Update exception numbering to give handlers...
2015-05-11 Pirama Arumuga Nainar[X86] Updates to X86 backend for f16 promotion
2015-05-11 Elena DemikhovskyAVX-512: Changed CC parameter in "cmp" intrinsic
2015-05-11 Elena DemikhovskyAVX-512: Added SKX instructions and intrinsics:
2015-05-10 Elena DemikhovskyAVX-512: fixed UINT_TO_FP operation for 512-bit types.
2015-05-10 Elena DemikhovskyAVX-512: fixed a bug in i1 vectors lowering
2015-05-09 NAKAMURA Takumillvm/test/CodeGen/AArch64/tailcall_misched_graph.ll...
2015-05-09 James Y KnightFix MergeConsecutiveStore for non-byte-sized memory...
2015-05-09 Pete Cooper[Fast-ISel] Don't mark the first use of a remat constan...
2015-05-08 Arnold SchwaighoferScheduleDAGInstrs: In functions with tail calls PseudoS...
2015-05-08 Hans WennborgSwitch lowering: cluster adjacent fall-through cases...
2015-05-08 Pete Cooper[Fast-ISel] Clear kill flags on registers replaced...
2015-05-08 Brendon Cahoon[Hexagon] Generate more hardware loops
2015-05-08 Pete Cooper[X86] Fast-ISel was incorrectly always killing the...
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