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[Hexagon] Generate loop1 instruction for nested loops
authorBrendon Cahoon <bcahoon@codeaurora.org>
Wed, 13 May 2015 17:56:03 +0000 (17:56 +0000)
committerBrendon Cahoon <bcahoon@codeaurora.org>
Wed, 13 May 2015 17:56:03 +0000 (17:56 +0000)
commita036cd4093db1ee19b9ab51cb1e6b26bfe69ac3c
treeb5066c7d693617f84d09500041be5397d7a2b832tree | snapshot
parent0e0929ed98794acb11a65d0fe76ce34234783c4bcommit | diff
[Hexagon] Generate loop1 instruction for nested loops

loop1 is for the outer loop and loop0 is for the inner loop.

Differential Revision: http://reviews.llvm.org/D9680

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237266 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonHardwareLoops.cpp diff | blob | history
test/CodeGen/Hexagon/hwloop-loop1.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors