[autoconf] Export LLVM_LIBDIR_SUFFIX with empty string in LLVMConfig.cmake. tools...
[oota-llvm.git] / test / CodeGen /
2015-01-05 Hal Finkel[PowerPC] Fold i1 extensions with other ops
2015-01-05 Hal Finkel[PowerPC] Remove zexts after i32 ctlz
2015-01-05 Hal Finkel[PowerPC] Remove zexts after byte-swapping loads
2015-01-05 Ahmed Bougacha[AArch64] Improve codegen of store lane instructions...
2015-01-05 Ahmed Bougacha[AArch64] Improve codegen of store lane 0 instructions...
2015-01-05 Karthik BhatSelect lower fsub,fabs pattern to fabd on AArch64
2015-01-05 Charlie TurnerEmit the build attribute Tag_conformance.
2015-01-05 Karthik BhatSelect lower sub,abs pattern to sabd on AArch64
2015-01-05 Hal Finkel[PowerPC] Enable speculation of cttz/ctlz
2015-01-05 Hal Finkel[PowerPC] Materialize i64 constants using rotation...
2015-01-04 Simon Pilgrim[X86][SSE] Added vector packing test for pr12412
2015-01-04 Simon Pilgrim[X86][SSE] Added vector integer truncation tests -...
2015-01-04 Hal Finkel[PowerPC] Materialize i64 constants using rotation
2015-01-04 Hal Finkel[PowerPC] Materialize i64 constants using bit inversion
2015-01-03 Saleem AbdulrasoolARM: permit tail calls to weak externals on COFF
2015-01-03 Hal Finkel[PowerPC/BlockPlacement] Allow target to provide a...
2015-01-03 Hal Finkel[PowerPC] Use 16-byte alignment for modern cores for...
2015-01-03 Hal Finkel[PowerPC] Add support for the CMPB instruction
2015-01-01 Hal Finkel[PowerPC] Improve instruction selection bit-permuting...
2014-12-31 Alexey SamsonovRevert "merge consecutive stores of extracted vector...
2014-12-30 Peter Collingbournex86_64: Fix calls to __morestack under the large code...
2014-12-30 Colin LeMahieu[Hexagon] Adding reg-reg indexed load forms.
2014-12-29 Philip ReamesSemantic tests for memory invalidation at statepoints
2014-12-29 Colin LeMahieu[Hexagon] Adding post-increment register form stores...
2014-12-29 Rafael EspindolaAdd segmented stack support for DragonFlyBSD.
2014-12-28 NAKAMURA Takumillvm/test/CodeGen/X86/fast-isel-call-bool.ll: Add expli...
2014-12-28 Keno Fischer[X86][ISel] Fix a regression I introduced in r224884
2014-12-28 Michael Kuperstein[X86] Add missing memory variants to AVX false dependen...
2014-12-28 Andrea Di Biagio[CodeGenPrepare] Teach when it is profitable to specula...
2014-12-28 Elena DemikhovskyScalarizer for masked load and store intrinsics.
2014-12-27 David MajnemerPowerPC: CTR shouldn't fire if a TLS call is in the...
2014-12-27 Keno Fischer[FastIsel][X86] Fix invalid register replacement for...
2014-12-26 Rafael EspindolaNo need to run llvm-as. NFC.
2014-12-25 Hal Finkel[PowerPC] [FastISel] i1 constants must be zero extended
2014-12-25 Elena DemikhovskyMasked Load/Store - Changed the order of parameters...
2014-12-24 David MajnemerCodeGen: Error on redefinitions instead of asserting
2014-12-24 David MajnemerCodeGen: Allow aliases to be overridden by variables
2014-12-24 David MajnemerMC: Label definitions are permitted after .set directives
2014-12-23 Hal Finkel[PowerPC] Ensure that the TOC reload directly follows...
2014-12-23 Colin LeMahieu[Hexagon] Reapplying 224775 load words.
2014-12-23 Colin LeMahieuReverting 224775 until mayLoad flag is addressed.
2014-12-23 Colin LeMahieu[Hexagon] Adding word loads.
2014-12-23 Elena DemikhovskyAVX-512: Added FMA instructions, intrinsics an tests...
2014-12-23 Hal Finkel[PowerPC] Don't mark the return-address slot as immutable
2014-12-23 Elena DemikhovskyAVX-512: BLENDM - fixed encoding of the broadcast version
2014-12-23 Michael Kuperstein[DagCombine] Improve DAGCombiner BUILD_VECTOR when...
2014-12-23 Hal Finkel[PowerPC] Don't attempt a 64-bit pow2 division on PPC32
2014-12-23 Ahmed Bougacha[ARM] Don't break alignment when combining base updates...
2014-12-23 Jim GrosbachX86: Don't over-align combined loads.
2014-12-22 Reid KlecknerMake musttail more robust for vector types on x86
2014-12-22 Colin LeMahieu[Hexagon] Adding memb instruction. Fixing whitespace...
2014-12-22 Bruno Cardoso Lopes[x86] Add vector @llvm.ctpop intrinsic custom lowering
2014-12-22 Quentin Colombet[CodeGenPrepare] Handle properly the promotion of opera...
2014-12-22 Elena DemikhovskyAVX-512: Added all forms of BLENDM instructions,
2014-12-22 Karthik BhatLower multiply-negate operation to mneg on AArch64
2014-12-22 Rafael EspindolaConvert a few tests to FileCheck. NFC.
2014-12-21 Matt ArsenaultEnable (sext x) == C --> x == (trunc C) combine
2014-12-20 Chandler Carruth[x86] Change the test added in r223774 to first check...
2014-12-19 Elena DemikhovskyMasked load and store codegen - fixed 128-bit vectors
2014-12-19 Matt ArsenaultR600/SI: Only form min/max with 1 use.
2014-12-19 Reid KlecknerAdd the ExceptionHandling::MSVC enumeration
2014-12-19 Sanjay PatelModel sqrtss as a binary operation with one source...
2014-12-19 Tom StellardR600/SI: Make sure non-inline constants aren't folded...
2014-12-19 Peter CollingbourneCodeGen: do not attempt to invalidate virtual registers...
2014-12-19 Sanjay Patelmerge consecutive stores of extracted vector elements
2014-12-18 Jozef Kolek[mips][microMIPS] Fix bugs related to atomic SC/LL...
2014-12-18 Toma Tabacu[mips] Clean up the CodeGen/Mips/inlineasmmemop.ll...
2014-12-18 Robert Khasanov[AVX512] Enable FP arithmetic lowering for AVX512VL...
2014-12-18 Eric ChristopherAdd a new string member to the TargetOptions struct...
2014-12-18 Eric ChristopherModel ARM backend ABI selection after the front end...
2014-12-17 Matt ArsenaultR600/SI: Fix f64 inline immediates
2014-12-17 Jingyue Wu[NVPTX] Fix bugs related to isSingleValueType
2014-12-17 Timur IskhodzhanovFix CR/LF line endings in test case
2014-12-17 Michael Kuperstein[DAGCombine] Slightly improve lowering of BUILD_VECTOR...
2014-12-17 Toma Tabacu[mips] Set GCC-compatible MIPS asssembler options befor...
2014-12-17 Quentin Colombet[CodeGenPrepare] Reapply r224351 with a fix for the...
2014-12-17 Reid KlecknerRevert "[CodeGenPrepare] Move sign/zero extensions...
2014-12-16 Hans WennborgSelectionDAG switch lowering: use 'unsigned' to count...
2014-12-16 Sanjay Patelfix typo, add spaces; NFC
2014-12-16 Simon Pilgrim[X86][SSE] Vector double -> float conversion memory...
2014-12-16 Sanjay Patelmerge consecutive loads that are offset from a base...
2014-12-16 JF Bastienx86-32: PUSHF/POPF use/def EFLAGS
2014-12-16 Quentin Colombet[CodeGenPrepare] Move sign/zero extensions near loads...
2014-12-16 Robert Khasanov[AVX512] Enable integer arithmetic lowering for AVX512B...
2014-12-16 Sanjay Patelcombine consecutive subvector 16-byte loads into one...
2014-12-16 Daniel Sanders[mips] Fix arguments-struct.ll for Windows and OSX...
2014-12-16 Bradley Smith[ARM] Prevent PerformVCVTCombine from combining a vmul...
2014-12-16 Hal Finkel[PowerPC] Improve instruction selection bit-permuting...
2014-12-15 Simon PilgrimAdded missing tests for X86vzmovl folding. NFC.
2014-12-15 JF Bastienx86: Emit LOCK prefix after DATA16
2014-12-15 Duncan P. N. Exon... IR: Make metadata typeless in assembly
2014-12-15 Michael Kuperstein[X86] Break false dependencies before partial register...
2014-12-15 Elena DemikhovskyAVX-512: Added EXPAND instructions and intrinsics.
2014-12-14 Hal Finkel[PowerPC] Handle cmp op promotion for SELECT[_CC] nodes...
2014-12-13 Ahmed BougachaReapply "[ARM] Combine base-updating/post-incrementing...
2014-12-13 Renato GolinRevert "[ARM] Combine base-updating/post-incrementing...
2014-12-13 Akira HatanakaRename argument strings of codegen passes to avoid...
2014-12-12 Hal Finkel[PowerPC] Add a DAGToDAG peephole to remove unnecessary...
2014-12-12 Chad Rosier[ARMConstantIsland] Insert tbb/tbh optimization where...
2014-12-12 Robert Khasanov[AVX512] Enabling bit logic lowering
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