R600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of 64-bit operations
[oota-llvm.git] / test / CodeGen / R600 / sub.ll
2014-09-05 Tom StellardR600/SI: Use S_ADD_U32 and S_SUB_U32 for low half of...
2014-06-23 Matt ArsenaultR600/SI: Handle i64 sub.
2014-06-09 Matt ArsenaultR600/SI: Keep 64-bit not on SALU
2014-05-05 Tom StellardR600: Expand i64 ISD:SUB
2013-11-12 Matt ArsenaultR600/SI: Change formatting of printed registers.
2013-10-10 Tom StellardR600/SI: Use -verify-machineinstrs for most tests
2013-09-04 Vincent LejeuneR600: Non vector only instruction can be scheduled...
2013-08-12 Tom StellardR600: Set scheduling preference to Sched::Source
2013-08-01 Tom StellardR600: Add 64-bit float load/store support
2013-07-31 Tom StellardRevert "R600: Non vector only instruction can be schedu...
2013-07-31 Vincent LejeuneR600: Non vector only instruction can be scheduled...
2013-06-20 Tom StellardR600/SI: Expand sub for v2i32 and v4i32 for SI
2013-05-10 Tom StellardR600: Expand SUB for v2i32/v4i32