[RewriteStatepointsForGC] Delete trivial code
[oota-llvm.git] / lib / Target /
2015-07-21 Igor BregerAVX512 : Implemented VPMADDUBSW and VPMADDWD instruction ,
2015-07-21 Akira Hatanaka[ARM] Define subtarget feature "reserve-r9", which...
2015-07-21 Matt ArsenaultAMDGPU: Set isMoveImm on s_movk_i32
2015-07-21 Matthias BraunARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor...
2015-07-21 Matthias BraunARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
2015-07-20 Akira HatanakaRevert r242737.
2015-07-20 Akira Hatanaka[ARM] Define subtarget feature "reserve-r9", which...
2015-07-20 Matthias BraunRevert "ARMLoadStoreOptimizer: Create LDRD/STRD on...
2015-07-20 Matthias BraunRevert "ARMLoadStoreOpt: Merge subs/adds into LDRD...
2015-07-20 Matthias BraunRevert "ARM: Use SpecificBumpPtrAllocator to fix leak...
2015-07-20 Matthias BraunAArch64: Restrict macroop fusion heuristics to cyclone.
2015-07-20 JF BastienTargets: commonize some stack realignment code
2015-07-20 Matthias BraunAArch64: Add aditional Cyclone macroop fusion opportunities
2015-07-20 Geoff BerryFix comment typo (test commit). NFC
2015-07-20 Quentin Colombet[ARM] Refactor the prologue/epilogue emission to be...
2015-07-20 Jingyue Wu[NVPTX] make load on global readonly memory to use ldg
2015-07-20 Krzysztof Parzyszek[Hexagon] Generate MUX from conditional transfers when...
2015-07-20 Sanjoy Das[ImplicitNullChecks] Work with implicit defs.
2015-07-20 Chad Rosier[AArch64] Change EON pattern to match more often.
2015-07-20 Tom StellardAMDGPU/SI: Add VI patterns to select FLAT instructions...
2015-07-20 Vasileios Kalintiris[mips] Added support for the ERETNC instruction.
2015-07-19 Simon Pilgrim[X86][SSE] Reordered cast vectorization costs. NFCI.
2015-07-19 Michael Kuperstein[X86] Add support for tbyte memory operand size for...
2015-07-19 Simon PilgrimRemove TargetInstrInfo::canFoldMemoryOperand
2015-07-19 Elena DemikhovskyAVX-512: Floating point conversions for SKX - DAG Lowering.
2015-07-18 Simon Pilgrim[X86][SSE] Updated SHL/LSHR i64 vectorization costs.
2015-07-18 Benjamin Kramer[Hexagon] Use composition instead of inheritance from...
2015-07-17 Matthias BraunARM: Enable MachineScheduler and disable PostRASchedule...
2015-07-17 Matthias BraunARM: Add scheduling information for LDRLIT instructions...
2015-07-17 Adam NemetRevert "ARM: Enable MachineScheduler and disable PostRA...
2015-07-17 James Molloy[ARM] Use [SU]ABSDIFF nodes instead of intrinsics for...
2015-07-17 James Molloy[AArch64] Use [SU]ABSDIFF nodes instead of intrinsics...
2015-07-17 Eli BenderskyUse inbounds GEPs for memcpy and memset lowering
2015-07-17 Tim NorthoverAArch64: add comment missed out from earlier patch.
2015-07-17 Matthias BraunARM: Enable MachineScheduler and disable PostRASchedule...
2015-07-17 Rafael EspindolaUse small encodings for constants when possible.
2015-07-16 Matthias BraunArm: Don't define a label twice with two setjmps in...
2015-07-16 Matthias BraunFix __builtin_setjmp in combination with sjlj exception...
2015-07-16 Simon PilgrimFix spelling. NFCI.
2015-07-16 Tim NorthoverAArch64: make inexact signalling on round Darwin-specific
2015-07-16 Bill Schmidt[PowerPC] v4i32 is a VSRCRegClass
2015-07-16 Eli BenderskyStreamline the coding style in NVPTXLowerAggrCopies
2015-07-16 Jingyue Wu[NVPTX] enable SpeculativeExecution in NVPTX
2015-07-16 Matthias BraunAArch64: Implement conditional compare sequence matching.
2015-07-16 Tom StellardAMDPGU/SI: Negative offsets aren't allowed in MUBUF...
2015-07-16 Tom StellardAMDPGU/SI: Use AssertZext node to mask high bit for...
2015-07-16 Pete CooperRevert "Add missing load/store flags to thumb2 instruct...
2015-07-16 Benjamin Kramer[NVPTX] Don't leak dead instructions after unlinking...
2015-07-16 Eli BenderskyCorrect lowering of memmove in NVPTX
2015-07-16 Tom StellardAMDGPU/R600: Remove unused variable
2015-07-16 Tom StellardAMDPGU/R600: Replace llvm_unreachable() call with LLVMC...
2015-07-16 Michael Kuperstein[X86] Reapply r240257 : "Allow more call sequences...
2015-07-16 Michael Kuperstein[X86] Fix emitPrologue() to make less assumptions about...
2015-07-16 Benjamin Kramer[Mips] Make helper function static, NFC.
2015-07-16 Mehdi AminiAdd missing break in switch case in R600ISelLowering
2015-07-16 Mehdi AminiMove most user of TargetMachine::getDataLayout to the...
2015-07-16 Mehdi AminiRemove DataLayout from TargetLoweringObjectFile, redire...
2015-07-16 Reid KlecknerRevert "[X86] Allow more call sequences to use push...
2015-07-16 Akira Hatanaka[ARM] Define a subtarget feature that is used to avoid...
2015-07-16 Pete CooperClear kill flags in ARMLoadStoreOptimizer.
2015-07-15 Matthias BraunTargetRegisterInfo: Provide a way to check assigned...
2015-07-15 Bruno Cardoso LopesRevert "Look through PHIs to find additional register...
2015-07-15 Pete CooperAdd missing load/store flags to thumb2 instructions.
2015-07-15 Bill Schmidt[PPC64LE] Fix vec_sld semantics for little endian
2015-07-15 Bruno Cardoso LopesLook through PHIs to find additional register sources
2015-07-15 Benjamin Kramer[PPC] Disassemble little endian ppc instructions in...
2015-07-15 Hal Finkel[PowerPC] Use the MachineCombiner to reassociate fadd...
2015-07-15 Hal Finkel[PowerPC] Extend physical register live range in PPCVSX...
2015-07-15 Petr Pavlu[AArch64] Fix problems in decoding generic MSR instructions
2015-07-15 Igor BregerAVX : Fix ISA disabling in case AVX512VL , some instruc...
2015-07-15 Pete CooperChange conditional to assert. NFC.
2015-07-14 Pete CooperUse more foreach loops in SelectionDAG. NFC
2015-07-14 JF BastienWebAssembly: fix build breakage.
2015-07-14 Hal Finkel[PowerPC] Support symbolic targets in patchpoints
2015-07-14 Hal Finkel[PowerPC] Use the ABI indirect-call protocol for patchp...
2015-07-14 Pete CooperAdd allnodes() iterator range to SelectionDAG. NFC.
2015-07-14 JF BastienWebAssembly: add basic int/fp instruction codegen.
2015-07-14 Krzysztof ParzyszekFix NDEBUG build warning
2015-07-14 Krzysztof ParzyszekFix Windows build: replace __func__ with LLVM_FUNCTION_NAME
2015-07-14 Bruno Cardoso Lopes[MMX] Use the appropriate instructions for GR64 <-...
2015-07-14 Hal Finkel[PowerPC] Fix the PPCInstrInfo::getInstrLatency impleme...
2015-07-14 Krzysztof Parzyszek[Hexagon] Generate instructions for operations on predi...
2015-07-14 Matt ArsenaultAMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)
2015-07-14 Matt ArsenaultAMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 Matthias BraunMachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 Nemanja IvanovicAdd missing builtins to the PPC back end for ABI compli...
2015-07-14 Matthias BraunPrologEpilogInserter: Rewrite API to determine callee...
2015-07-14 Tim NorthoverAArch64: add rev64 alias for 64-bit rev instruction.
2015-07-14 Krzysztof Parzyszek[Hexagon] Generate "extract" instructions more aggressively
2015-07-14 Hans WennborgARMAsmParser: Take MCInst param by const-ref
2015-07-14 Tom StellardAMDGPU/SI: Add support for shrinking v_cndmask_b32_e32...
2015-07-14 Aaron BallmanSilencing two MSVC warnings; 'argument' : truncation...
2015-07-14 Daniel Sanders[mips] Fix li/la differences between IAS and GAS.
2015-07-14 Yaron KerenGenerate correct asm info for mingw and cygwin ARM...
2015-07-14 NAKAMURA TakumiPrune trailing whitespaces and CRs.
2015-07-13 Bill Schmidt[PPC64LE] More improvements to VSX swap optimization
2015-07-13 Benjamin Kramer[Hexagon] Move BitTracker into the llvm namespace and...
2015-07-13 Matt ArsenaultAMDGPU: Minor cleanups to always inline pass
2015-07-13 Mark HeffernanEnable partial and runtime loop unrolling for NVPTX.
2015-07-13 Reid Kleckner[WinEH] Strip the \01 character from the __CxxFrameHand...
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