Try to fix the MSVC build.
[oota-llvm.git] / lib / Target /
2015-02-12 Rafael EspindolaOn ELF, put PIC jump tables in a non executable section.
2015-02-12 Rafael EspindolaPut each jump table in an independent section if the...
2015-02-12 Benjamin KramerMathExtras: Bring Count(Trailing|Leading)Ones and Count...
2015-02-12 Michael Kuperstein[X86] Call frame optimization - allow stack-relative...
2015-02-12 Asiri RathnayakeARM: Fix another regression introduced in r223113
2015-02-12 Elena DemikhovskyAVX-512: Fixed the "test" operation for i1 type
2015-02-12 Michael Kuperstein[X86] A heuristic to estimate the size impact for conve...
2015-02-12 Hal Finkel[PowerPC] Mark jumps as expensive (using using CR bits)
2015-02-11 Tom StellardR600/SI: Disable subreg liveness
2015-02-11 Tom StellardR600: Split AMDGPUPassConfig into R600PassConfig and...
2015-02-11 Tom StellardR600: Create an R600TargetMachine for pre-gcn GPUs
2015-02-11 Daniel Sanders[mips] Merge disassemblers into a single implementation.
2015-02-11 Michael Kuperstein[X86] Split information collection from actual transfor...
2015-02-11 Arnaud A. de Grand... [PBQP] Cautiously update edge costs in the solver
2015-02-11 Zachary TurnerUse ADDITIONAL_HEADER_DIRS in all LLVM CMake projects.
2015-02-11 Tom StellardR600/SI: Store immediate offsets > 12-bits in soffset
2015-02-11 Tom StellardR600/SI: Add soffset operand to mubuf addr64 instruction
2015-02-10 David MajnemerX86: @llvm.frameaddress should defer to SelectionDAG...
2015-02-10 David MajnemerX86: Make @llvm.frameaddress work correctly with Window...
2015-02-10 Bill SchmidtFix up r228725, missed change in PPCSubtarget definition
2015-02-10 Bill Schmidt[PowerPC] Fix reverted patch r227976 to avoid register...
2015-02-10 David MajnemerX86: Emit Win64 SaveXMM opcodes at the right offset...
2015-02-10 Hal Finkel[PowerPC] Support the (old) cntlz instruction alias
2015-02-10 Colin LeMahieu[Hexagon] Adding vector load with post-increment instru...
2015-02-10 Zoran Jovanovic[mips][microMIPS] Implement movep instruction
2015-02-10 Simon Pilgrim[X86][AVX2] Missing AVX2 memory folding instructions
2015-02-10 Simon Pilgrim[X86][XOP] Added XOP memory folding patterns + tests
2015-02-10 Jozef Kolek[mips][microMIPS] Fix disassembling of 16-bit microMIPS...
2015-02-10 Andrea Di Biagio[X86][FastIsel] Avoid introducing legacy SSE instructio...
2015-02-10 Craig Topper[X86] Preserve mem refs on newly created 'Store' node...
2015-02-10 Craig Topper[X86] Remove unnecessary alignment checks from the...
2015-02-10 David MajnemerX86: Emit an ABI compliant prologue and epilogue for...
2015-02-10 Eric ChristopherMigrate PPCAsmPrinter's subtarget from reference to...
2015-02-10 David BlaikieFix the clang -Werror build (-Wunused-variable)
2015-02-09 Colin LeMahieu[Hexagon] Adding missing load instructions and removing...
2015-02-09 Colin LeMahieu[Hexagon] Factoring classes out of some load patterns...
2015-02-09 Colin LeMahieu[Hexagon] Removing more V4 predicates since V4 is the...
2015-02-09 Colin LeMahieu[Hexagon] Removing v2-4 flags. V4 is the minimum suppo...
2015-02-09 Colin LeMahieu[Hexagon] Factoring classes out of store patterns.
2015-02-09 Colin LeMahieu[Hexagon] Formatting v5 TD file. Removing commented...
2015-02-09 Colin LeMahieu[Hexagon] Cleaning up definition formatting.
2015-02-09 Kit BartonThis change implements the following three logical...
2015-02-09 Sanjay Patelrename variable to give it some meaning; remove obvious...
2015-02-09 Sanjay Patelfix comment that didn't match the code; remove unnecess...
2015-02-09 Craig Topper[X86] Remove 256-bit and 512-bit memop pattern fragment...
2015-02-09 Craig Topper[X86] Remove 'memop' uses from AVX512. Use 'load' instead.
2015-02-08 Craig Topper[X86] Remove the remaining uses of memop from AVX and...
2015-02-08 Sanjay Patelfix typos; NFC
2015-02-08 Simon PilgrimMoved AVX2 vbroadcast (reg) instruction foldings under...
2015-02-08 Tim NorthoverARM & AArch64: teach LowerVSETCC that output type size...
2015-02-07 Craig Topper[X86] Add register use/def for wrmsr and rdmsr.
2015-02-07 Craig Topper[X86] Add GETSEC instruction.
2015-02-07 Simon Pilgrim[X86][AVX] Added missing stack folding support + test...
2015-02-07 Andrea Di BiagioFix typos; NFC.
2015-02-07 Hal Finkel[PowerPC] Handle loop predecessor invokes
2015-02-06 Ahmed Bougacha[AArch64] Use the source location of the IR branch...
2015-02-06 Hal FinkelRevert "r227976 - [PowerPC] Yet another approach to...
2015-02-06 Sanjay Pateluse local variables; NFC
2015-02-06 Cameron EsfahaniTest commit to see if it triggers an email to llvm...
2015-02-06 Reid KlecknerDon't dllexport declarations
2015-02-06 Benjamin KramerMake helper functions/classes/globals static. NFC.
2015-02-06 Benjamin KramerAArch64PromoteConstant: Modernize and resolve some...
2015-02-06 Michel DanzerR600/SI: Don't enable WQM for V_INTERP_* instructions v2
2015-02-06 Michel DanzerR600/SI: Also enable WQM for image opcodes which calcul...
2015-02-05 Colin LeMahieu[Hexagon] Renaming v4 compare-and-jump instructions.
2015-02-05 Colin LeMahieu[Hexagon] Deleting unused patterns.
2015-02-05 Colin LeMahieu[Hexagon] Simplifying and formatting several patterns...
2015-02-05 Colin LeMahieu[Hexagon] Factoring a class out of some store patterns...
2015-02-05 Colin LeMahieu[Hexagon] Factoring out a class for immediate transfers...
2015-02-05 Eric ChristopherRemove the use of getSubtarget in the creation of the X86
2015-02-05 Eric ChristopherUse cached subtargets inside X86FixupLEAs.
2015-02-05 Eric ChristopherMigrate the X86 AsmPrinter away from using the subtarge...
2015-02-05 Sylvestre LedruFix an incorrect identifier
2015-02-05 Colin LeMahieu[Hexagon] Renaming Y2_barrier. Fixing issues where...
2015-02-05 Hal Finkel[PowerPC] Prepare loops for pre-increment loads/stores
2015-02-05 Hal Finkel[PowerPC] Generate pre-increment floating-point ld...
2015-02-05 Colin LeMahieu[Hexagon] Renaming A2_subri, A2_andir, A2_orir. Fixing...
2015-02-05 Ahmed Bougacha[CodeGen] Add hook/combine to form vector extloads...
2015-02-05 Andrew TrickX86 ABI fix for return values > 24 bytes.
2015-02-05 Colin LeMahieu[Hexagon] Renaming A2_addi and formatting.
2015-02-05 Sanjay Patelmove fold comments to the corresponding fold; NFC
2015-02-05 Colin LeMahieu[Hexagon] Since decoding conflicts have been resolved...
2015-02-05 Tom StellardR600/SI: Fix bug in TTI loop unrolling preferences
2015-02-05 Tom StellardR600/SI: Fix bug from insertion of llvm.SI.end.cf into...
2015-02-05 Bill Schmidt[PowerPC] Implement the vclz instructions for PWR8
2015-02-05 Bruno Cardoso Lopes[X86][MMX] Handle i32->mmx conversion using movd
2015-02-05 Bruno Cardoso Lopes[X86][MMX] Move MMX DAG node to proper file
2015-02-05 Craig Topper[X86] Add xrstors/xsavec/xsaves/clflushopt/clwb/pcommit...
2015-02-05 Craig Topper[X86] Remove two feature flags that covered sets of...
2015-02-05 Matt ArsenaultR600/SI: Fix i64 truncate to i1
2015-02-05 Larisse VoufoDisable enumeral mismatch warning when compiling llvm...
2015-02-05 Cameron EsfahaniValue soft float calls as more expensive in the inliner.
2015-02-05 Colin LeMahieu[Hexagon] Deleting unused instructions and adding isCod...
2015-02-04 Colin LeMahieu[Hexagon] Updating load extend to i64 patterns.
2015-02-04 Colin LeMahieu[Hexagon] Cleaning up i1 load and extension patterns.
2015-02-04 Colin LeMahieu[Hexagon] Simplifying more load and store patterns...
2015-02-04 Tom StellardR600/SI: Enable subreg liveness by default
2015-02-04 Colin LeMahieu[Hexagon] Simplifying some load and store patterns.
2015-02-04 Colin LeMahieu[Hexagon] Converting absolute-address load patterns...
2015-02-04 Colin LeMahieu[Hexagon] Converting atomic store/load to use AddrGP...
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