Fix typo
[oota-llvm.git] / lib / Target /
2014-10-09 Matt ArsenaultFix typo
2014-10-09 Tom StellardR600/SI: Legalize CopyToReg during instruction selection
2014-10-09 Lang Hames[PBQP] Add missing headers from r219421.
2014-10-09 Lang Hames[PBQP] Replace PBQPBuilder with composable constraints...
2014-10-09 Tom StellardR600/SI: Legalize INSERT_SUBREG instructions during...
2014-10-09 Bill Schmidt[PPC64] VSX indexed-form loads use wrong instruction...
2014-10-09 Kevin Qin[AArch64] Enable partial & runtime unrolling on cortex...
2014-10-09 Robert Khasanov[AVX512] Extended avx512_binop_rm for AVX512VL subsets.
2014-10-09 Bob WilsonUse triple's isiOS() and isOSDarwin() methods.
2014-10-09 Eric ChristopherRemove unused argument to CreateTargetScheduleState...
2014-10-08 Adam Nemet[AVX512] Rename AVX512_masking* to AVX512_maskable*
2014-10-08 Adam Nemet[AVX512] Intrinsics for vextract*x4
2014-10-08 Adam Nemet[AVX512] Add asm-only support for vextract*x4 masking...
2014-10-08 Adam Nemet[AVX512] Move DAG for all-zero node to X86VectorVTInfo
2014-10-08 Adam Nemet[AVX512] Peel off an asm-only class from AVX512_masking...
2014-10-08 Robin Morisset[X86] Don't transform atomic-load-add into an inc/dec...
2014-10-08 Robin Morisset[X86] Avoid generating inc/dec when slow for x.atomic_s...
2014-10-08 Robert Khasanov[AVX512] Added intrinsics for 128-, 256- and 512-bit...
2014-10-08 Robert Khasanov[AVX512] Refactoring of avx512_binop_rm multiclass...
2014-10-08 Renato GolinEmit unaligned access build attribute for ARM
2014-10-08 Renato GolinRefactor isThumb1Only() && isMClass() into a predicate...
2014-10-08 Renato GolinSimplify switch statement in ARM subtarget align access
2014-10-08 Eric ChristopherCache TargetLowering on SelectionDAGISel and update...
2014-10-08 Chad Rosier[AArch64] Generate vector signed/unsigned mul and mla...
2014-10-07 Robin Morisset[X86] Fix a bug with fetch_add(INT32_MIN)
2014-10-07 Tom StellardR600/SI: Refactor VOP3 instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOPC instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOP2 instruction defs
2014-10-07 Tom StellardR600/SI: Refactor VOP1 instruction defs
2014-10-07 Matt ArsenaultR600: Remove dead code
2014-10-07 Tom StellardR600: Remove some redundant initializations from AMDGPU...
2014-10-07 Tom StellardR600: Use MCAsmInfoELF as AMDGPUMCAsmInfo base class
2014-10-07 Tom StellardR600/SI: Remove assertion in SIInstrInfo::areLoadsFromS...
2014-10-07 Yuri Gorshenin[asan-asm-instrumentation] CFI directives are generated...
2014-10-07 Daniel Sanders[mips] Return {f128} correctly for N32/N64.
2014-10-07 Craig Topper[X86] Fix a bug where the disassembler was ignoring...
2014-10-07 Craig TopperFormatting fixes. Most putting 'else' on the same line...
2014-10-07 Craig TopperFix filename in header and use C++ version of the C...
2014-10-07 Juergen Ributzka[FastISel][AArch64] Teach the address computation code...
2014-10-07 Juergen Ributzka[FastISel][AArch64] Teach the address computation to...
2014-10-07 Juergen Ributzka[FastISel][AArch64] Fix "Fold sign-/zero-extends into...
2014-10-06 NAKAMURA TakumiARMInstPrinter.cpp: Suppress a warning for -Asserts...
2014-10-06 Tim NorthoverARM: silence unused variable warning
2014-10-06 Tim NorthoverARM: remove dead InstPrinting code
2014-10-06 Benjamin KramerX86: Drop the isConvertibleTo3Addr bit from shufps...
2014-10-06 Eric ChristopherAdd subtarget caches to aarch64, arm, ppc, and x86.
2014-10-05 Chandler Carruth[x86] Remove the 2-addr-to-3-addr "optimization" from...
2014-10-05 Benjamin KramerX86: Don't drop half of the mask when converting 2...
2014-10-05 Elena DemikhovskyAVX-512-SKX: Added instruction VPMOVM2B/W/D/Q.
2014-10-05 Chandler Carruth[x86] Fix PR21139, one of the last remaining regression...
2014-10-05 Chandler Carruth[x86] Teach the new vector shuffle lowering how to...
2014-10-05 NAKAMURA TakumiHexagonMCCodeEmitter.cpp: Prune 2nd redundant \brief...
2014-10-05 NAKAMURA TakumiHexagonDesc: Update LLVMBuild.txt.
2014-10-04 Benjamin Kramer[SystemZ] Make operator bool explicit. NFC.
2014-10-04 Benjamin KramerMake AAMDNodes ctor and operator bool (!!!) explicit...
2014-10-04 Benjamin KramerRemove unnecessary copying or replace it with moves...
2014-10-04 Chandler Carruth[x86] Enable the new vector shuffle lowering by default.
2014-10-04 Jingyue WuAdd fake use to suppress defined-but-unused warnings
2014-10-04 Chandler Carruth[x86] Fix a bug in the VZEXT DAG combine that I just...
2014-10-04 Chandler Carruth[x86] Sink a generic combine of VZEXT nodes from the...
2014-10-03 Matt ArsenaultR600/SI: Custom lower f64 -> i64 conversions
2014-10-03 Matt ArsenaultR600: Custom lower [s|u]int_to_fp for i64 -> f64
2014-10-03 Matt ArsenaultR600/SI: Fix ftrunc f64 conformance failures.
2014-10-03 Chandler Carruth[x86] Add a really preposterous number of patterns...
2014-10-03 Chandler Carruth[x86] Adjust the patterns for lowering X86vzmovl nodes...
2014-10-03 Richard SmithPR21145: Teach LLVM about C++14 sized deallocation...
2014-10-03 Adam Nemet[ISel] Keep matching state consistent when folding...
2014-10-03 Tom StellardR600: Align functions to 256 bytes
2014-10-03 Benjamin KramerEliminate some deep std::vector copies. NFC.
2014-10-03 Robin Morisset[Power] Use lwsync for non-seq_cst fences
2014-10-03 Hans WennborgMipsAsmParser.cpp: fix VS2012 build
2014-10-03 Hans WennborgHexagonMCCodeEmitter.h: deleted member functions are...
2014-10-03 Daniel Sanders[mips] Print warning when using register names not...
2014-10-03 Sid ManningFix build break on Hexagon
2014-10-03 Sid ManningAdding skeleton for unit testing Hexagon Code Emission
2014-10-03 Chandler Carruth[x86] Teach the new vector shuffle lowering to aggressi...
2014-10-03 Renato GolinRevert 202433 - Provide a target override for the lates...
2014-10-03 Chandler Carruth[x86] Refactor the element insertion logic in the new...
2014-10-03 Chandler Carruth[x86] Significantly improve the ability of the new...
2014-10-03 Chandler Carruth[x86] Unbreak SSE1 with the new vector shuffle lowering...
2014-10-03 Eric Christopherconstify TargetMachine parameter.
2014-10-03 Eric Christopherconstify TargetMachine argument.
2014-10-03 Eric ChristopherWe can grab the options struct from the TargetMachine...
2014-10-02 Adam Nemet[AVX512] Pull pattern for subvector insert into the...
2014-10-02 Adam Nemet[AVX512] Refactor subvector inserts
2014-10-02 Adam Nemet[AVX512] Fix i256mem->f256mem typo in VINSERTF64x4rm
2014-10-02 Hal Finkel[PowerPC] Modern Book-E cores support sync
2014-10-02 Robin Morisset[Power] Improve the expansion of atomic loads/stores
2014-10-02 Juergen Ributzka[Stackmaps] Make ithe frame-pointer required for stackmaps.
2014-10-02 Chandler Carruth[x86] Teach the new vector shuffle lowering to widen...
2014-10-02 Tilmann Scheller[NVPTX] Remove dead code.
2014-10-02 Joerg SonnenbergerSupport padding unaligned data in .text.
2014-10-01 Chandler Carruth[x86] Improve and correct how the new vector shuffle...
2014-10-01 Eric Christopherconstify the TargetMachine argument used in the subtarg...
2014-10-01 Sanjay PatelLower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen]...
2014-10-01 Eric ChristopherNow that the optimization level is adjusting the featur...
2014-10-01 Eric ChristopherRework the PPC TargetMachine so that the non-function...
2014-10-01 Eric Christopherconstify TargetMachine parameter for X86TargetLowering.
2014-10-01 Sanjay PatelDon't repeat function/variable name in comment. NFC.
2014-10-01 Tim NorthoverARM: allow copying of CPSR when all else fails.
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