Revert r124611 - "Keep track of incoming argument's location while emitting LiveIns."
[oota-llvm.git] / lib / Target / ARM / ARMISelLowering.cpp
2010-08-04 Bob WilsonCombine NEON VABD (absolute difference) intrinsics...
2010-08-03 Nate BegemanAdd support for getting & setting the FPSCR application...
2010-07-29 Bob WilsonRefactor ARM-specific DAG combining in preparation...
2010-07-29 Dale JohannesenImplement vector constants which are splat of
2010-07-24 Anton KorobeynikovHook in GlobalMerge pass
2010-07-23 Jim GrosbachUse the appropriate register class for an i32 when...
2010-07-23 Evan Cheng- Allow target to specify when is register pressure...
2010-07-22 Chandler CarruthMark an assert-only variable as used.
2010-07-21 Evan ChengMore register pressure aware scheduling work.
2010-07-21 Eric ChristopherBaby steps towards ARM fast-isel.
2010-07-21 Rafael EspindolaFix calling convention on ARM if vfp2+ is enabled.
2010-07-21 Evan ChengTeach bottom up pre-ra scheduler to track register...
2010-07-20 Jim GrosbachRemoved un-used code.
2010-07-19 Evan ChengARM has to provide its own TargetLowering::findRepresen...
2010-07-19 Jim GrosbachSince ARM emits inline jump tables as part of the Const...
2010-07-19 Jim Grosbachrevert so I can get the right PR# in the log message.
2010-07-19 Jim GrosbachSince ARM emits inline jump tables as part of the Const...
2010-07-17 Jim GrosbachAdd combiner patterns to more effectively utilize the...
2010-07-17 Jim Grosbachadd BFI to getTargetNodeName()
2010-07-17 Jim GrosbachFix logic think-o
2010-07-16 Jim GrosbachAdd basic support to code-gen the ARM/Thumb2 bit-field...
2010-07-15 Evan ChengSplit -enable-finite-only-fp-math to two options:
2010-07-14 Bob WilsonAdd support for NEON VMVN immediate instructions.
2010-07-14 Bob WilsonAdd an ARM-specific DAG combining to avoid redundant...
2010-07-13 Bob WilsonUse a target-specific VMOVIMM DAG node instead of BUILD...
2010-07-13 Evan ChengExtend the r107852 optimization which turns some fp...
2010-07-13 Bob WilsonMove NEON "modified immediate" encode/decode into ARMAd...
2010-07-12 Bob WilsonRemove some code that doesn't appear to do anything...
2010-07-11 Rafael EspindolaFix va_arg for doubles. With this patch VAARG nodes...
2010-07-08 Evan ChengCheck for FiniteOnlyFPMath as well.
2010-07-08 Evan Chengr107852 is only safe with -enable-unsafe-fp-math to...
2010-07-08 Evan ChengOptimize some vfp comparisons to integer ones. This...
2010-07-08 Dale JohannesenChanges to ARM tail calls, mostly cosmetic.
2010-07-07 Dan GohmanSplit the SDValue out of OutputArg so that SelectionDAG...
2010-07-07 Jim GrosbachMark eh.sjlj.set/longjmp custom lowerings as Darwin...
2010-07-06 Jim GrosbachBy default, the eh.sjlj.setjmp/longjmp intrinsics shoul...
2010-07-06 Devang PatelPropagate debug loc.
2010-07-06 Dan GohmanReapply r107655 with fixes; insert the pseudo instructi...
2010-07-06 Dan GohmanRevert r107655.
2010-07-06 Dan GohmanFix a bunch of custom-inserter functions to handle...
2010-07-03 Evan ChengRemove isSS argument from CreateFixedObject. Fixed...
2010-07-01 Bob WilsonARM function alignments were off by a power of two...
2010-06-29 Duncan SandsRemove initialized but otherwise unused variables.
2010-06-26 Eli FriedmanFollowup to r106770: actually generate SXTB and SXTH...
2010-06-26 Evan ChengIt's now possible to run code placement pass for ARM.
2010-06-25 Evan ChengChange if-conversion block size limit checks to add...
2010-06-25 Dale JohannesenThe hasMemory argument is irrelevant to how the argument
2010-06-25 Bob WilsonReduce indentation.
2010-06-23 Dale JohannesenDo not do tail calls to external symbols. If the
2010-06-23 Jim GrosbachWhen using libcall expansions for the atomic intrinsics...
2010-06-21 Bob Wilsonsign_extend_inreg needs to be expanded for pre-v6 Thumb...
2010-06-19 Bob WilsonFix error message to match function name.
2010-06-19 Evan ChengDisable sibcall optimization for Thumb1 for now since...
2010-06-18 Jim Grosbachback-end libcall handling for ATOMIC_SWAP (__sync_lock_...
2010-06-18 Jim GrosbachEnable Expand handling of atomics for subtargets that...
2010-06-18 Dale JohannesenEnable tail calls on ARM by default, with some
2010-06-18 Dale JohannesenLast round of changes for ARM tail calls.
2010-06-18 Jakob Stoklund OlesenTreat the ARM inline asm {cc} constraint as a physreg...
2010-06-17 Jim GrosbachThumb1 and any pre-v6 ARM target should use the libcall...
2010-06-17 Jim Grosbachsimplify code a bit and add a more explanatory assert...
2010-06-16 Jim Grosbachformat and 80-column cleanup
2010-06-16 Bob WilsonRemove the hidden "neon-reg-sequence" option. The...
2010-06-16 Evan ChengMake post-ra scheduling, anti-dep breaking, and registe...
2010-06-15 Dale JohannesenNext round of tail call changes. Register used in...
2010-06-15 Bob WilsonAdd basic support for NEON modified immediates besides...
2010-06-14 Bob WilsonRename functions referring to VMOV immediates to refer...
2010-06-11 Bob WilsonAdd a missing bitcast. This code used to only handle...
2010-06-11 Bob WilsonAdd instruction encoding for the Neon VMOV immediate...
2010-06-07 Bob WilsonFurther changes for Neon vector shuffles:
2010-06-05 Dale JohannesenImprovements to tail call code. No functional effect
2010-06-04 Dale JohannesenMore thoroughly disable tails calls by default.
2010-06-04 Bob WilsonFor NEON vectors with 32- or 64-bit elements, select...
2010-06-03 Dale JohannesenEarly implementation of tail call for ARM.
2010-06-02 Jim GrosbachClean up 80 column violations. No functional change.
2010-05-28 Evan ChengSchedule high latency instructions for latency reductio...
2010-05-27 Jim GrosbachUpdate the saved stack pointer in the sjlj function...
2010-05-27 Jim Grosbachback out 104862/104869. Can reuse stacksave after all...
2010-05-27 Jim Grosbachadd ISD::STACKADDR to get the current stack pointer...
2010-05-26 Jim GrosbachAdjust eh.sjlj.setjmp to properly have a chain and...
2010-05-25 Bob WilsonClean up indentation.
2010-05-24 Evan ChengLR is in GPR, not tGPR even in Thumb1 mode.
2010-05-23 Bob WilsonVDUP doesn't support vectors with 64-bit elements.
2010-05-22 Evan ChengImplement @llvm.returnaddress. rdar://8015977.
2010-05-22 Jim GrosbachImplement eh.sjlj.longjmp for ARM. Clean up the intrins...
2010-05-22 Bob WilsonRecognize more BUILD_VECTORs and VECTOR_SHUFFLEs that...
2010-05-21 Evan ChengChange ARM scheduling default to list-hybrid if the...
2010-05-20 Evan ChengAllow targets more controls on what nodes are scheduled...
2010-05-20 Bob WilsonHandle Neon v2f64 and v2i64 vector shuffles as register...
2010-05-19 Evan ChengCode refactoring: pull SchedPreference enum from Target...
2010-05-18 Evan ChengSink dag combine's post index load / store code that...
2010-05-16 Anton KorobeynikovGeneralize the ARM DAG combiner of mul with constants...
2010-05-15 Anton KorobeynikovSome cheap DAG combine goodness for multiplication...
2010-05-15 Evan Chengv4i64 and v8i64 are only synthesizable when NEON is...
2010-05-15 Evan ChengAllow TargetLowering::getRegClassFor() to be called...
2010-05-14 Evan ChengAdded a QQQQ register file to model 4-consecutive Q...
2010-05-11 Dan GohmanImplement a bunch more TargetSelectionDAGInfo infrastru...
2010-05-11 Evan ChengSelect @llvm.trap to the special B with 1111 condition...
2010-05-10 Evan ChengModel vld2 / vst2 with reg_sequence.
2010-05-07 Jim GrosbachClean up the conditional for handling of sign_extend_in...
2010-05-05 Jim GrosbachCleanup of ARMv7M support. Move hardware divide and...
next