#define LLVM_CODEGEN_MACHINECODEEMITTER_H
#include "llvm/Support/DataTypes.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
namespace llvm {
#include "llvm/Pass.h"
#include "llvm/Constant.h"
#include "llvm/CodeGen/SelectionDAG.h"
-#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
namespace llvm {
class FastISel;
void llvm_unreachable(void) NORETURN;
}
-#define LLVM_UNREACHABLE(msg) do { assert(0 && msg); llvm_unreachable(); } while(0)
+#ifndef NDEBUG
+#define LLVM_UNREACHABLE(msg) do {cerr<<msg<<"\n";llvm_unreachable();}while(0)
+#else
+#define LLVM_UNREACHABLE(msg) llvm_unreachable()
+#endif
#endif
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
else if (MO.isMBB())
emitMachineBasicBlock(MO.getMBB(), ARM::reloc_arm_branch);
else {
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "ERROR: Unknown type of MachineOperand: " << MO;
- llvm_report_error(Msg.str());
+#ifndef NDEBUG
+ cerr << MO;
+#endif
+ llvm_unreachable();
}
return 0;
}
unsigned Opcode = MI.getDesc().Opcode;
switch (Opcode) {
default:
- llvm_report_error("ARMCodeEmitter::emitPseudoInstruction");//FIXME:
+ LLVM_UNREACHABLE("ARMCodeEmitter::emitPseudoInstruction");//FIXME:
case TargetInstrInfo::INLINEASM: {
// We allow inline assembler nodes with empty bodies - they can
// implicitly define registers, which is ok for JIT.
void Emitter<CodeEmitter>::emitBranchInstruction(const MachineInstr &MI) {
const TargetInstrDesc &TID = MI.getDesc();
- if (TID.Opcode == ARM::TPsoft)
- llvm_report_error("ARM::TPsoft FIXME"); // FIXME
+ if (TID.Opcode == ARM::TPsoft) {
+ LLVM_UNREACHABLE("ARM::TPsoft FIXME"); // FIXME
+ }
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+
using namespace llvm;
static const unsigned arm_dsubreg_0 = 5;
// ldr pc, [pc,#-4]
// <addr>
if (!sys::Memory::setRangeWritable((void*)StubAddr, 8)) {
- llvm_report_error("ERROR: Unable to mark stub writable");
+ LLVM_UNREACHABLE("ERROR: Unable to mark stub writable");
}
*(intptr_t *)StubAddr = 0xe51ff004; // ldr pc, [pc, #-4]
*(intptr_t *)(StubAddr+4) = NewVal;
if (!sys::Memory::setRangeExecutable((void*)StubAddr, 8)) {
- llvm_report_error("ERROR: Unable to mark stub executable");
+ LLVM_UNREACHABLE("ERROR: Unable to mark stub executable");
}
}
case ARM::FSTD:
NumFSTMGened++;
return ARM::FSTMD;
- default: llvm_report_error("Unhandled opcode!");
+ default: LLVM_UNREACHABLE("Unhandled opcode!");
}
return 0;
}
case ARM::FLDD: return ARM::FLDMD;
case ARM::FSTS: return ARM::FSTMS;
case ARM::FSTD: return ARM::FSTMD;
- default: llvm_report_error("Unhandled opcode!");
+ default: LLVM_UNREACHABLE("Unhandled opcode!");
}
return 0;
}
case ARM::FLDD: return ARM::FLDMD;
case ARM::FSTS: return ARM::FSTMS;
case ARM::FSTD: return ARM::FSTMD;
- default: llvm_report_error("Unhandled opcode!");
+ default: LLVM_UNREACHABLE("Unhandled opcode!");
}
return 0;
}
#include "llvm/ADT/SmallVector.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
static cl::opt<bool>
break;
}
default:
- llvm_report_error("Unsupported addressing mode!");
- break;
+ LLVM_UNREACHABLE("Unsupported addressing mode!");
}
Offset += InstrOffs * Scale;
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
Alpha::reloc_bsr, MO.getMBB()));
} else {
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "ERROR: Unknown type of MachineOperand: " << MO;
- llvm_report_error(Msg.str());
+#ifndef NDEBUG
+ cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
+#endif
+ llvm_unreachable();
}
return rv;
#include "llvm/Intrinsics.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
#include "llvm/Intrinsics.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
/// AddLiveIn - This helper function adds the specified physical register to the
.addReg(SrcReg, getKillRegState(isKill))
.addFrameIndex(FrameIdx).addReg(Alpha::F31);
else
- llvm_report_error("Unhandled register class");
+ LLVM_UNREACHABLE("Unhandled register class");
}
void AlphaInstrInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
else if (RC == Alpha::GPRCRegisterClass)
Opc = Alpha::STQ;
else
- llvm_report_error("Unhandled register class");
+ LLVM_UNREACHABLE("Unhandled register class");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB =
BuildMI(MF, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill));
BuildMI(MBB, MI, DL, get(Alpha::LDQ), DestReg)
.addFrameIndex(FrameIdx).addReg(Alpha::F31);
else
- llvm_report_error("Unhandled register class");
+ LLVM_UNREACHABLE("Unhandled register class");
}
void AlphaInstrInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
else if (RC == Alpha::GPRCRegisterClass)
Opc = Alpha::LDQ;
else
- llvm_report_error("Unhandled register class");
+ LLVM_UNREACHABLE("Unhandled register class");
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB =
BuildMI(MF, DL, get(Opc), DestReg);
#include "llvm/CodeGen/JITCodeEmitter.h"
#include "llvm/Config/alloca.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include <cstdlib>
using namespace llvm;
return;
case MachineOperand::MO_Immediate:
- llvm_report_error("printOp() does not handle immediate values");
+ LLVM_UNREACHABLE("printOp() does not handle immediate values");
return;
case MachineOperand::MO_MachineBasicBlock:
#include "llvm/Target/TargetData.h"
#include "llvm/Support/CallSite.h"
#include "llvm/Support/CFG.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GetElementPtrTypeIterator.h"
#include "llvm/Support/InstVisitor.h"
#include "llvm/Support/Mangler.h"
void visitExtractValueInst(ExtractValueInst &I);
void visitInstruction(Instruction &I) {
+#ifndef NDEBUG
cerr << "C Writer does not know about " << I;
- abort();
+#endif
+ llvm_unreachable();
}
void outputLValue(Instruction *I) {
}
default:
+#ifndef NDEBUG
cerr << "Unknown primitive type: " << *Ty << "\n";
- abort();
+#endif
+ llvm_unreachable();
}
}
}
default:
+#ifndef NDEBUG
cerr << "Unknown primitive type: " << *Ty << "\n";
- abort();
+#endif
+ llvm_unreachable();
}
}
return Out << TyName << ' ' << NameSoFar;
}
default:
- assert(0 && "Unhandled case in getTypeProps!");
- abort();
+ LLVM_UNREACHABLE("Unhandled case in getTypeProps!");
}
return Out;
return Out << TyName << ' ' << NameSoFar;
}
default:
- assert(0 && "Unhandled case in getTypeProps!");
- abort();
+ LLVM_UNREACHABLE("Unhandled case in getTypeProps!");
}
return Out;
return;
}
default:
+#ifndef NDEBUG
cerr << "CWriter Error: Unhandled constant expression: "
<< *CE << "\n";
- abort();
+#endif
+ llvm_unreachable();
}
} else if (isa<UndefValue>(CPV) && CPV->getType()->isSingleValueType()) {
Out << "((";
}
// FALL THROUGH
default:
+#ifndef NDEBUG
cerr << "Unknown constant type: " << *CPV << "\n";
- abort();
+#endif
+ llvm_unreachable();
}
}
const Type *Ty = I.getType();
if (Ty->isInteger() && (Ty!=Type::Int1Ty && Ty!=Type::Int8Ty &&
Ty!=Type::Int16Ty && Ty!=Type::Int32Ty && Ty!=Type::Int64Ty)) {
- cerr << "The C backend does not currently support integer "
- << "types of widths other than 1, 8, 16, 32, 64.\n";
- cerr << "This is being tracked as PR 4158.\n";
- abort();
+ llvm_report_error("The C backend does not currently support integer "
+ "types of widths other than 1, 8, 16, 32, 64.\n"
+ "This is being tracked as PR 4158.");
}
// If this is a non-trivial bool computation, make sure to truncate down to
case Instruction::Shl : Out << " << "; break;
case Instruction::LShr:
case Instruction::AShr: Out << " >> "; break;
- default: cerr << "Invalid operator type!" << I; abort();
+ default:
+#ifndef NDEBUG
+ cerr << "Invalid operator type!" << I;
+#endif
+ llvm_unreachable();
}
writeOperandWithCast(I.getOperand(1), I.getOpcode());
case ICmpInst::ICMP_SLT: Out << " < "; break;
case ICmpInst::ICMP_UGT:
case ICmpInst::ICMP_SGT: Out << " > "; break;
- default: cerr << "Invalid icmp predicate!" << I; abort();
+ default:
+#ifndef NDEBUG
+ cerr << "Invalid icmp predicate!" << I;
+#endif
+ llvm_unreachable();
}
writeOperandWithCast(I.getOperand(1), I);
Out << ", ";
// Output the last argument to the enclosing function.
if (I.getParent()->getParent()->arg_empty()) {
- cerr << "The C backend does not currently support zero "
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "The C backend does not currently support zero "
<< "argument varargs functions, such as '"
- << I.getParent()->getParent()->getName() << "'!\n";
- abort();
+ << I.getParent()->getParent()->getName() << "'!";
+ llvm_report_error(Msg.str());
}
writeOperand(--I.getParent()->getParent()->arg_end());
Out << ')';
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
void SPUAsmPrinter::printOp(const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_Immediate:
- cerr << "printOp() does not handle immediate values\n";
- abort();
+ llvm_report_error("printOp() does not handle immediate values");
return;
case MachineOperand::MO_MachineBasicBlock:
case GlobalValue::InternalLinkage:
break;
default:
- cerr << "Unknown linkage type!";
- abort();
+ llvm_report_error("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
#include "llvm/GlobalValue.h"
#include "llvm/Intrinsics.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
#ifndef NDEBUG
if (retval == 0) {
- cerr << "SPUISelDAGToDAG.cpp: getValueTypeMapEntry returns NULL for "
- << VT.getMVTString()
- << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "SPUISelDAGToDAG.cpp: getValueTypeMapEntry returns NULL for "
+ << VT.getMVTString();
+ llvm_report_error(Msg.str());
}
#endif
case ISD::Constant:
case ISD::ConstantPool:
case ISD::GlobalAddress:
- cerr << "SPU SelectAFormAddr: Constant/Pool/Global not lowered.\n";
- abort();
+ llvm_report_error("SPU SelectAFormAddr: Constant/Pool/Global not lowered.");
/*NOTREACHED*/
case ISD::TargetConstant:
case ISD::TargetGlobalAddress:
case ISD::TargetJumpTable:
- cerr << "SPUSelectAFormAddr: Target Constant/Pool/Global not wrapped as "
- << "A-form address.\n";
- abort();
+ llvm_report_error("SPUSelectAFormAddr: Target Constant/Pool/Global "
+ "not wrapped as A-form address.");
/*NOTREACHED*/
case SPUISD::AFormAddr:
switch (Op0VT.getSimpleVT()) {
default:
- cerr << "CellSPU Select: Unhandled zero/any extend MVT\n";
- abort();
+ llvm_report_error("CellSPU Select: Unhandled zero/any extend MVT");
/*NOTREACHED*/
- break;
case MVT::i32:
shufMask = CurDAG->getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32,
CurDAG->getConstant(0x80808080, MVT::i32),
const valtype_map_s *vtm = getValueTypeMapEntry(VT);
if (vtm->ldresult_ins == 0) {
- cerr << "LDRESULT for unsupported type: "
- << VT.getMVTString()
- << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "LDRESULT for unsupported type: "
+ << VT.getMVTString();
+ llvm_report_error(Msg.str());
}
Opc = vtm->ldresult_ins;
return CurDAG->getTargetNode(SPU::ORi64_v2i64, dl, OpVT,
SDValue(emitBuildVector(i64vec), 0));
} else {
- cerr << "SPUDAGToDAGISel::SelectI64Constant: Unhandled i64vec condition\n";
- abort();
+ llvm_report_error("SPUDAGToDAGISel::SelectI64Constant: Unhandled i64vec"
+ "condition");
}
}
#include "llvm/Function.h"
#include "llvm/Intrinsics.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
#include <map>
#ifndef NDEBUG
if (retval == 0) {
- cerr << "getValueTypeMapEntry returns NULL for "
- << VT.getMVTString()
- << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "getValueTypeMapEntry returns NULL for "
+ << VT.getMVTString();
+ llvm_report_error(Msg.str());
}
#endif
case ISD::POST_INC:
case ISD::POST_DEC:
case ISD::LAST_INDEXED_MODE:
- cerr << "LowerLOAD: Got a LoadSDNode with an addr mode other than "
+ {
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "LowerLOAD: Got a LoadSDNode with an addr mode other than "
"UNINDEXED\n";
- cerr << (unsigned) LN->getAddressingMode() << "\n";
- abort();
- /*NOTREACHED*/
+ Msg << (unsigned) LN->getAddressingMode();
+ llvm_report_error(Msg.str());
+ /*NOTREACHED*/
+ }
}
return SDValue();
case ISD::POST_INC:
case ISD::POST_DEC:
case ISD::LAST_INDEXED_MODE:
- cerr << "LowerLOAD: Got a LoadSDNode with an addr mode other than "
+ {
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "LowerLOAD: Got a LoadSDNode with an addr mode other than "
"UNINDEXED\n";
- cerr << (unsigned) SN->getAddressingMode() << "\n";
- abort();
- /*NOTREACHED*/
+ Msg << (unsigned) SN->getAddressingMode();
+ llvm_report_error(Msg.str());
+ /*NOTREACHED*/
+ }
}
return SDValue();
return DAG.getNode(SPUISD::IndirectAddr, dl, PtrVT, Hi, Lo);
}
} else {
- cerr << "LowerGlobalAddress: Relocation model other than static not "
- << "supported.\n";
- abort();
+ llvm_report_error("LowerGlobalAddress: Relocation model other than static"
+ "not supported.");
/*NOTREACHED*/
}
switch (ObjectVT.getSimpleVT()) {
default: {
- cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
- << ObjectVT.getMVTString()
- << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+ << ObjectVT.getMVTString();
+ llvm_report_error(Msg.str());
}
case MVT::i8:
ArgRegClass = &SPU::R8CRegClass;
uint64_t SplatBits = APSplatBits.getZExtValue();
switch (VT.getSimpleVT()) {
- default:
- cerr << "CellSPU: Unhandled VT in LowerBUILD_VECTOR, VT = "
- << VT.getMVTString()
- << "\n";
- abort();
+ default: {
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "CellSPU: Unhandled VT in LowerBUILD_VECTOR, VT = "
+ << VT.getMVTString();
+ llvm_report_error(Msg.str());
/*NOTREACHED*/
+ }
case MVT::v4f32: {
uint32_t Value32 = uint32_t(SplatBits);
assert(SplatBitSize == 32
// slot 0 across the vector
MVT VecVT = N.getValueType();
if (!VecVT.isSimple() || !VecVT.isVector() || !VecVT.is128BitVector()) {
- cerr << "LowerEXTRACT_VECTOR_ELT: Must have a simple, 128-bit vector type!\n";
- abort();
+ llvm_report_error("LowerEXTRACT_VECTOR_ELT: Must have a simple, 128-bit"
+ "vector type!");
}
// Make life easier by making sure the index is zero-extended to i32
switch (VT.getSimpleVT()) {
default:
- cerr << "LowerEXTRACT_VECTOR_ELT(varable): Unhandled vector type\n";
- abort();
+ llvm_report_error("LowerEXTRACT_VECTOR_ELT(varable): Unhandled vector"
+ "type");
/*NOTREACHED*/
case MVT::i8: {
SDValue factor = DAG.getConstant(0x00000000, MVT::i32);
case ISD::SETONE:
compareOp = ISD::SETNE; break;
default:
- cerr << "CellSPU ISel Select: unimplemented f64 condition\n";
- abort();
- break;
+ llvm_report_error("CellSPU ISel Select: unimplemented f64 condition");
}
SDValue result =
switch (Opc) {
default: {
+#ifndef NDEBUG
cerr << "SPUTargetLowering::LowerOperation(): need to lower this!\n";
cerr << "Op.getOpcode() = " << Opc << "\n";
cerr << "*Op.getNode():\n";
Op.getNode()->dump();
- abort();
+#endif
+ llvm_unreachable();
}
case ISD::LOAD:
case ISD::EXTLOAD:
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Support/Streams.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
} else if (RC == SPU::VECREGRegisterClass) {
opc = (isValidFrameIdx) ? SPU::STQDv16i8 : SPU::STQXv16i8;
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
DebugLoc DL = DebugLoc::getUnknownLoc();
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs) const {
- cerr << "storeRegToAddr() invoked!\n";
- abort();
+ llvm_report_error("storeRegToAddr() invoked!");
if (Addr[0].isFI()) {
/* do what storeRegToStackSlot does here */
} else if (RC == SPU::VECREGRegisterClass) {
/* Opc = PPC::STVX; */
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
} else if (RC == SPU::VECREGRegisterClass) {
opc = (isValidFrameIdx) ? SPU::LQDv16i8 : SPU::LQXv16i8;
} else {
- assert(0 && "Unknown regclass in loadRegFromStackSlot!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass in loadRegFromStackSlot!");
}
DebugLoc DL = DebugLoc::getUnknownLoc();
const TargetRegisterClass *RC,
SmallVectorImpl<MachineInstr*> &NewMIs)
const {
- cerr << "loadRegToAddr() invoked!\n";
- abort();
+ llvm_report_error("loadRegToAddr() invoked!");
if (Addr[0].isFI()) {
/* do what loadRegFromStackSlot does here... */
} else if (RC == SPU::GPRCRegisterClass) {
/* Opc = something else! */
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
case SPU::R126: return 126;
case SPU::R127: return 127;
default:
- cerr << "Unhandled reg in SPURegisterInfo::getRegisterNumbering!\n";
- abort();
+ llvm_report_error("Unhandled reg in SPURegisterInfo::getRegisterNumbering");
}
}
.addReg(SPU::R2)
.addReg(SPU::R1);
} else {
- cerr << "Unhandled frame size: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "Unhandled frame size: " << FrameSize;
+ llvm_report_error(Msg.str());
}
if (hasDebugInfo) {
.addReg(SPU::R2)
.addReg(SPU::R1);
} else {
- cerr << "Unhandled frame size: " << FrameSize << "\n";
- abort();
+ std::string msg;
+ raw_string_ostream Msg(msg);
+ Msg << "Unhandled frame size: " << FrameSize;
+ llvm_report_error(Msg.str());
}
}
}
case GlobalValue::PrivateLinkage:
break;
case GlobalValue::GhostLinkage:
- llvm_report_error("GhostLinkage cannot appear in IA64AsmPrinter!");
+ LLVM_UNREACHABLE("GhostLinkage cannot appear in IA64AsmPrinter!");
case GlobalValue::DLLImportLinkage:
- llvm_report_error("DLLImport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- llvm_report_error("DLLExport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLExport linkage is not supported by this target!");
default:
LLVM_UNREACHABLE("Unknown linkage type!");
}
#include "llvm/Intrinsics.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
namespace {
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Constants.h"
#include "llvm/Function.h"
using namespace llvm;
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
/// MSP430DAGToDAGISel - MSP430 specific code to select MSP430 machine
switch (RegVT.getSimpleVT()) {
default:
{
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
- << RegVT.getSimpleVT();
- llvm_report_error(Msg.str());
+#ifndef NDEBUG
+ cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+ << RegVT.getSimpleVT() << "\n";
+#endif
+ llvm_unreachable();
}
case MVT::i16:
unsigned VReg =
break;
default:
- llvm_report_error("<unknown operand type>"); break;
+ LLVM_UNREACHABLE("<unknown operand type>");
}
if (closeP) O << ")";
printSizeAndType = false;
break;
case GlobalValue::GhostLinkage:
- llvm_report_error("Should not have any unmaterialized functions!");
+ LLVM_UNREACHABLE("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- llvm_report_error("DLLImport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- llvm_report_error("DLLExport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLExport linkage is not supported by this target!");
default:
LLVM_UNREACHABLE("Unknown linkage type!");
}
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "pic16-isel"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "PIC16ISelDAGToDAG.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
unsigned enumRegToMachineReg(unsigned enumReg) {
switch (enumReg) {
- default: assert(0 && "Unhandled register!"); break;
+ default: LLVM_UNREACHABLE("Unhandled register!");
case PPC::CR0: return 0;
case PPC::CR1: return 1;
case PPC::CR2: return 2;
case PPC::CR6: return 6;
case PPC::CR7: return 7;
}
- abort();
+ llvm_unreachable();
}
/// printInstruction - This method is automatically generated by tablegen
void PPCAsmPrinter::printOp(const MachineOperand &MO) {
switch (MO.getType()) {
case MachineOperand::MO_Immediate:
- cerr << "printOp() does not handle immediate values\n";
- abort();
- return;
+ LLVM_UNREACHABLE("printOp() does not handle immediate values");
case MachineOperand::MO_MachineBasicBlock:
printBasicBlockLabel(MO.getMBB());
if (printInstruction(MI))
return; // Printer was automatically generated
- assert(0 && "Unhandled instruction in asm writer!");
- abort();
- return;
+ LLVM_UNREACHABLE("Unhandled instruction in asm writer!");
}
/// runOnMachineFunction - This uses the printMachineInstruction()
case GlobalValue::PrivateLinkage:
break;
default:
- cerr << "Unknown linkage type!";
- abort();
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
case GlobalValue::PrivateLinkage:
break;
default:
- cerr << "Unknown linkage type!";
- abort();
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
Reloc, MO.getMBB()));
} else {
+#ifndef NDEBUG
cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
- abort();
+#endif
+ llvm_unreachable();
}
return rv;
#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Compiler.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
namespace {
case ISD::SETONE:
case ISD::SETOLE:
case ISD::SETOGE:
- assert(0 && "Should be lowered by legalize!");
- default: assert(0 && "Unknown condition!"); abort();
+ LLVM_UNREACHABLE("Should be lowered by legalize!");
+ default: LLVM_UNREACHABLE("Unknown condition!");
case ISD::SETOEQ:
case ISD::SETEQ: return PPC::PRED_EQ;
case ISD::SETUNE:
Invert = false;
Other = -1;
switch (CC) {
- default: assert(0 && "Unknown condition!"); abort();
+ default: LLVM_UNREACHABLE("Unknown condition!");
case ISD::SETOLT:
case ISD::SETLT: return 0; // Bit #0 = SETOLT
case ISD::SETOGT:
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/DerivedTypes.h"
using namespace llvm;
}
if (Result) {
+#ifndef NDEBUG
cerr << "Call operand #" << i << " has unhandled type "
<< ArgVT.getMVTString() << "\n";
- abort();
+#endif
+ llvm_unreachable();
}
}
} else {
}
return DAG.getVectorShuffle(MVT::v16i8, dl, EvenParts, OddParts, Ops);
} else {
- assert(0 && "Unknown mul to lower!");
- abort();
+ LLVM_UNREACHABLE("Unknown mul to lower!");
}
}
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetAsmInfo.h"
using namespace llvm;
.addReg(PPC::R0)
.addReg(PPC::R0));
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
return false;
} else if (RC == PPC::VRRCRegisterClass) {
Opc = PPC::STVX;
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
.addReg(SrcReg, getKillRegState(isKill));
NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0)
.addReg(PPC::R0));
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
}
} else if (RC == PPC::VRRCRegisterClass) {
Opc = PPC::LVX;
} else {
- assert(0 && "Unknown regclass!");
- abort();
+ LLVM_UNREACHABLE("Unknown regclass!");
}
DebugLoc DL = DebugLoc::getUnknownLoc();
MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);
#include "llvm/Function.h"
#include "llvm/System/Memory.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
static TargetJITInfo::JITCompilerFn JITCompilerFunction;
);
#else
void PPC32CompilationCallback() {
- assert(0 && "This is not a power pc, you can't execute this!");
- abort();
+ LLVM_UNREACHABLE("This is not a power pc, you can't execute this!");
}
#endif
);
#else
void PPC64CompilationCallback() {
- assert(0 && "This is not a power pc, you can't execute this!");
- abort();
+ LLVM_UNREACHABLE("This is not a power pc, you can't execute this!");
}
#endif
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include <cstdlib>
case R30: case X30: case F30: case V30: case CR7EQ: return 30;
case R31: case X31: case F31: case V31: case CR7UN: return 31;
default:
- cerr << "Unhandled reg in PPCRegisterInfo::getRegisterNumbering!\n";
- abort();
+ LLVM_UNREACHABLE("Unhandled reg in PPCRegisterInfo::getRegisterNumbering!");
}
}
<< MO.getIndex();
break;
default:
- llvm_report_error("<unknown operand type>"); break;
+ LLVM_UNREACHABLE("<unknown operand type>");
}
if (CloseParen) O << ")";
}
case GlobalValue::InternalLinkage:
break;
case GlobalValue::GhostLinkage:
- llvm_report_error("Should not have any unmaterialized functions!");
+ LLVM_UNREACHABLE("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- llvm_report_error("DLLImport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- llvm_report_error("DLLExport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLExport linkage is not supported by this target!");
default:
LLVM_UNREACHABLE("Unknown linkage type!");
}
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
O << DispVal;
} else {
- llvm_report_error("non-immediate displacement for LEA?");
+ LLVM_UNREACHABLE("non-immediate displacement for LEA?");
//assert(DispSpec.isGlobal() || DispSpec.isCPI() ||
// DispSpec.isJTI() || DispSpec.isSymbol());
//printOperand(MI, Op+3, "mem");
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
-#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetOptions.h"
using namespace llvm;
}
if (!Desc->isVariadic() && CurOp != NumOps) {
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "Cannot encode: " << MI;
- llvm_report_error(Msg.str());
+#ifndef NDEBUG
+ cerr << "Cannot encode: " << MI << "\n";
+#endif
+ llvm_unreachable();
}
}
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Streams.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/Statistic.h"
using namespace llvm;
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/raw_ostream.h"
using namespace llvm;
static cl::opt<bool>
SDValue SrcPtr = Op.getOperand(1);
SDValue SrcSV = Op.getOperand(2);
- LLVM_UNREACHABLE("VAArgInst is not yet implemented for x86-64!");
+ llvm_report_error("VAArgInst is not yet implemented for x86-64!");
return SDValue();
}
case GlobalValue::PrivateLinkage:
break;
case GlobalValue::GhostLinkage:
- llvm_report_error("Should not have any unmaterialized functions!");
+ LLVM_UNREACHABLE("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- llvm_report_error("DLLImport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- llvm_report_error("DLLExport linkage is not supported by this target!");
+ LLVM_UNREACHABLE("DLLExport linkage is not supported by this target!");
default:
- assert(0 && "Unknown linkage type!");
+ LLVM_UNREACHABLE("Unknown linkage type!");
}
EmitAlignment(Align, GV, 2);
#include "llvm/Target/TargetLowering.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
#include <queue>
#include <set>
using namespace llvm;
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
#include "llvm/ADT/VectorExtras.h"
#include <queue>
#include <set>
}
const Type *Ty = cast<PointerType>(GV->getType())->getElementType();
if (!Ty->isSized() || isZeroLengthArray(Ty)) {
- llvm_report_error("Size of thread local object " + GVar->getName()
- + " is unknown");
+#ifndef NDEBUG
+ cerr << "Size of thread local object " << GVar->getName()
+ << " is unknown\n";
+#endif
+ llvm_unreachable();
}
SDValue base = getGlobalAddressWrapper(GA, GV, DAG);
const TargetData *TD = TM.getTargetData();
switch (RegVT.getSimpleVT()) {
default:
{
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
- << RegVT.getSimpleVT();
- llvm_report_error(Msg.str());
+#ifndef NDEBUG
+ cerr << "LowerFORMAL_ARGUMENTS Unhandled argument type: "
+ << RegVT.getSimpleVT() << "\n";
+#endif
+ llvm_unreachable();
}
case MVT::i32:
unsigned VReg = RegInfo.createVirtualRegister(
if (!isU6 && !isImmU16(Amount)) {
// FIX could emit multiple instructions in this case.
- std::string msg;
- raw_string_ostream Msg(msg);
- Msg << "eliminateCallFramePseudoInstr size too big: "
- << Amount;
- llvm_report_error(Msg.str());
+#ifndef NDEBUG
+ cerr << "eliminateCallFramePseudoInstr size too big: "
+ << Amount << "\n";
+#endif
+ llvm_unreachable();
}
MachineInstr *New;
#include "llvm/Support/CFG.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/Streams.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cctype>
case GlobalValue::ExternalWeakLinkage: Out << "extern_weak "; break;
case GlobalValue::ExternalLinkage: break;
case GlobalValue::GhostLinkage:
- llvm_report_error("GhostLinkage not allowed in AsmWriter!");
+ LLVM_UNREACHABLE("GhostLinkage not allowed in AsmWriter!");
}
}
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/LeakDetector.h"
+#include "llvm/Support/Streams.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
#include "llvm/Support/CallSite.h"
#include "llvm/Support/ConstantRange.h"
#include "llvm/Support/MathExtras.h"
+#include "llvm/Support/Streams.h"
using namespace llvm;
//===----------------------------------------------------------------------===//
}
void Type::refineAbstractType(const DerivedType *OldTy, const Type *NewTy) {
- llvm_report_error("Attempting to refine a derived type!");
+ LLVM_UNREACHABLE("Attempting to refine a derived type!");
}
void Type::typeBecameConcrete(const DerivedType *AbsTy) {
- llvm_report_error("DerivedType is already a concrete type!");
+ LLVM_UNREACHABLE("DerivedType is already a concrete type!");
}
#include "llvm/Support/LeakDetector.h"
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/ValueHandle.h"
+#include "llvm/Support/raw_ostream.h"
#include "llvm/System/RWMutex.h"
#include "llvm/System/Threading.h"
#include "llvm/ADT/DenseMap.h"
cerr << "While deleting: " << *V->getType() << " %" << V->getNameStr()
<< "\n";
#endif
- llvm_report_error("An asserting value handle still pointed to this"
- "value!");
+ LLVM_UNREACHABLE("An asserting value handle still pointed to this"
+ "value!");
case Weak:
// Weak just goes to null, which will unlink it from the list.
ThisNode->operator=(0);
default: assert(0 && "Unknown action");
case AbortProcessAction:
msgs << "compilation aborted!\n";
- llvm_report_error(msgs.str());
+ cerr << msgs.str();
+ // Client should choose different reaction if abort is not desired
+ abort();
case PrintMessageAction:
msgs << "verification continues.\n";
cerr << msgs.str();
projects / oota-llvm.git / commitdiff