* Fix one more bug in PIC codegen: extra load is needed for *all*

non-statics.
* Introduce new option to output zero-initialized data to .bss section.
This can reduce size of binaries. Enable it by default for ELF &
Cygwin/Mingw targets. Probably, Darwin should be also added.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33299 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/TargetAsmInfo.h b/include/llvm/Target/TargetAsmInfo.h
index 6d80a7ebc86e39848a958613237dc3c85fa760eb..1b957898f9fab401ca160a382ceb0e910fc811e1 100644 (file)
--- a/include/llvm/Target/TargetAsmInfo.h
+++ b/include/llvm/Target/TargetAsmInfo.h
@@ -38,6 +38,10 @@ namespace llvm {
     /// DataSection - Section directive for standard data.
     ///
     const char *DataSection;              // Defaults to ".data".
     /// DataSection - Section directive for standard data.
     ///
     const char *DataSection;              // Defaults to ".data".

+
+    /// BSSSection - Section directive for uninitialized data.
+    ///
+    const char *BSSSection;               // Default to ".bss".

     
     /// AddressSize - Size of addresses used in file.
     ///
     
     /// AddressSize - Size of addresses used in file.
     ///


@@ -313,6 +317,9 @@ namespace llvm {
     const char *getDataSection() const {
       return DataSection;
     }
     const char *getDataSection() const {
       return DataSection;
     }

+    const char *getBSSSection() const {
+      return BSSSection;
+    }

     unsigned getAddressSize() const {
       return AddressSize;
     }
     unsigned getAddressSize() const {
       return AddressSize;
     }

diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h
index 4d21b0b06030d7602b4317b32a510ebd51913459..89234de6445b860556db5d44b72420534ebccded 100644 (file)
--- a/include/llvm/Target/TargetOptions.h
+++ b/include/llvm/Target/TargetOptions.h
@@ -54,6 +54,8 @@ namespace llvm {
   /// generate libcalls to the software floating point library instead of
   /// target FP instructions.
   extern bool UseSoftFloat;
   /// generate libcalls to the software floating point library instead of
   /// target FP instructions.
   extern bool UseSoftFloat;

+
+  extern bool NoZerosInBSS;

 } // End llvm namespace
 
 #endif
 } // End llvm namespace
 
 #endif

diff --git a/lib/Target/TargetAsmInfo.cpp b/lib/Target/TargetAsmInfo.cpp
index b1845007440138881ffe225cdd0f249d5ea2626f..b90eaa16689190e0baed57ae4fe25309e1e8d997 100644 (file)
--- a/lib/Target/TargetAsmInfo.cpp
+++ b/lib/Target/TargetAsmInfo.cpp
@@ -19,6 +19,7 @@ using namespace llvm;
 TargetAsmInfo::TargetAsmInfo() :
   TextSection(".text"),
   DataSection(".data"),
 TargetAsmInfo::TargetAsmInfo() :
   TextSection(".text"),
   DataSection(".data"),

+  BSSSection(".bss"),

   AddressSize(4),
   NeedsSet(false),
   MaxInstLength(4),
   AddressSize(4),
   NeedsSet(false),
   MaxInstLength(4),

diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 7547614a717425d446f0ac5772b52eae0bd2bef5..f6b3fd09f0bc44dad308e70b2e2db51520149cb0 100644 (file)
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -28,6 +28,7 @@ namespace llvm {
   bool UnsafeFPMath;
   bool FiniteOnlyFPMathOption;
   bool UseSoftFloat;
   bool UnsafeFPMath;
   bool FiniteOnlyFPMathOption;
   bool UseSoftFloat;

+  bool NoZerosInBSS;

   Reloc::Model RelocationModel;
   CodeModel::Model CMModel;
 }
   Reloc::Model RelocationModel;
   CodeModel::Model CMModel;
 }


@@ -61,6 +62,11 @@ namespace {
                cl::desc("Generate software floating point library calls"),
                cl::location(UseSoftFloat),
                cl::init(false));
                cl::desc("Generate software floating point library calls"),
                cl::location(UseSoftFloat),
                cl::init(false));

+  cl::opt<bool, true>
+  DontPlaceZerosInBSS("nozero-initialized-in-bss",
+               cl::desc("Don't place zero-initialized symbols into bss section"),
+               cl::location(NoZerosInBSS),
+               cl::init(false));

 
   cl::opt<llvm::Reloc::Model, true>
   DefRelocationModel(
 
   cl::opt<llvm::Reloc::Model, true>
   DefRelocationModel(

diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp
index 02faf7cdb395eae4e42aa384ecae34732eba24e9..1dd53c7a02a1d282f38fe6a24782e6739a75dd36 100755 (executable)
--- a/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -323,22 +323,19 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
       O << Offset;
 
     if (isMemOp) {
       O << Offset;
 
     if (isMemOp) {

-      if (isExt) {
-        if (Subtarget->isPICStyleGOT()) {
+      if (Subtarget->isPICStyleGOT()) {
+        if (Subtarget->GVRequiresExtraLoad(GV, TM, false))

           O << "@GOT";
           O << "@GOT";

-        } else if (Subtarget->isPICStyleRIPRel()) {
+        else
+          O << "@GOTOFF";
+      } else     
+        if (isExt && Subtarget->isPICStyleRIPRel())

           O << "@GOTPCREL(%rip)";
           O << "@GOTPCREL(%rip)";

-        } else if (Subtarget->is64Bit() && !NotRIPRel)
-            // Use rip when possible to reduce code size, except when
-            // index or base register are also part of the address. e.g.
-            // foo(%rip)(%rcx,%rax,4) is not legal
-            O << "(%rip)";
-      } else {
-        if (Subtarget->is64Bit() && !NotRIPRel)
+        else if (Subtarget->is64Bit() && !NotRIPRel)
+          // Use rip when possible to reduce code size, except when
+          // index or base register are also part of the address. e.g.
+          // foo(%rip)(%rcx,%rax,4) is not legal

           O << "(%rip)";
           O << "(%rip)";

-        else if (Subtarget->isPICStyleGOT())
-          O << "@GOTOFF";
-      }

     }
 
     return;
     }
 
     return;

diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 767ab23ce3bcec3b7af7c58306bd1c2e163591de..bea3914fe649be3752c28655937186af58546e7d 100644 (file)
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -28,6 +28,7 @@
 #include "llvm/Assembly/Writer.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Target/TargetAsmInfo.h"
 #include "llvm/Assembly/Writer.h"
 #include "llvm/Support/Mangler.h"
 #include "llvm/Target/TargetAsmInfo.h"

+#include "llvm/Target/TargetOptions.h"

 using namespace llvm;
 
 static X86FunctionInfo calculateFunctionInfo(const Function *F,
 using namespace llvm;
 
 static X86FunctionInfo calculateFunctionInfo(const Function *F,


@@ -149,7 +150,10 @@ bool X86SharedAsmPrinter::doFinalization(Module &M) {
           O << "\t.zerofill __DATA__, __common, " << name << ", "
             << Size << ", " << Align;
       } else {
           O << "\t.zerofill __DATA__, __common, " << name << ", "
             << Size << ", " << Align;
       } else {

-        SwitchToDataSection(TAI->getDataSection(), I);
+        if (!NoZerosInBSS && TAI->getBSSSection())
+          SwitchToDataSection(TAI->getBSSSection(), I);
+        else
+          SwitchToDataSection(TAI->getDataSection(), I);

         if (TAI->getLCOMMDirective() != NULL) {
           if (I->hasInternalLinkage()) {
             O << TAI->getLCOMMDirective() << name << "," << Size;
         if (TAI->getLCOMMDirective() != NULL) {
           if (I->hasInternalLinkage()) {
             O << TAI->getLCOMMDirective() << name << "," << Size;


@@ -224,7 +228,10 @@ bool X86SharedAsmPrinter::doFinalization(Module &M) {
 
           SwitchToDataSection(SectionName.c_str());
         } else {
 
           SwitchToDataSection(SectionName.c_str());
         } else {

-          SwitchToDataSection(TAI->getDataSection(), I);
+          if (C->isNullValue() && !NoZerosInBSS && TAI->getBSSSection())
+            SwitchToDataSection(TAI->getBSSSection(), I);
+          else
+            SwitchToDataSection(TAI->getDataSection(), I);

         }
         
         break;
         }
         
         break;

diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp
index 5f2342ff4d3ab805132b5b729841db0e7e40d1f6..be5c64d6d3bc7ab6741577bbf03d8fc6ba62058c 100644 (file)
--- a/lib/Target/X86/X86Subtarget.cpp
+++ b/lib/Target/X86/X86Subtarget.cpp
@@ -36,10 +36,14 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV,
                                        bool isDirectCall) const
 {
   if (TM.getRelocationModel() != Reloc::Static)
                                        bool isDirectCall) const
 {
   if (TM.getRelocationModel() != Reloc::Static)

-    if (isTargetDarwin() || isPICStyleGOT()) {
+    if (isTargetDarwin()) {

       return (!isDirectCall &&
               (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
                (GV->isExternal() && !GV->hasNotBeenReadFromBytecode())));
       return (!isDirectCall &&
               (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
                (GV->isExternal() && !GV->hasNotBeenReadFromBytecode())));

+    } else if (isPICStyleGOT()) {
+      // Extra load is needed for all non-statics.
+      return (!isDirectCall &&
+              (GV->isExternal() || !GV->hasInternalLinkage()));

     } else if (isTargetCygMing() || isTargetWindows()) {
       return (GV->hasDLLImportLinkage());
     }
     } else if (isTargetCygMing() || isTargetWindows()) {
       return (GV->hasDLLImportLinkage());
     }

diff --git a/test/CodeGen/X86/test-pic-6.ll b/test/CodeGen/X86/test-pic-6.ll
new file mode 100644 (file)
index 0000000..9f29531
--- /dev/null
+++ b/test/CodeGen/X86/test-pic-6.ll
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic &&
+; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep _GLOBAL_OFFSET_TABLE_ &&
+; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep piclabel | wc -l | grep 3 &&
+; RUN: llvm-as < %s | llc -mtriple=i686-pc-linux-gnu -relocation-model=pic | grep GOT | wc -l | grep 3
+
+%ptr = global i32* null
+%dst = global i32 0
+%src = global i32 0
+
+define void %foo() {
+entry:
+    store i32* %dst, i32** %ptr
+    %tmp.s = load i32* %src
+    store i32 %tmp.s, i32* %dst
+    ret void
+}
+