1 //===-- X86ATTAsmPrinter.cpp - Convert X86 LLVM code to Intel assembly ----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to AT&T format assembly
12 // language. This printer is the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "asm-printer"
17 #include "X86ATTAsmPrinter.h"
20 #include "X86MachineFunctionInfo.h"
21 #include "X86TargetMachine.h"
22 #include "X86TargetAsmInfo.h"
23 #include "llvm/ADT/StringExtras.h"
24 #include "llvm/CallingConv.h"
25 #include "llvm/Module.h"
26 #include "llvm/Support/Mangler.h"
27 #include "llvm/Target/TargetAsmInfo.h"
28 #include "llvm/Target/TargetOptions.h"
29 #include "llvm/ADT/Statistic.h"
32 STATISTIC(EmittedInsts, "Number of machine instrs printed");
34 static std::string computePICLabel(unsigned fnNumber,
35 const X86Subtarget* Subtarget)
39 if (Subtarget->isTargetDarwin()) {
40 label = "\"L" + utostr_32(fnNumber) + "$pb\"";
41 } else if (Subtarget->isTargetELF()) {
42 label = ".Lllvm$" + utostr_32(fnNumber) + "$piclabel";
44 assert(0 && "Don't know how to print PIC label!\n");
49 /// getSectionForFunction - Return the section that we should emit the
50 /// specified function body into.
51 std::string X86ATTAsmPrinter::getSectionForFunction(const Function &F) const {
52 switch (F.getLinkage()) {
53 default: assert(0 && "Unknown linkage type!");
54 case Function::InternalLinkage:
55 case Function::DLLExportLinkage:
56 case Function::ExternalLinkage:
57 return TAI->getTextSection();
58 case Function::WeakLinkage:
59 case Function::LinkOnceLinkage:
60 if (Subtarget->isTargetDarwin()) {
61 return ".section __TEXT,__textcoal_nt,coalesced,pure_instructions";
62 } else if (Subtarget->isTargetCygMing()) {
63 return "\t.section\t.text$linkonce." + CurrentFnName + ",\"ax\"\n";
65 return "\t.section\t.llvm.linkonce.t." + CurrentFnName +
66 ",\"ax\",@progbits\n";
71 /// runOnMachineFunction - This uses the printMachineInstruction()
72 /// method to print assembly for each instruction.
74 bool X86ATTAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
75 if (Subtarget->isTargetDarwin() ||
76 Subtarget->isTargetELF() ||
77 Subtarget->isTargetCygMing()) {
78 // Let PassManager know we need debug information and relay
79 // the MachineDebugInfo address on to DwarfWriter.
80 DW.SetDebugInfo(&getAnalysis<MachineDebugInfo>());
83 SetupMachineFunction(MF);
86 // Print out constants referenced by the function
87 EmitConstantPool(MF.getConstantPool());
89 // Print out labels for the function.
90 const Function *F = MF.getFunction();
91 unsigned CC = F->getCallingConv();
93 // Populate function information map. Actually, We don't want to populate
94 // non-stdcall or non-fastcall functions' information right now.
95 if (CC == CallingConv::X86_StdCall || CC == CallingConv::X86_FastCall)
96 FunctionInfoMap[F] = *MF.getInfo<X86FunctionInfo>();
98 X86SharedAsmPrinter::decorateName(CurrentFnName, F);
100 SwitchToTextSection(getSectionForFunction(*F).c_str(), F);
102 switch (F->getLinkage()) {
103 default: assert(0 && "Unknown linkage type!");
104 case Function::InternalLinkage: // Symbols default to internal.
105 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
107 case Function::DLLExportLinkage:
108 DLLExportedFns.insert(Mang->makeNameProper(F->getName(), ""));
110 case Function::ExternalLinkage:
111 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
112 O << "\t.globl\t" << CurrentFnName << "\n";
114 case Function::LinkOnceLinkage:
115 case Function::WeakLinkage:
116 if (Subtarget->isTargetDarwin()) {
117 O << "\t.globl\t" << CurrentFnName << "\n";
118 O << "\t.weak_definition\t" << CurrentFnName << "\n";
119 } else if (Subtarget->isTargetCygMing()) {
120 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
121 O << "\t.linkonce discard\n";
122 O << "\t.globl " << CurrentFnName << "\n";
124 EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
125 O << "\t.weak " << CurrentFnName << "\n";
129 if (F->hasHiddenVisibility())
130 if (const char *Directive = TAI->getHiddenDirective())
131 O << Directive << CurrentFnName << "\n";
133 if (Subtarget->isTargetELF())
134 O << "\t.type " << CurrentFnName << ",@function\n";
135 else if (Subtarget->isTargetCygMing()) {
136 O << "\t.def\t " << CurrentFnName
138 (F->getLinkage() == Function::InternalLinkage ? COFF::C_STAT : COFF::C_EXT)
139 << ";\t.type\t" << (COFF::DT_FCN << COFF::N_BTSHFT)
143 O << CurrentFnName << ":\n";
144 // Add some workaround for linkonce linkage on Cygwin\MinGW
145 if (Subtarget->isTargetCygMing() &&
146 (F->getLinkage() == Function::LinkOnceLinkage ||
147 F->getLinkage() == Function::WeakLinkage))
148 O << "Lllvm$workaround$fake$stub$" << CurrentFnName << ":\n";
150 if (Subtarget->isTargetDarwin() ||
151 Subtarget->isTargetELF() ||
152 Subtarget->isTargetCygMing()) {
153 // Emit pre-function debug information.
154 DW.BeginFunction(&MF);
157 // Print out code for the function.
158 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
160 // Print a label for the basic block.
161 if (I->pred_begin() != I->pred_end()) {
162 printBasicBlockLabel(I, true);
165 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
167 // Print the assembly for the instruction.
169 printMachineInstruction(II);
173 // Print out jump tables referenced by the function.
175 // Mac OS X requires that the jump table follow the function, so that the jump
176 // table is part of the same atom that the function is in.
177 EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
179 if (TAI->hasDotTypeDotSizeDirective())
180 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
182 if (Subtarget->isTargetDarwin() ||
183 Subtarget->isTargetELF() ||
184 Subtarget->isTargetCygMing()) {
185 // Emit post-function debug information.
189 // We didn't modify anything.
193 void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
194 const char *Modifier, bool NotRIPRel) {
195 const MachineOperand &MO = MI->getOperand(OpNo);
196 const MRegisterInfo &RI = *TM.getRegisterInfo();
197 switch (MO.getType()) {
198 case MachineOperand::MO_Register: {
199 assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
200 "Virtual registers should not make it this far!");
202 unsigned Reg = MO.getReg();
203 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
204 MVT::ValueType VT = (strcmp(Modifier+6,"64") == 0) ?
205 MVT::i64 : ((strcmp(Modifier+6, "32") == 0) ? MVT::i32 :
206 ((strcmp(Modifier+6,"16") == 0) ? MVT::i16 : MVT::i8));
207 Reg = getX86SubSuperRegister(Reg, VT);
209 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
210 O << (char)tolower(*Name);
214 case MachineOperand::MO_Immediate:
215 if (!Modifier || strcmp(Modifier, "debug") != 0)
217 O << MO.getImmedValue();
219 case MachineOperand::MO_MachineBasicBlock:
220 printBasicBlockLabel(MO.getMachineBasicBlock());
222 case MachineOperand::MO_JumpTableIndex: {
223 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
224 if (!isMemOp) O << '$';
225 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
226 << MO.getJumpTableIndex();
228 if (TM.getRelocationModel() == Reloc::PIC_) {
229 if (Subtarget->isPICStyleStub())
230 O << "-\"L" << getFunctionNumber() << "$pb\"";
231 else if (Subtarget->isPICStyleGOT())
235 if (isMemOp && Subtarget->is64Bit() && !NotRIPRel)
239 case MachineOperand::MO_ConstantPoolIndex: {
240 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
241 if (!isMemOp) O << '$';
242 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
243 << MO.getConstantPoolIndex();
245 if (TM.getRelocationModel() == Reloc::PIC_) {
246 if (Subtarget->isPICStyleStub())
247 O << "-\"L" << getFunctionNumber() << "$pb\"";
248 if (Subtarget->isPICStyleGOT())
252 int Offset = MO.getOffset();
258 if (isMemOp && Subtarget->is64Bit() && !NotRIPRel)
262 case MachineOperand::MO_GlobalAddress: {
263 bool isCallOp = Modifier && !strcmp(Modifier, "call");
264 bool isMemOp = Modifier && !strcmp(Modifier, "mem");
265 if (!isMemOp && !isCallOp) O << '$';
267 GlobalValue *GV = MO.getGlobal();
268 std::string Name = Mang->getValueName(GV);
270 bool isExt = (GV->isExternal() || GV->hasWeakLinkage() ||
271 GV->hasLinkOnceLinkage());
272 bool isHidden = GV->hasHiddenVisibility();
274 X86SharedAsmPrinter::decorateName(Name, GV);
276 if (Subtarget->isPICStyleStub()) {
277 // Link-once, External, or Weakly-linked global variables need
278 // non-lazily-resolved stubs
280 // Dynamically-resolved functions need a stub for the function.
281 if (isCallOp && isa<Function>(GV)) {
282 FnStubs.insert(Name);
283 O << "L" << Name << "$stub";
285 GVStubs.insert(Name);
286 O << "L" << Name << "$non_lazy_ptr";
289 if (GV->hasDLLImportLinkage()) {
295 if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
296 O << "-\"L" << getFunctionNumber() << "$pb\"";
298 if (GV->hasDLLImportLinkage()) {
303 if (isCallOp && isa<Function>(GV)) {
304 if (Subtarget->isPICStyleGOT()) {
305 // Assemble call via PLT for non-local symbols
306 if (!isHidden || GV->isExternal())
309 if (Subtarget->isTargetCygMing() && GV->isExternal()) {
310 // Save function name for later type emission
311 FnStubs.insert(Name);
316 if (GV->hasExternalWeakLinkage())
317 ExtWeakSymbols.insert(GV);
319 int Offset = MO.getOffset();
326 if (Subtarget->isPICStyleGOT()) {
327 if (Subtarget->GVRequiresExtraLoad(GV, TM, false))
332 if (isExt && Subtarget->isPICStyleRIPRel())
333 O << "@GOTPCREL(%rip)";
334 else if (Subtarget->is64Bit() && !NotRIPRel)
335 // Use rip when possible to reduce code size, except when
336 // index or base register are also part of the address. e.g.
337 // foo(%rip)(%rcx,%rax,4) is not legal
343 case MachineOperand::MO_ExternalSymbol: {
344 bool isCallOp = Modifier && !strcmp(Modifier, "call");
345 std::string Name(TAI->getGlobalPrefix());
346 Name += MO.getSymbolName();
347 if (isCallOp && Subtarget->isPICStyleStub()) {
348 FnStubs.insert(Name);
349 O << "L" << Name << "$stub";
352 if (!isCallOp) O << '$';
355 if (Subtarget->isPICStyleGOT()) {
356 std::string GOTName(TAI->getGlobalPrefix());
357 GOTName+="_GLOBAL_OFFSET_TABLE_";
359 // Really hack! Emit extra offset to PC during printing GOT offset to
360 // compensate size of popl instruction. The resulting code should look
364 // popl %some_register
365 // addl $_GLOBAL_ADDRESS_TABLE_ + [.-piclabel], %some_register
366 O << " + [.-" << computePICLabel(getFunctionNumber(), Subtarget) << "]";
369 if (isCallOp && Subtarget->isPICStyleGOT())
372 if (!isCallOp && Subtarget->is64Bit())
378 O << "<unknown operand type>"; return;
382 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
383 unsigned char value = MI->getOperand(Op).getImmedValue();
384 assert(value <= 7 && "Invalid ssecc argument!");
386 case 0: O << "eq"; break;
387 case 1: O << "lt"; break;
388 case 2: O << "le"; break;
389 case 3: O << "unord"; break;
390 case 4: O << "neq"; break;
391 case 5: O << "nlt"; break;
392 case 6: O << "nle"; break;
393 case 7: O << "ord"; break;
397 void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
398 const char *Modifier){
399 assert(isMem(MI, Op) && "Invalid memory reference!");
400 MachineOperand BaseReg = MI->getOperand(Op);
401 MachineOperand IndexReg = MI->getOperand(Op+2);
402 const MachineOperand &DispSpec = MI->getOperand(Op+3);
404 bool NotRIPRel = IndexReg.getReg() || BaseReg.getReg();
405 if (DispSpec.isGlobalAddress() ||
406 DispSpec.isConstantPoolIndex() ||
407 DispSpec.isJumpTableIndex()) {
408 printOperand(MI, Op+3, "mem", NotRIPRel);
410 int DispVal = DispSpec.getImmedValue();
411 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
415 if (IndexReg.getReg() || BaseReg.getReg()) {
416 unsigned ScaleVal = MI->getOperand(Op+1).getImmedValue();
417 unsigned BaseRegOperand = 0, IndexRegOperand = 2;
419 // There are cases where we can end up with ESP/RSP in the indexreg slot.
420 // If this happens, swap the base/index register to support assemblers that
421 // don't work when the index is *SP.
422 if (IndexReg.getReg() == X86::ESP || IndexReg.getReg() == X86::RSP) {
423 assert(ScaleVal == 1 && "Scale not supported for stack pointer!");
424 std::swap(BaseReg, IndexReg);
425 std::swap(BaseRegOperand, IndexRegOperand);
429 if (BaseReg.getReg())
430 printOperand(MI, Op+BaseRegOperand, Modifier);
432 if (IndexReg.getReg()) {
434 printOperand(MI, Op+IndexRegOperand, Modifier);
436 O << "," << ScaleVal;
442 void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
443 std::string label = computePICLabel(getFunctionNumber(), Subtarget);
444 O << label << "\n" << label << ":";
448 bool X86ATTAsmPrinter::printAsmMRegister(const MachineOperand &MO,
450 const MRegisterInfo &RI = *TM.getRegisterInfo();
451 unsigned Reg = MO.getReg();
453 default: return true; // Unknown mode.
454 case 'b': // Print QImode register
455 Reg = getX86SubSuperRegister(Reg, MVT::i8);
457 case 'h': // Print QImode high register
458 Reg = getX86SubSuperRegister(Reg, MVT::i8, true);
460 case 'w': // Print HImode register
461 Reg = getX86SubSuperRegister(Reg, MVT::i16);
463 case 'k': // Print SImode register
464 Reg = getX86SubSuperRegister(Reg, MVT::i32);
469 for (const char *Name = RI.get(Reg).Name; *Name; ++Name)
470 O << (char)tolower(*Name);
474 /// PrintAsmOperand - Print out an operand for an inline asm expression.
476 bool X86ATTAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
478 const char *ExtraCode) {
479 // Does this asm operand have a single letter operand modifier?
480 if (ExtraCode && ExtraCode[0]) {
481 if (ExtraCode[1] != 0) return true; // Unknown modifier.
483 switch (ExtraCode[0]) {
484 default: return true; // Unknown modifier.
485 case 'c': // Don't print "$" before a global var name.
486 printOperand(MI, OpNo, "mem");
488 case 'b': // Print QImode register
489 case 'h': // Print QImode high register
490 case 'w': // Print HImode register
491 case 'k': // Print SImode register
492 return printAsmMRegister(MI->getOperand(OpNo), ExtraCode[0]);
496 printOperand(MI, OpNo);
500 bool X86ATTAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
503 const char *ExtraCode) {
504 if (ExtraCode && ExtraCode[0])
505 return true; // Unknown modifier.
506 printMemReference(MI, OpNo);
510 /// printMachineInstruction -- Print out a single X86 LLVM instruction
511 /// MI in Intel syntax to the current output stream.
513 void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
516 // See if a truncate instruction can be turned into a nop.
517 switch (MI->getOpcode()) {
519 case X86::TRUNC_64to32:
520 case X86::TRUNC_64to16:
521 case X86::TRUNC_32to16:
522 case X86::TRUNC_32to8:
523 case X86::TRUNC_16to8:
524 case X86::TRUNC_32_to8:
525 case X86::TRUNC_16_to8: {
526 const MachineOperand &MO0 = MI->getOperand(0);
527 const MachineOperand &MO1 = MI->getOperand(1);
528 unsigned Reg0 = MO0.getReg();
529 unsigned Reg1 = MO1.getReg();
530 unsigned Opc = MI->getOpcode();
531 if (Opc == X86::TRUNC_64to32)
532 Reg1 = getX86SubSuperRegister(Reg1, MVT::i32);
533 else if (Opc == X86::TRUNC_32to16 || Opc == X86::TRUNC_64to16)
534 Reg1 = getX86SubSuperRegister(Reg1, MVT::i16);
536 Reg1 = getX86SubSuperRegister(Reg1, MVT::i8);
537 O << TAI->getCommentString() << " TRUNCATE ";
542 case X86::PsMOVZX64rr32:
543 O << TAI->getCommentString() << " ZERO-EXTEND " << "\n\t";
547 // Call the autogenerated instruction printer routines.
548 printInstruction(MI);
551 // Include the auto-generated portion of the assembly writer.
552 #include "X86GenAsmWriter.inc"