1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the AArch64 implementation of the MCRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_AARCH64REGISTERINFO_H
15 #define LLVM_TARGET_AARCH64REGISTERINFO_H
17 #include "llvm/Target/TargetRegisterInfo.h"
19 #define GET_REGINFO_HEADER
20 #include "AArch64GenRegisterInfo.inc"
24 class AArch64InstrInfo;
25 class AArch64Subtarget;
27 struct AArch64RegisterInfo : public AArch64GenRegisterInfo {
29 const AArch64InstrInfo &TII;
32 AArch64RegisterInfo(const AArch64InstrInfo &tii,
33 const AArch64Subtarget &sti);
35 const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
36 const uint32_t *getCallPreservedMask(CallingConv::ID) const;
38 const uint32_t *getTLSDescCallPreservedMask() const;
40 BitVector getReservedRegs(const MachineFunction &MF) const;
41 unsigned getFrameRegister(const MachineFunction &MF) const;
43 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
44 unsigned FIOperandNum,
45 RegScavenger *Rs = NULL) const;
47 void eliminateCallFramePseudoInstr(MachineFunction &MF,
48 MachineBasicBlock &MBB,
49 MachineBasicBlock::iterator MI) const;
51 /// getCrossCopyRegClass - Returns a legal register class to copy a register
52 /// in the specified class to or from. Returns original class if it is
53 /// possible to copy between a two registers of the specified class.
54 const TargetRegisterClass *
55 getCrossCopyRegClass(const TargetRegisterClass *RC) const;
57 /// getLargestLegalSuperClass - Returns the largest super class of RC that is
58 /// legal to use in the current sub-target and has the same spill size.
59 const TargetRegisterClass*
60 getLargestLegalSuperClass(const TargetRegisterClass *RC) const {
61 if (RC == &AArch64::tcGPR64RegClass)
62 return &AArch64::GPR64RegClass;
67 bool requiresRegisterScavenging(const MachineFunction &MF) const {
71 bool requiresFrameIndexScavenging(const MachineFunction &MF) const {
75 bool useFPForScavengingIndex(const MachineFunction &MF) const;
78 } // end namespace llvm
80 #endif // LLVM_TARGET_AARCH64REGISTERINFO_H