1 //===------ RegAllocPBQP.cpp ---- PBQP Register Allocator -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a Partitioned Boolean Quadratic Programming (PBQP) based
11 // register allocator for LLVM. This allocator works by constructing a PBQP
12 // problem representing the register allocation problem under consideration,
13 // solving this using a PBQP solver, and mapping the solution back to a
14 // register assignment. If any variables are selected for spilling then spill
15 // code is inserted and the process repeated.
17 // The PBQP solver (pbqp.c) provided for this allocator uses a heuristic tuned
18 // for register allocation. For more information on PBQP for register
19 // allocation, see the following papers:
21 // (1) Hames, L. and Scholz, B. 2006. Nearly optimal register allocation with
22 // PBQP. In Proceedings of the 7th Joint Modular Languages Conference
23 // (JMLC'06). LNCS, vol. 4228. Springer, New York, NY, USA. 346-361.
25 // (2) Scholz, B., Eckstein, E. 2002. Register allocation for irregular
26 // architectures. In Proceedings of the Joint Conference on Languages,
27 // Compilers and Tools for Embedded Systems (LCTES'02), ACM Press, New York,
30 //===----------------------------------------------------------------------===//
32 #include "llvm/CodeGen/RegAllocPBQP.h"
33 #include "RegisterCoalescer.h"
35 #include "llvm/Analysis/AliasAnalysis.h"
36 #include "llvm/CodeGen/CalcSpillWeights.h"
37 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
38 #include "llvm/CodeGen/LiveRangeEdit.h"
39 #include "llvm/CodeGen/LiveStackAnalysis.h"
40 #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
41 #include "llvm/CodeGen/MachineDominators.h"
42 #include "llvm/CodeGen/MachineFunctionPass.h"
43 #include "llvm/CodeGen/MachineLoopInfo.h"
44 #include "llvm/CodeGen/MachineRegisterInfo.h"
45 #include "llvm/CodeGen/RegAllocRegistry.h"
46 #include "llvm/CodeGen/VirtRegMap.h"
47 #include "llvm/IR/Module.h"
48 #include "llvm/Support/Debug.h"
49 #include "llvm/Support/FileSystem.h"
50 #include "llvm/Support/raw_ostream.h"
51 #include "llvm/Target/TargetInstrInfo.h"
52 #include "llvm/Target/TargetMachine.h"
61 #define DEBUG_TYPE "regalloc"
63 static RegisterRegAlloc
64 registerPBQPRepAlloc("pbqp", "PBQP register allocator",
65 createDefaultPBQPRegisterAllocator);
68 pbqpCoalescing("pbqp-coalescing",
69 cl::desc("Attempt coalescing during PBQP register allocation."),
70 cl::init(false), cl::Hidden);
74 pbqpDumpGraphs("pbqp-dump-graphs",
75 cl::desc("Dump graphs for each function/round in the compilation unit."),
76 cl::init(false), cl::Hidden);
82 /// PBQP based allocators solve the register allocation problem by mapping
83 /// register allocation problems to Partitioned Boolean Quadratic
84 /// Programming problems.
85 class RegAllocPBQP : public MachineFunctionPass {
90 /// Construct a PBQP register allocator.
91 RegAllocPBQP(std::unique_ptr<PBQPBuilder> &b, char *cPassID=nullptr)
92 : MachineFunctionPass(ID), builder(b.release()), customPassID(cPassID) {
93 initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
94 initializeLiveIntervalsPass(*PassRegistry::getPassRegistry());
95 initializeLiveStacksPass(*PassRegistry::getPassRegistry());
96 initializeVirtRegMapPass(*PassRegistry::getPassRegistry());
99 /// Return the pass name.
100 const char* getPassName() const override {
101 return "PBQP Register Allocator";
104 /// PBQP analysis usage.
105 void getAnalysisUsage(AnalysisUsage &au) const override;
107 /// Perform register allocation
108 bool runOnMachineFunction(MachineFunction &MF) override;
112 typedef std::map<const LiveInterval*, unsigned> LI2NodeMap;
113 typedef std::vector<const LiveInterval*> Node2LIMap;
114 typedef std::vector<unsigned> AllowedSet;
115 typedef std::vector<AllowedSet> AllowedSetMap;
116 typedef std::pair<unsigned, unsigned> RegPair;
117 typedef std::map<RegPair, PBQP::PBQPNum> CoalesceMap;
118 typedef std::set<unsigned> RegSet;
120 std::unique_ptr<PBQPBuilder> builder;
125 const TargetMachine *tm;
126 const TargetRegisterInfo *tri;
127 const TargetInstrInfo *tii;
128 MachineRegisterInfo *mri;
129 const MachineBlockFrequencyInfo *mbfi;
131 std::unique_ptr<Spiller> spiller;
136 RegSet vregsToAlloc, emptyIntervalVRegs;
138 /// \brief Finds the initial set of vreg intervals to allocate.
139 void findVRegIntervalsToAlloc();
141 /// \brief Given a solved PBQP problem maps this solution back to a register
143 bool mapPBQPToRegAlloc(const PBQPRAProblem &problem,
144 const PBQP::Solution &solution);
146 /// \brief Postprocessing before final spilling. Sets basic block "live in"
148 void finalizeAlloc() const;
152 char RegAllocPBQP::ID = 0;
154 } // End anonymous namespace.
156 unsigned PBQPRAProblem::getVRegForNode(PBQPRAGraph::NodeId node) const {
157 Node2VReg::const_iterator vregItr = node2VReg.find(node);
158 assert(vregItr != node2VReg.end() && "No vreg for node.");
159 return vregItr->second;
162 PBQPRAGraph::NodeId PBQPRAProblem::getNodeForVReg(unsigned vreg) const {
163 VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg);
164 assert(nodeItr != vreg2Node.end() && "No node for vreg.");
165 return nodeItr->second;
169 const PBQPRAProblem::AllowedSet&
170 PBQPRAProblem::getAllowedSet(unsigned vreg) const {
171 AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg);
172 assert(allowedSetItr != allowedSets.end() && "No pregs for vreg.");
173 const AllowedSet &allowedSet = allowedSetItr->second;
177 unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const {
178 assert(isPRegOption(vreg, option) && "Not a preg option.");
180 const AllowedSet& allowedSet = getAllowedSet(vreg);
181 assert(option <= allowedSet.size() && "Option outside allowed set.");
182 return allowedSet[option - 1];
185 PBQPRAProblem *PBQPBuilder::build(MachineFunction *mf, const LiveIntervals *lis,
186 const MachineBlockFrequencyInfo *mbfi,
187 const RegSet &vregs) {
189 LiveIntervals *LIS = const_cast<LiveIntervals*>(lis);
190 MachineRegisterInfo *mri = &mf->getRegInfo();
191 const TargetRegisterInfo *tri = mf->getTarget().getRegisterInfo();
193 std::unique_ptr<PBQPRAProblem> p(new PBQPRAProblem());
194 PBQPRAGraph &g = p->getGraph();
197 // Collect the set of preg intervals, record that they're used in the MF.
198 for (unsigned Reg = 1, e = tri->getNumRegs(); Reg != e; ++Reg) {
199 if (mri->def_empty(Reg))
202 mri->setPhysRegUsed(Reg);
205 // Iterate over vregs.
206 for (RegSet::const_iterator vregItr = vregs.begin(), vregEnd = vregs.end();
207 vregItr != vregEnd; ++vregItr) {
208 unsigned vreg = *vregItr;
209 const TargetRegisterClass *trc = mri->getRegClass(vreg);
210 LiveInterval *vregLI = &LIS->getInterval(vreg);
212 // Record any overlaps with regmask operands.
213 BitVector regMaskOverlaps;
214 LIS->checkRegMaskInterference(*vregLI, regMaskOverlaps);
216 // Compute an initial allowed set for the current vreg.
217 typedef std::vector<unsigned> VRAllowed;
219 ArrayRef<MCPhysReg> rawOrder = trc->getRawAllocationOrder(*mf);
220 for (unsigned i = 0; i != rawOrder.size(); ++i) {
221 unsigned preg = rawOrder[i];
222 if (mri->isReserved(preg))
225 // vregLI crosses a regmask operand that clobbers preg.
226 if (!regMaskOverlaps.empty() && !regMaskOverlaps.test(preg))
229 // vregLI overlaps fixed regunit interference.
230 bool Interference = false;
231 for (MCRegUnitIterator Units(preg, tri); Units.isValid(); ++Units) {
232 if (vregLI->overlaps(LIS->getRegUnit(*Units))) {
240 // preg is usable for this virtual register.
241 vrAllowed.push_back(preg);
244 PBQP::Vector nodeCosts(vrAllowed.size() + 1, 0);
246 PBQP::PBQPNum spillCost = (vregLI->weight != 0.0) ?
247 vregLI->weight : std::numeric_limits<PBQP::PBQPNum>::min();
249 addSpillCosts(nodeCosts, spillCost);
251 // Construct the node.
252 PBQPRAGraph::NodeId nId = g.addNode(std::move(nodeCosts));
254 // Record the mapping and allowed set in the problem.
255 p->recordVReg(vreg, nId, vrAllowed.begin(), vrAllowed.end());
259 for (RegSet::const_iterator vr1Itr = vregs.begin(), vrEnd = vregs.end();
260 vr1Itr != vrEnd; ++vr1Itr) {
261 unsigned vr1 = *vr1Itr;
262 const LiveInterval &l1 = lis->getInterval(vr1);
263 const PBQPRAProblem::AllowedSet &vr1Allowed = p->getAllowedSet(vr1);
265 for (RegSet::const_iterator vr2Itr = std::next(vr1Itr); vr2Itr != vrEnd;
267 unsigned vr2 = *vr2Itr;
268 const LiveInterval &l2 = lis->getInterval(vr2);
269 const PBQPRAProblem::AllowedSet &vr2Allowed = p->getAllowedSet(vr2);
271 assert(!l2.empty() && "Empty interval in vreg set?");
272 if (l1.overlaps(l2)) {
273 PBQP::Matrix edgeCosts(vr1Allowed.size()+1, vr2Allowed.size()+1, 0);
274 addInterferenceCosts(edgeCosts, vr1Allowed, vr2Allowed, tri);
276 g.addEdge(p->getNodeForVReg(vr1), p->getNodeForVReg(vr2),
277 std::move(edgeCosts));
285 void PBQPBuilder::addSpillCosts(PBQP::Vector &costVec,
286 PBQP::PBQPNum spillCost) {
287 costVec[0] = spillCost;
290 void PBQPBuilder::addInterferenceCosts(
291 PBQP::Matrix &costMat,
292 const PBQPRAProblem::AllowedSet &vr1Allowed,
293 const PBQPRAProblem::AllowedSet &vr2Allowed,
294 const TargetRegisterInfo *tri) {
295 assert(costMat.getRows() == vr1Allowed.size() + 1 && "Matrix height mismatch.");
296 assert(costMat.getCols() == vr2Allowed.size() + 1 && "Matrix width mismatch.");
298 for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
299 unsigned preg1 = vr1Allowed[i];
301 for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
302 unsigned preg2 = vr2Allowed[j];
304 if (tri->regsOverlap(preg1, preg2)) {
305 costMat[i + 1][j + 1] = std::numeric_limits<PBQP::PBQPNum>::infinity();
311 PBQPRAProblem *PBQPBuilderWithCoalescing::build(MachineFunction *mf,
312 const LiveIntervals *lis,
313 const MachineBlockFrequencyInfo *mbfi,
314 const RegSet &vregs) {
316 std::unique_ptr<PBQPRAProblem> p(PBQPBuilder::build(mf, lis, mbfi, vregs));
317 PBQPRAGraph &g = p->getGraph();
319 const TargetMachine &tm = mf->getTarget();
320 CoalescerPair cp(*tm.getRegisterInfo());
322 // Scan the machine function and add a coalescing cost whenever CoalescerPair
324 for (MachineFunction::const_iterator mbbItr = mf->begin(),
326 mbbItr != mbbEnd; ++mbbItr) {
327 const MachineBasicBlock *mbb = &*mbbItr;
329 for (MachineBasicBlock::const_iterator miItr = mbb->begin(),
331 miItr != miEnd; ++miItr) {
332 const MachineInstr *mi = &*miItr;
334 if (!cp.setRegisters(mi)) {
335 continue; // Not coalescable.
338 if (cp.getSrcReg() == cp.getDstReg()) {
339 continue; // Already coalesced.
342 unsigned dst = cp.getDstReg(),
343 src = cp.getSrcReg();
345 const float copyFactor = 0.5; // Cost of copy relative to load. Current
346 // value plucked randomly out of the air.
348 PBQP::PBQPNum cBenefit =
349 copyFactor * LiveIntervals::getSpillWeight(false, true, mbfi, mi);
352 if (!mf->getRegInfo().isAllocatable(dst)) {
356 const PBQPRAProblem::AllowedSet &allowed = p->getAllowedSet(src);
357 unsigned pregOpt = 0;
358 while (pregOpt < allowed.size() && allowed[pregOpt] != dst) {
361 if (pregOpt < allowed.size()) {
362 ++pregOpt; // +1 to account for spill option.
363 PBQPRAGraph::NodeId node = p->getNodeForVReg(src);
364 llvm::dbgs() << "Reading node costs for node " << node << "\n";
365 llvm::dbgs() << "Source node: " << &g.getNodeCosts(node) << "\n";
366 PBQP::Vector newCosts(g.getNodeCosts(node));
367 addPhysRegCoalesce(newCosts, pregOpt, cBenefit);
368 g.setNodeCosts(node, newCosts);
371 const PBQPRAProblem::AllowedSet *allowed1 = &p->getAllowedSet(dst);
372 const PBQPRAProblem::AllowedSet *allowed2 = &p->getAllowedSet(src);
373 PBQPRAGraph::NodeId node1 = p->getNodeForVReg(dst);
374 PBQPRAGraph::NodeId node2 = p->getNodeForVReg(src);
375 PBQPRAGraph::EdgeId edge = g.findEdge(node1, node2);
376 if (edge == g.invalidEdgeId()) {
377 PBQP::Matrix costs(allowed1->size() + 1, allowed2->size() + 1, 0);
378 addVirtRegCoalesce(costs, *allowed1, *allowed2, cBenefit);
379 g.addEdge(node1, node2, costs);
381 if (g.getEdgeNode1Id(edge) == node2) {
382 std::swap(node1, node2);
383 std::swap(allowed1, allowed2);
385 PBQP::Matrix costs(g.getEdgeCosts(edge));
386 addVirtRegCoalesce(costs, *allowed1, *allowed2, cBenefit);
387 g.setEdgeCosts(edge, costs);
396 void PBQPBuilderWithCoalescing::addPhysRegCoalesce(PBQP::Vector &costVec,
398 PBQP::PBQPNum benefit) {
399 costVec[pregOption] += -benefit;
402 void PBQPBuilderWithCoalescing::addVirtRegCoalesce(
403 PBQP::Matrix &costMat,
404 const PBQPRAProblem::AllowedSet &vr1Allowed,
405 const PBQPRAProblem::AllowedSet &vr2Allowed,
406 PBQP::PBQPNum benefit) {
408 assert(costMat.getRows() == vr1Allowed.size() + 1 && "Size mismatch.");
409 assert(costMat.getCols() == vr2Allowed.size() + 1 && "Size mismatch.");
411 for (unsigned i = 0; i != vr1Allowed.size(); ++i) {
412 unsigned preg1 = vr1Allowed[i];
413 for (unsigned j = 0; j != vr2Allowed.size(); ++j) {
414 unsigned preg2 = vr2Allowed[j];
416 if (preg1 == preg2) {
417 costMat[i + 1][j + 1] += -benefit;
424 void RegAllocPBQP::getAnalysisUsage(AnalysisUsage &au) const {
425 au.setPreservesCFG();
426 au.addRequired<AliasAnalysis>();
427 au.addPreserved<AliasAnalysis>();
428 au.addRequired<SlotIndexes>();
429 au.addPreserved<SlotIndexes>();
430 au.addRequired<LiveIntervals>();
431 au.addPreserved<LiveIntervals>();
432 //au.addRequiredID(SplitCriticalEdgesID);
434 au.addRequiredID(*customPassID);
435 au.addRequired<LiveStacks>();
436 au.addPreserved<LiveStacks>();
437 au.addRequired<MachineBlockFrequencyInfo>();
438 au.addPreserved<MachineBlockFrequencyInfo>();
439 au.addRequired<MachineLoopInfo>();
440 au.addPreserved<MachineLoopInfo>();
441 au.addRequired<MachineDominatorTree>();
442 au.addPreserved<MachineDominatorTree>();
443 au.addRequired<VirtRegMap>();
444 au.addPreserved<VirtRegMap>();
445 MachineFunctionPass::getAnalysisUsage(au);
448 void RegAllocPBQP::findVRegIntervalsToAlloc() {
450 // Iterate over all live ranges.
451 for (unsigned i = 0, e = mri->getNumVirtRegs(); i != e; ++i) {
452 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
453 if (mri->reg_nodbg_empty(Reg))
455 LiveInterval *li = &lis->getInterval(Reg);
457 // If this live interval is non-empty we will use pbqp to allocate it.
458 // Empty intervals we allocate in a simple post-processing stage in
461 vregsToAlloc.insert(li->reg);
463 emptyIntervalVRegs.insert(li->reg);
468 bool RegAllocPBQP::mapPBQPToRegAlloc(const PBQPRAProblem &problem,
469 const PBQP::Solution &solution) {
470 // Set to true if we have any spills
471 bool anotherRoundNeeded = false;
473 // Clear the existing allocation.
476 const PBQPRAGraph &g = problem.getGraph();
477 // Iterate over the nodes mapping the PBQP solution to a register
479 for (auto NId : g.nodeIds()) {
480 unsigned vreg = problem.getVRegForNode(NId);
481 unsigned alloc = solution.getSelection(NId);
483 if (problem.isPRegOption(vreg, alloc)) {
484 unsigned preg = problem.getPRegForOption(vreg, alloc);
485 DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> "
486 << tri->getName(preg) << "\n");
487 assert(preg != 0 && "Invalid preg selected.");
488 vrm->assignVirt2Phys(vreg, preg);
489 } else if (problem.isSpillOption(vreg, alloc)) {
490 vregsToAlloc.erase(vreg);
491 SmallVector<unsigned, 8> newSpills;
492 LiveRangeEdit LRE(&lis->getInterval(vreg), newSpills, *mf, *lis, vrm);
495 DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> SPILLED (Cost: "
496 << LRE.getParent().weight << ", New vregs: ");
498 // Copy any newly inserted live intervals into the list of regs to
500 for (LiveRangeEdit::iterator itr = LRE.begin(), end = LRE.end();
502 LiveInterval &li = lis->getInterval(*itr);
503 assert(!li.empty() && "Empty spill range.");
504 DEBUG(dbgs() << PrintReg(li.reg, tri) << " ");
505 vregsToAlloc.insert(li.reg);
508 DEBUG(dbgs() << ")\n");
510 // We need another round if spill intervals were added.
511 anotherRoundNeeded |= !LRE.empty();
513 llvm_unreachable("Unknown allocation option.");
517 return !anotherRoundNeeded;
521 void RegAllocPBQP::finalizeAlloc() const {
522 // First allocate registers for the empty intervals.
523 for (RegSet::const_iterator
524 itr = emptyIntervalVRegs.begin(), end = emptyIntervalVRegs.end();
526 LiveInterval *li = &lis->getInterval(*itr);
528 unsigned physReg = mri->getSimpleHint(li->reg);
531 const TargetRegisterClass *liRC = mri->getRegClass(li->reg);
532 physReg = liRC->getRawAllocationOrder(*mf).front();
535 vrm->assignVirt2Phys(li->reg, physReg);
539 bool RegAllocPBQP::runOnMachineFunction(MachineFunction &MF) {
542 tm = &mf->getTarget();
543 tri = tm->getRegisterInfo();
544 tii = tm->getInstrInfo();
545 mri = &mf->getRegInfo();
547 lis = &getAnalysis<LiveIntervals>();
548 lss = &getAnalysis<LiveStacks>();
549 mbfi = &getAnalysis<MachineBlockFrequencyInfo>();
551 calculateSpillWeightsAndHints(*lis, MF, getAnalysis<MachineLoopInfo>(),
554 vrm = &getAnalysis<VirtRegMap>();
555 spiller.reset(createInlineSpiller(*this, MF, *vrm));
557 mri->freezeReservedRegs(MF);
559 DEBUG(dbgs() << "PBQP Register Allocating for " << mf->getName() << "\n");
561 // Allocator main loop:
563 // * Map current regalloc problem to a PBQP problem
564 // * Solve the PBQP problem
565 // * Map the solution back to a register allocation
566 // * Spill if necessary
568 // This process is continued till no more spills are generated.
570 // Find the vreg intervals in need of allocation.
571 findVRegIntervalsToAlloc();
574 const Function* func = mf->getFunction();
576 func->getParent()->getModuleIdentifier() + "." +
577 func->getName().str();
580 // If there are non-empty intervals allocate them using pbqp.
581 if (!vregsToAlloc.empty()) {
583 bool pbqpAllocComplete = false;
586 while (!pbqpAllocComplete) {
587 DEBUG(dbgs() << " PBQP Regalloc round " << round << ":\n");
589 std::unique_ptr<PBQPRAProblem> problem(
590 builder->build(mf, lis, mbfi, vregsToAlloc));
593 if (pbqpDumpGraphs) {
594 std::ostringstream rs;
596 std::string graphFileName(fqn + "." + rs.str() + ".pbqpgraph");
598 raw_fd_ostream os(graphFileName.c_str(), tmp, sys::fs::F_Text);
599 DEBUG(dbgs() << "Dumping graph for round " << round << " to \""
600 << graphFileName << "\"\n");
601 problem->getGraph().dump(os);
605 PBQP::Solution solution =
606 PBQP::RegAlloc::solve(problem->getGraph());
608 pbqpAllocComplete = mapPBQPToRegAlloc(*problem, solution);
614 // Finalise allocation, allocate empty ranges.
616 vregsToAlloc.clear();
617 emptyIntervalVRegs.clear();
619 DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm << "\n");
625 llvm::createPBQPRegisterAllocator(std::unique_ptr<PBQPBuilder> &builder,
626 char *customPassID) {
627 return new RegAllocPBQP(builder, customPassID);
630 FunctionPass* llvm::createDefaultPBQPRegisterAllocator() {
631 std::unique_ptr<PBQPBuilder> Builder;
633 Builder.reset(new PBQPBuilderWithCoalescing());
635 Builder.reset(new PBQPBuilder());
636 return createPBQPRegisterAllocator(Builder);