firefly-linux-kernel-4.4.55.git
7 years agohid: rkvr: add suspend and resume notifier for nanoc
lanshh [Fri, 14 Oct 2016 01:52:12 +0000 (09:52 +0800)]
hid: rkvr: add suspend and resume notifier for nanoc

Change-Id: I870247058c363506400a20c57eb48566b7516c7d
Signed-off-by: lanshh <lsh@rock-chips.com>
7 years agovideo: rockchip: edp: Solve the problem of write grf register failure
xubilv [Thu, 20 Oct 2016 03:38:11 +0000 (11:38 +0800)]
video: rockchip: edp: Solve the problem of write grf register failure

Change-Id: Ia5fa679f4cda5e0c62cf40f2079735c01d0817bc
Signed-off-by: xubilv <xbl@rock-chips.com>
7 years agoarm64: dts: rk3399-sapphire: add vbus-5v gpio control in fusb302 node.
wenping.zhang [Thu, 20 Oct 2016 10:26:45 +0000 (18:26 +0800)]
arm64: dts: rk3399-sapphire: add vbus-5v gpio control in fusb302 node.

We should also Disable vbus-5v gpio control in retulator node,otherwise
vbus-5v will always power on.

Change-Id: Icb42f687866174398917ced3e53a3e876ea37b86
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agoFROMLIST: PM / sleep: don't suspend parent when async child suspend_{noirq,late}...
Brian Norris [Thu, 20 Oct 2016 04:09:30 +0000 (12:09 +0800)]
FROMLIST: PM / sleep: don't suspend parent when async child suspend_{noirq,late} fails

Consider two devices, A and B, where B is a child of A, and B utilizes
asynchronous suspend (it does not matter whether A is sync or async). If
B fails to suspend_noirq() or suspend_late(), or is interrupted by a
wakeup (pm_wakeup_pending()), then it aborts and sets the async_error
variable. However, device A does not (immediately) check the async_error
variable; it may continue to run its own suspend_noirq()/suspend_late()
callback. This is bad.

We can resolve this problem by checking the async_error flag after
waiting for children to suspend, using the same logic for the noirq and
late suspend cases as we already do for __device_suspend().

It's easy to observe this erroneous behavior by, for example, forcing a
device to sleep a bit in its suspend_noirq() (to ensure the parent is
waiting for the child to complete), then return an error, and watch the
parent suspend_noirq() still get called. (Or similarly, fake a wakeup
event at the right (or is it wrong?) time.)

Change-Id: I9f6d9a599b45aaeb2debccc50a47525f138ad07e
Fixes: de377b397272 ("PM / sleep: Asynchronous threads for suspend_late")
Fixes: 28b6fd6e3779 ("PM / sleep: Asynchronous threads for suspend_noirq")
Reported-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
7 years agoFROMLIST: PM / sleep: print function name of callbacks
Douglas Anderson [Thu, 20 Oct 2016 04:07:31 +0000 (12:07 +0800)]
FROMLIST: PM / sleep: print function name of callbacks

The printouts writen to the logs by suspend can be a bit opaque: it can
be hard to track them down to the actual function called.  You might
see:

  calling  rfkill1+ @ 19473, parent: phy0
  call rfkill1+ returned 0 after 1 usecs
  calling  phy0+ @ 19473, parent: mmc2:0001:1
  call phy0+ returned 0 after 19 usecs

It's a bit hard to know what's actually happening.  Instead, it's nice
to see:

  calling  rfkill1+ @ 15793, parent: phy0, cb: rfkill_suspend
  call rfkill1+ returned 0 after 1 usecs
  calling  phy0+ @ 15793, parent: mmc2:0001:1, cb: wiphy_suspend [cfg80211]
  call phy0+ returned 0 after 7 usecs

That makes it very obvious what's going on.  It also has the nice side
effect of making the suspend/resume spew a little more obvious, since
many resume functions have the word "resume" in the name:

  calling  phy0+ @ 15793, parent: mmc2:0001:1, cb: wiphy_resume [cfg80211]
  call phy0+ returned 0 after 12 usecs
  calling  rfkill1+ @ 15793, parent: phy0, cb: rfkill_resume
  call rfkill1+ returned 0 after 1 usecs

Change-Id: I32dcedfa013393aab79af852304c7d9f3465f183
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
7 years agoarm64: dts: rockchip: add reset control registers for rk3399 dp driver.
wenping.zhang [Mon, 17 Oct 2016 02:30:13 +0000 (10:30 +0800)]
arm64: dts: rockchip: add reset control registers for rk3399 dp driver.

Change-Id: Ibbad2bd5ab49c71385045ca743740cbba8ed6bf0
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agovideo: rockchip: dp: fix deadlock if video timing get failed.
wenping.zhang [Mon, 17 Oct 2016 02:16:40 +0000 (10:16 +0800)]
video: rockchip: dp: fix deadlock if video timing get failed.

Change-Id: I00511a7b2aa0229b04c2326ca267a39cf7d46f42
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agovideo: rockchip: dp: merge the dp driver from chrome and fix error of suspend and...
wenping.zhang [Thu, 29 Sep 2016 10:59:07 +0000 (18:59 +0800)]
video: rockchip: dp: merge the dp driver from chrome and fix error of suspend and resume

Add usb super speed,support dp 4 lanes and usb2.0 function.
Also add power domain control function and optimize the logic
of dp recognizing flow.And also change the logic of dp suspend,
the clock of dp will be disabled after early suspend, and enabled
after early resume by trigger a hotplug event.

Change-Id: I917d0d34b0909373ba037c62b3582893d7dce00b
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agovideo: rockchip: mipi: Solve the problem of compiler error when open the debug
xubilv [Wed, 19 Oct 2016 02:26:56 +0000 (10:26 +0800)]
video: rockchip: mipi: Solve the problem of compiler error when open the debug

Change-Id: Ic74ca747df6dfc913bbf3a379f894635aef35919
Signed-off-by: xubilv <xbl@rock-chips.com>
7 years agoarm64: dts: rockchip: create a rk3399 discrete vr dts based on excavator board.
wenping.zhang [Mon, 17 Oct 2016 02:45:26 +0000 (10:45 +0800)]
arm64: dts: rockchip: create a rk3399 discrete vr dts based on excavator board.

Change-Id: Ib6d6154040e243b6cbbfa47d441744a42165e0cf
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agoarm64: dts: rockchip: add sensor lsm330 node for rk3399-mid
Bin Yang [Wed, 19 Oct 2016 07:39:45 +0000 (15:39 +0800)]
arm64: dts: rockchip: add sensor lsm330 node for rk3399-mid

Add the sensor node "power-off-in-suspend" to support sensor poweroff in
system suspend.

Change-Id: Ic0dc660f0211b7dd18ba8fec6d54aba5b1dfc301
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agoinput: sensors: reinit sensors register when system resume
Bin Yang [Wed, 19 Oct 2016 07:03:24 +0000 (15:03 +0800)]
input: sensors: reinit sensors register when system resume

For some sensors are designed to support poweroff when system suspend,
so we need reinit register when system resume.

Change-Id: I4d61dc318562336781aa1010d1fbad447cc76b83
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agoarm64: dts: rockchip: add rv1 board dts file
Zorro Liu [Tue, 18 Oct 2016 07:57:24 +0000 (15:57 +0800)]
arm64: dts: rockchip: add rv1 board dts file

Change-Id: Ib10c6a923e3b6f62a083339ccd8807461ff8f26f
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
7 years agopower: rk818-charger: fix usb_charger not assigned new state error
Jianhong Chen [Wed, 19 Oct 2016 08:38:13 +0000 (16:38 +0800)]
power: rk818-charger: fix usb_charger not assigned new state error

Change-Id: I841fe6106fb51820d541cd99a21d0ad0305dec9d
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
7 years agoUPSTREAM: PCI: rockchip: Fix wrong transmitted FTS count
Shawn Lin [Fri, 7 Oct 2016 09:42:47 +0000 (17:42 +0800)]
UPSTREAM: PCI: rockchip: Fix wrong transmitted FTS count

If the expected number of FTS aren't received by RC when exiting from L0s,
the LTSSM will fall into recover state, which means it will need to send TS
for retraining which makes the latency of exiting from L0s a little longer
than expected.  This issue is caused by an incorrect reset value of FTS
count on PLC1 register (offset 0x4).  The expected value for Gen1/2 should
be more than 240 and we may leave a little margin here.  Fix this before
starting Gen1 training which will make TS1 contain the correct FTS count.

Change-Id: I15543b385fdb7a007187faf51265c591c51433e6
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit ca1989084054e64da25662e1f974f77312083eb3)

7 years agoUPSTREAM: PCI: rockchip: improve the deassert sequence of four reset pins
Shawn Lin [Fri, 23 Sep 2016 02:05:59 +0000 (10:05 +0800)]
UPSTREAM: PCI: rockchip: improve the deassert sequence of four reset pins

Per TRM, we need to deassert the four reset pins simultaneously.
Currently the reset framework doesn't support that so we did it
one by one. It seems no side effect found but it does impact the
state machine of controller, so sometimes the change speed bit is
not setted when sending training sequence from recover state.
After the silicon RTL review from Soc guys, we don't need to do
the sequence recommended by TRM, and could just move the deassert
of mgmt_sticky_rst to the first place.

Change-Id: I001f3707054af98b147cb1d56b1a03e5f7d44ceb
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 58c6990c5ee772c2551193f053e51a52b9984b49)

7 years agoUPSTREAM: PCI/ASPM: Remove redundant check of pcie_set_clkpm
Shawn Lin [Tue, 24 May 2016 09:32:10 +0000 (17:32 +0800)]
UPSTREAM: PCI/ASPM: Remove redundant check of pcie_set_clkpm

Without supporting clock PM capable, if we want to disable
clkpm, we don't need this extra check as it already be zero for
the enable argument. And it's the same for enabling clkpm here.
So let's remove this check.

Change-Id: I0dc251e5dea940a2288fbb31a58336dea83f2515
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit a6c1c6f3547b6c4cbd4a30d67a968ee1519a8ffd)

7 years agoUPSTREAM: PCI: rockchip: Increase the Max Credit update interval.
Rajat Jain [Fri, 23 Sep 2016 00:50:42 +0000 (17:50 -0700)]
UPSTREAM: PCI: rockchip: Increase the Max Credit update interval.

This increases the likelihood of link state to automatically go to L1
and save some power.

The default credit update interval of 7.5 us results in the rootport
sending UpdateFC-P and UpdateFC-NP packets too often, thus resulting
in the link never going to L1, and always staying in L0/L0s. The
value 24 us was chosen after some experiments and peeking over the
PCIe bus to see that we do enter L1 substate when there is not enough
traffic on the PCIe bus.

Change-Id: I23eccba98f6fe731bcacec80349dc05bd7baf9c1
Signed-off-by: Rajat Jain <rajatja@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 277743ef616defc870d101f9cf9d3488aba1c1b6)

7 years agoUPSTREAM: PCI: rockchip: cleanup for rockchip pcie driver
Shawn Lin [Fri, 7 Oct 2016 09:31:25 +0000 (17:31 +0800)]
UPSTREAM: PCI: rockchip: cleanup for rockchip pcie driver

Bjorn did some cleanup for rockchip pcie driver after
mereging the drivers. So let's backport it entirely
to keep consisten with the upstream kernel.

[bhelgaas: fold in Brian's rockchip_pcie_client_irq_handler() OR fix, other
fixes and cleanups from Guenter Roeck <linux@roeck-us.net> and me,
uninitialized variable fix from Arnd Bergmann <arnd@arndb.de>]

Change-Id: If680b9c2264cd89561427180b146c34eb8549511
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
7 years agodriver,iio,inv_mpu_i2c: driver set i2c clientdata twice, remove err one
Zorro Liu [Mon, 17 Oct 2016 07:25:29 +0000 (15:25 +0800)]
driver,iio,inv_mpu_i2c: driver set i2c clientdata twice, remove err one

Change-Id: I506d924121b7abe57659815b356a3cbab887f869
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
7 years agovideo: rockchip: vop: 3399: fix win2/win3 csc mode error
Huang Jiachai [Mon, 17 Oct 2016 03:44:30 +0000 (11:44 +0800)]
video: rockchip: vop: 3399: fix win2/win3 csc mode error

Change-Id: I34275fda827446dbdebbe3a13e18ceaacd6bba2c
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
7 years agork: arm: support build kernel.img and resource.img
Yakir Yang [Mon, 1 Aug 2016 10:08:28 +0000 (18:08 +0800)]
rk: arm: support build kernel.img and resource.img

Change-Id: I651bb208c4304a2aeb7a03516238ac81cdc957d2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
7 years agodrm/rockchip: dw_hdmi: support 4K@60Hz output
Yakir Yang [Thu, 22 Sep 2016 03:43:55 +0000 (11:43 +0800)]
drm/rockchip: dw_hdmi: support 4K@60Hz output

The pixel clock of 4K@60Hz is 594MHz, let's enable it for HDMI.

Change-Id: I6097c8a452ba8259c1d8d01fb793cd7cc55cafb3
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
7 years agoARM: dts: rk3288-evb: force VOP Big to hdmi, and VOP Little to edp
Yakir Yang [Thu, 22 Sep 2016 03:40:53 +0000 (11:40 +0800)]
ARM: dts: rk3288-evb: force VOP Big to hdmi, and VOP Little to edp

The max output resolution of VOP Little is 2K, but VOP Big could support
4K output. For now we need support HDMI 4K display, so let force VOP Big
to HDMI, and VOP Little to eDP

Change-Id: Ic493fcb2ee29c3deda0fe5437aab46e271f3689b
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
7 years agopower: rk818-battery: restore coffset when update fail
Jianhong Chen [Mon, 17 Oct 2016 02:31:12 +0000 (10:31 +0800)]
power: rk818-battery: restore coffset when update fail

Change-Id: Ia1d02a0d340819bbca14e4f0931f9e94230cef78
Signed-off-by: Jianhong Chen <chenjh@rock-chips.com>
7 years agonet: rkwifi: fix ap6330 sdio write/read abnormal when doing stress test
zzc [Mon, 17 Oct 2016 03:54:22 +0000 (11:54 +0800)]
net: rkwifi: fix ap6330 sdio write/read abnormal when doing stress test

Change-Id: I7c353cd4cabb24425aa0bdef243adb293e7c2829
Signed-off-by: zzc <zzc@rock-chips.com>
7 years agousb: rockchip-inno-usb2: check EXTCON_USB_VBUS_EN state in otg sm work
Wu Liang feng [Sat, 15 Oct 2016 04:18:43 +0000 (12:18 +0800)]
usb: rockchip-inno-usb2: check EXTCON_USB_VBUS_EN state in otg sm work

If extcon cable state is EXTCON_USB_VBUS_EN, it also means
that otg host connected, don't need to do charge detection.

Change-Id: Ie7c97c4cd0cfd2688edbfb3bbff93d2f58e9ef9a
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agomfd: fusb302: correct extcon cable state when enable vbus
Wu Liang feng [Sat, 15 Oct 2016 03:49:18 +0000 (11:49 +0800)]
mfd: fusb302: correct extcon cable state when enable vbus

Set extcon cable state to EXTCON_USB_VBUS_EN instead of
EXTCON_USB_HOST when enable vbus 5v. Because EXTCON_USB_HOST
state means that fusb302 has detected Type-C mode and the
orientation. However, enable vbus is prior to Type-C mode
and orientation detection. If we set EXTCON_USB_HOST state
when power on vbus, it may cause usb controller driver to
receive the state prematurely, and do tcphy orientation init
improperly.

Change-Id: Id65072dc8235693db44667ee5d2ceac74dc94920
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agodrivers: video: rockchip: hdmi: add RAYKEN5.46" lcd for discret vr device
wjh [Fri, 14 Oct 2016 08:06:50 +0000 (16:06 +0800)]
drivers: video: rockchip: hdmi: add RAYKEN5.46" lcd for discret vr device

Change-Id: Ica15b530c565b3c61fe1b1cb6ef1e8944a7e7607
Signed-off-by: wjh <wjh@rock-chips.com>
7 years agousb: dwc3: rockchip: add pm runtime control for dwc3 parent
Wu Liang feng [Fri, 14 Oct 2016 09:41:26 +0000 (17:41 +0800)]
usb: dwc3: rockchip: add pm runtime control for dwc3 parent

In usb3 tcphy init, it will access usb3 module to set
usb3 working on USB3.0 mode or USB2.0 only mode, and
usb3 pd must be enabled before do this operation. So
we add pm runtime control for dwc3 parent in extcon
evt work. If plug in usb device, resume dwc3 parent
first to enable usb3 pd and then do phy init.

Change-Id: I90dd762d7f76e5f1722c95611e440eacd3afcdc9
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agoarm64: dts: rockchip: add dts node for dp 4 lanes + usb2.0 function.
wenping.zhang [Fri, 14 Oct 2016 03:06:31 +0000 (11:06 +0800)]
arm64: dts: rockchip: add dts node for dp 4 lanes + usb2.0 function.

Change-Id: Ia45dd31ebfe2c0c038a6102920eefb50fd512f36
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agophy: phy-rockchip-typec: add dp 4 lane + usb2.0 support.
wenping.zhang [Fri, 14 Oct 2016 01:22:51 +0000 (09:22 +0800)]
phy: phy-rockchip-typec: add dp 4 lane + usb2.0 support.

Change-Id: I7b67959a1bd05694f929d1d437d55d2b7b015b46
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agorockchip/rga: add rga flush data cache
Zikim,Wei [Wed, 28 Sep 2016 13:35:27 +0000 (21:35 +0800)]
rockchip/rga: add rga flush data cache

If the buffer alloced from the ion, user can flush
it by ion apis, but if the buffer was alloced by
other apis like malloc, user space is not easy to
flush the data cache. So rga flush the data cache
for cache coherence.

Change-Id: I5fcfc3e00c6a8f6b12ed66043b37b0c7c840e7ee
Signed-off-by: Zikim,Wei <wzq@rock-chips.com>
7 years agoRevert "usb: dwc3: rockchip: fix otg plug out error before resume"
Meng Dongyang [Fri, 14 Oct 2016 07:57:42 +0000 (15:57 +0800)]
Revert "usb: dwc3: rockchip: fix otg plug out error before resume"

This reverts commit ccc954ee9f8859569fe16cc17b598fbfece07ae8.
In current code, the dwc3 controller will not process notify when it is
in suspend state and this forbid extcon remove hcd before xhci resume, so
we do not need to forbid remove hcd by the hcd runtime flag and it is
difficult to deal with different process when connected with some special
usb storage.

Change-Id: I987862cceb4ffbe8deefb503f6bc4009770e87bd
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agoarm64: dts: rockchip: set hall-sensor interrupt gpio pull up for rk3399-mid
Bin Yang [Sun, 9 Oct 2016 08:27:15 +0000 (16:27 +0800)]
arm64: dts: rockchip: set hall-sensor interrupt gpio pull up for rk3399-mid

Change-Id: I72c8df9abdd6f173bc33d907794afc4ac2eb8b6b
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agodrm/rockchip: mipi: dsi: Decrease the value of Ths-prepare
xubilv [Fri, 14 Oct 2016 06:26:11 +0000 (14:26 +0800)]
drm/rockchip: mipi: dsi: Decrease the value of Ths-prepare

Change-Id: Ia3912004f3799465102c36e5faefa6238e52af83
Signed-off-by: xubilv <xbl@rock-chips.com>
7 years agoARM: dts: rk3288-miniarm: force VOP Big to hdmi
Nickey Yang [Sat, 8 Oct 2016 07:35:38 +0000 (15:35 +0800)]
ARM: dts: rk3288-miniarm: force VOP Big to hdmi

The max output resolution of vopl is 2K, but vopb could support
4K output. For now we need support HDMI 4K display, so let force
VOP Big to HDMI.

Change-Id: Id095d3659554988f7647fb27d415652fbf510b14
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
7 years agodrm/rockchip: mipi: dsi: add non-burst mode macro definition
xubilv [Thu, 13 Oct 2016 09:58:18 +0000 (17:58 +0800)]
drm/rockchip: mipi: dsi: add non-burst mode macro definition

Change-Id: Ief47d18825afa0d0116a940336dfe1116238cdb7
Signed-off-by: xubilv <xbl@rock-chips.com>
7 years agodrm/rockchip: mipi: dsi: add send mipi command function
xubilv [Thu, 13 Oct 2016 09:47:57 +0000 (17:47 +0800)]
drm/rockchip: mipi: dsi: add send mipi command function

Change-Id: If0699d8d5a42320ba064b698486a912794dfbfb7
Signed-off-by: xubilv <xbl@rock-chips.com>
7 years agoarm64: dts: rk3399: workaround: remove sd-uhs-sdr104 for sd cards
xiaoyao [Wed, 12 Oct 2016 09:33:55 +0000 (17:33 +0800)]
arm64: dts: rk3399: workaround: remove sd-uhs-sdr104 for sd cards

Change-Id: Ic9d1f6f0e1ff81025b8b8d8d04f98026301c900f
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
7 years agohid: rkvr: add touch panel support
lanshh [Tue, 11 Oct 2016 08:39:13 +0000 (16:39 +0800)]
hid: rkvr: add touch panel support

Change-Id: Icc4393db25f4def8ac663dd7e4cb7779a80446cc
Signed-off-by: lanshh <lsh@rock-chips.com>
7 years agohid: rkvr: change sync implement
lanshh [Tue, 11 Oct 2016 08:13:52 +0000 (16:13 +0800)]
hid: rkvr: change sync implement

Change-Id: I2c18d79339f067e8b567be0568ff3de8a8934a27
Signed-off-by: lanshh <lsh@rock-chips.com>
7 years agousb: rockchip-inno-usb2: use EXTCON_USB_VBUS_EN to control vbus
Meng Dongyang [Wed, 12 Oct 2016 11:26:10 +0000 (19:26 +0800)]
usb: rockchip-inno-usb2: use EXTCON_USB_VBUS_EN to control vbus

Add EXTCON_USB_VBUS_EN cable and change EXTCON_USB_HOST to
EXTCON_USB_VBUS_EN cable to control vbus.

Change-Id: I2e7c6111f723e425bd4c156e803cb6a1a9f17511
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agousb: dwc3: rockchip: force dwc3 suspend immediately after disconneted
Meng Dongyang [Tue, 11 Oct 2016 09:59:58 +0000 (17:59 +0800)]
usb: dwc3: rockchip: force dwc3 suspend immediately after disconneted

When usb device or host reconnect quickly, the dwc3 controller still
in the state of resume and can not resume again after receive connect
notify. So we need to suspend dwc3 controller immediately when
receive the notify of disconnect. This patch fix the bug "set device
address fail" when resume or quick reconnect.

Change-Id: Iaef6363cdece497f8d7be745017674e119fe3529
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agousb: dwc3: rockchip: set dwc3 enter runtime suspend immediately
Meng Dongyang [Tue, 11 Oct 2016 09:40:19 +0000 (17:40 +0800)]
usb: dwc3: rockchip: set dwc3 enter runtime suspend immediately

In current code, the dwc3 controller is active when system start
and change to suspend when auto suspend, while the dwc3 controller
will receive connected notify before auto suspend and fail to change
the state of dwc3 controller from active state to resume if dwc3
controller is connected when system start. So we can change async
suspend to sysc suspend to make sure that the dwc3 controller could
finish suspend process before receive connect notify and fix "set
address fail" error when system start.

Change-Id: Ida8760004da06275d667e33b887b8dde87cd9520
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agopower: rk818_charger: get cable state when usb charge function init
Meng Dongyang [Tue, 11 Oct 2016 09:25:14 +0000 (17:25 +0800)]
power: rk818_charger: get cable state when usb charge function init

RK818 will miss the notify of charge type changing because
the charge cable state is init when u2phy probe but rk818 probe after
u2phy. So we need to get the charge cable state when rk818 probe.

Change-Id: I3682d764ae3f9a56a1ba85ba8b81ea7f1aacdf49
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agousb: rockchip-inno-usb2: init cable state when u2phy probe
Meng Dongyang [Tue, 11 Oct 2016 09:08:10 +0000 (17:08 +0800)]
usb: rockchip-inno-usb2: init cable state when u2phy probe

Id pin interrupt not occur when system start, so we need to check
id pin value when u2phy probe and set cable to host if the value
is high.

Change-Id: I333d5cae2463a159a18b455550a76ebcac704c44
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agousb: dwc3: rockchip: enable dwc3 to be a wakeup source
Meng Dongyang [Wed, 12 Oct 2016 07:55:39 +0000 (15:55 +0800)]
usb: dwc3: rockchip: enable dwc3 to be a wakeup source

Enable dwc3 to be wakeup source in runtime resume callback function
and disable dwc3 to be wake up source in runtime suspend. Change pd
in order to control usb pd base on the connect state of usb controller
and fix the detect fail bug of otg port after suspend and resume.

Change-Id: Ic204a82952eb5dd626945189e18a3d2cc40aa6d9
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agoarm64: dts: rockchip: set dwc3 dr_mode as otg for rk3399-android-next
Wu Liang feng [Thu, 13 Oct 2016 06:24:53 +0000 (14:24 +0800)]
arm64: dts: rockchip: set dwc3 dr_mode as otg for rk3399-android-next

rk3399 Type-C0 USB can support both peripheral mode
and host mode, so we set dr_mode as otg.

Change-Id: Ifb6e64920cecf27e41f801809d560bdd302a880b
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agousb: dwc3: rockchip: fix xhci NULL pointer dereference
Wu Liang feng [Thu, 13 Oct 2016 06:08:52 +0000 (14:08 +0800)]
usb: dwc3: rockchip: fix xhci NULL pointer dereference

If DWC3 works as peripheral only mode, XHCI HCD will
not be created and added, so we should only get XHCI
HCD in host mode.

Change-Id: Iefb02431d6a973050986963bbabe0a943283f4b3
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agoarm64: dts: rockchip: add USB3 an DP child nodes for tcphy
Wu Liang feng [Thu, 13 Oct 2016 01:27:17 +0000 (09:27 +0800)]
arm64: dts: rockchip: add USB3 an DP child nodes for tcphy

Since the commit a2be4bc ('FIXUP: UPSTREAM: phy: Add USB
Type-C PHY driver for rk3399') has created 2 PHY devices
separately for tcphy USB3 and DisplyPort, and registered
them under the child node, we should also add the USB3
and DP child nodes to dts.

Change-Id: Iffe5dc961dc96b2b41476b1db2949e95c275e19f
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agoFIXUP: UPSTREAM: phy: Add USB Type-C PHY driver for rk3399
Wu Liang feng [Wed, 12 Oct 2016 16:22:49 +0000 (00:22 +0800)]
FIXUP: UPSTREAM: phy: Add USB Type-C PHY driver for rk3399

This patch aims to make code sync with upstream[1]. And it
can fix the following issues:

1. Introduce the EXTCON_PROP_USB_SS property to support both
   DP 2*lanes + USB3.0 and DP 4*lanes + USB2.0 mode;
2. Fix the bug that the USB3 phy power on should not return
   err when no USB attached, since the USB3 controller will
   power_on phy at probe/resume, even though there is no USB3
   super speed device attached. At this case, return 0 and do
   nothing is better.
3. Create 2 PHY devices separately for USB3 and DisplyPort,
   and registers them under the child node.

[1] git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
commit <e96be45cb84e29e58f35ed460a859b61e8bf28c5>

Change-Id: Ib388a072f11d80624ec6e16291eab497a3dcb0e1
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agodrm/rockchip: vop: support afbdc
Mark Yao [Fri, 12 Aug 2016 10:10:58 +0000 (18:10 +0800)]
drm/rockchip: vop: support afbdc

Change-Id: If22924904f6d0362ba2abef0ddfe715684aca58a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
7 years agousb: dwc3: rockchip: fix otg plug out error before resume
Meng Dongyang [Fri, 7 Oct 2016 05:50:59 +0000 (13:50 +0800)]
usb: dwc3: rockchip: fix otg plug out error before resume

ID dig disconnect interrupt will happen and notify dwc3 controller
to remove hcd as soon as resume, and release root hub, but the hcd
has not resume, so there is a logic error and it may result in NULL
pointer, this patch forbid remove hcd when the state of hcd is suspend.

Change-Id: Ia5673848a23528cd053d75910c0fdbddf0927a40
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
7 years agoFROMLIST: drm/bridge: analogix: protect power when get_modes or detect
Mark Yao [Wed, 12 Oct 2016 10:03:08 +0000 (18:03 +0800)]
FROMLIST: drm/bridge: analogix: protect power when get_modes or detect

The drm callback ->detect and ->get_modes seems is not power safe,
they may be called when device is power off, do register access on
detect or get_modes will cause system die.

Here is the path call ->detect before analogix_dp power on
[<ffffff800843babc>] analogix_dp_detect+0x44/0xdc
[<ffffff80083fd840>] drm_helper_probe_single_connector_modes_merge_bits+0xe8/0x41c
[<ffffff80083fdb84>] drm_helper_probe_single_connector_modes+0x10/0x18
[<ffffff8008418d24>] drm_mode_getconnector+0xf4/0x304
[<ffffff800840cff0>] drm_ioctl+0x23c/0x390
[<ffffff80081a8adc>] do_vfs_ioctl+0x4b8/0x58c
[<ffffff80081a8c10>] SyS_ioctl+0x60/0x88

Change-Id: Ica3fda1f22f903ee9ba2f0caed40cdae9bdfa32b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9374135)

7 years agoFROMLIST: drm: add ARM vendor format afbc
Mark Yao [Sat, 10 Sep 2016 01:57:05 +0000 (09:57 +0800)]
FROMLIST: drm: add ARM vendor format afbc

AFBC is arm vendor format, it's a compressed format.

The AFBC format is supported by rk3399 vop big.

We know little about AFBC layout, hope to some guys can
fixme about the afbc comment.

Change-Id: I9b3edaeb8cc7ffb792820c2f9a60d91fd0c6c28b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9324667/)

7 years agoarm64: rockchip_defconfig: enable drm display drivers
Mark Yao [Wed, 12 Oct 2016 03:08:11 +0000 (11:08 +0800)]
arm64: rockchip_defconfig: enable drm display drivers

enable ROCKCHIP_ANALOGIX_DP, ROCKCHIP_INNO_HDMI and ROCKCHIP_LVDS

Change-Id: I2bd0836bdb04b2c560834e8de31b37ce7a4fae79
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
7 years agousb: dwc3: rockchip: remove unused NULL pointer handle otg_work
William wu [Mon, 10 Oct 2016 04:37:51 +0000 (12:37 +0800)]
usb: dwc3: rockchip: remove unused NULL pointer handle otg_work

We make sure that get drvdata dwc before register extcon
notifier and schedule otg_work, so we can remove the dwc
NULL pointer handle safely.

Also, change the WARN_ON to dev_warn, and avoid log noise.

Change-Id: Icececf3bb5ad510b91d2c3a50e2126225673605e
Signed-off-by: William wu <wulf@rock-chips.com>
7 years agoCHROMIUM: usb: dwc3: rockchip: Fix race conditions involving extcon
William wu [Mon, 10 Oct 2016 03:53:09 +0000 (11:53 +0800)]
CHROMIUM: usb: dwc3: rockchip: Fix race conditions involving extcon

Use a lock to ensure that the extcon callback only runs after probe()
has finished. In suspend() we unregister the extcon handler to prevent
it from being executed when the controller is suspended, which might
lead to crashes or unexpected behavior.

TEST=build and boot on 3399 board; plug in a USB device and verify
whether it is enumerated; suspend the DUT; resume the DUT; unplug
and re-plug the USB device and verify it is enumerated.

Change-Id: I965e66631a2d0f4d6cc53917d6a6e80bf8774fe1
Signed-off-by: William wu <wulf@rock-chips.com>
7 years agoCHROMIUM: usb: dwc3: rockchip: fix otg reset problem
William wu [Sun, 9 Oct 2016 16:26:20 +0000 (00:26 +0800)]
CHROMIUM: usb: dwc3: rockchip: fix otg reset problem

We need to ensure the dwc controller stay in P2 state prior
to phy init. In order to set dwc controller in P2 state,
there're two methods:

1. Hold dwc controller in reset while initialize phy.
2. Do OTG reset before phy init, one thing to note here is
   that we can't reinit dwc controller again prior to phy init.

We choose the second mothod now. Because asserting the OTG
reset may affect dwc chip operation. The reset will clear all
of the dwc controller registers, and there are no synchronization
primitives, meaning the dwc3 core code could at least in theory
access chip registers while the reset is asserted, with unknown
impact. So we need to deassert the OTG reset as soon as possible.
Since phy init may take a long time, we can't hold the reset while
initialize phy.

Also, we add otg reset if dwc controller works as peripheral mode.

Change-Id: I54fec922308f62bfc7ebdde3e07ede9347e8f70a
Signed-off-by: William wu <wulf@rock-chips.com>
7 years agoarm64: dts: rk3399: add evb3 support for android drm
Mark Yao [Wed, 12 Oct 2016 02:50:06 +0000 (10:50 +0800)]
arm64: dts: rk3399: add evb3 support for android drm

Change-Id: I014dac7e2993d12795d7da9732703319fb56faef
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
7 years agoarm64: dts: rockchip: add the 4th cell for u2phy1_otg interrupts for rk3399
Wu Liang feng [Wed, 12 Oct 2016 08:12:58 +0000 (16:12 +0800)]
arm64: dts: rockchip: add the 4th cell for u2phy1_otg interrupts for rk3399

The ARM GICv3 #interrupt-cells need 4 cells to encode an interrupt source.
According to Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt,
the 4th cell is a phandle to a node describing a set of CPUs this interrupt
is affine to. The interrupt must be a PPI, and the node pointed must be a
subnode of the "ppi-partitions" subnode. For interrupt types other than PPI
or PPIs that are not partitionned, this cell must be zero. So we just add
0 for the 4th cell of u2phy1_otg interrupts.

Change-Id: I16ff4e4296064716fe4f7ea35946085e0473f049
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agoarm64: dts: rk3399-vr: adjust temperature
wuliangqing [Tue, 11 Oct 2016 08:55:40 +0000 (16:55 +0800)]
arm64: dts: rk3399-vr: adjust temperature

Change-Id: I0bbfdc2a5541d381cd784efd3532c702ef925339
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
7 years agoarm64: dts: rk3399-vr: redefine vr key
wuliangqing [Fri, 7 Oct 2016 10:29:05 +0000 (18:29 +0800)]
arm64: dts: rk3399-vr: redefine vr key

Change-Id: I15134f71acb93613702f21959857f85c3a3e49dc
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
7 years agoFROMLIST: timers: Fix usleep_range() in the context of wake_up_process()
Douglas Anderson [Mon, 10 Oct 2016 21:04:02 +0000 (14:04 -0700)]
FROMLIST: timers: Fix usleep_range() in the context of wake_up_process()

Users of usleep_range() expect that it will _never_ return in less time
than the minimum passed parameter.  However, nothing in any of the code
ensures this.  Specifically:

usleep_range() => do_usleep_range() => schedule_hrtimeout_range() =>
schedule_hrtimeout_range_clock() just ends up calling schedule() with an
appropriate timeout set using the hrtimer.  If someone else happens to
wake up our task then we'll happily return from usleep_range() early.

msleep() already has code to handle this case since it will loop as long
as there was still time left.  usleep_range() had no such loop.

The problem is is easily demonstrated with a small bit of test code:

  static int usleep_test_task(void *data)
  {
    atomic_t *done = data;
    ktime_t start, end;

    start = ktime_get();
    usleep_range(50000, 100000);
    end = ktime_get();
    pr_info("Requested 50000 - 100000 us.  Actually slept for %llu us\n",
      (unsigned long long)ktime_to_us(ktime_sub(end, start)));
    atomic_set(done, 1);

    return 0;
  }

  static void run_usleep_test(void)
  {
    struct task_struct *t;
    atomic_t done;

    atomic_set(&done, 0);

    t = kthread_run(usleep_test_task, &done, "usleep_test_task");
    while (!atomic_read(&done)) {
      wake_up_process(t);
      udelay(1000);
    }
    kthread_stop(t);
  }

If you run the above code without this patch you get things like:
  Requested 50000 - 100000 us.  Actually slept for 967 us

If you run the above code _with_ this patch, you get:
  Requested 50000 - 100000 us.  Actually slept for 50001 us

Presumably this problem was not detected before because:
- It's not terribly common to use wake_up_process() directly.
- Other ways for processes to wake up are not typically mixed with
  usleep_range().
- There aren't lots of places that use usleep_range(), since many people
  call either msleep() or udelay().

Change-Id: Ibb93ce0dd9fb9688d4a8d10447c098c1dfbd7a1d
Reported-by: Tao Huang <huangtao@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Andreas Mohr <andim2@users.sf.net>
(am from https://patchwork.kernel.org/patch/9369963/)

7 years agoarm: dts: add no-relinquish-port property for rk3288-miniarm
Frank Wang [Tue, 11 Oct 2016 07:47:54 +0000 (15:47 +0800)]
arm: dts: add no-relinquish-port property for rk3288-miniarm

This adds support no relinquishing port from ehci to ohci.

Change-Id: I153a85df7407b8e546e75018d71e3763c8f41a10
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
7 years agousb: ehci-platform: support no relinquishing port quirk
Frank Wang [Tue, 11 Oct 2016 07:27:44 +0000 (15:27 +0800)]
usb: ehci-platform: support no relinquishing port quirk

Add a quirk to cancel relinquishing port from ehci to
abnormal ohci when HS device is not ready connected.

To support this function, the no-relinquish-port property
must be specified in ehci node of dt.

Change-Id: Ief0b24cf9e58dde28f386ea67fe8936e8fd74f2d
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
7 years agork_headset: add micbias logic to compatible with es8316
zhangjun [Sun, 9 Oct 2016 11:54:43 +0000 (19:54 +0800)]
rk_headset: add micbias logic to compatible with es8316

Change-Id: I1aefdf1dc1975a95c2b746d7385c991f99e058bf
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
7 years agoASoC: es8316: add interface for rk_headset
zhangjun [Sun, 9 Oct 2016 06:41:45 +0000 (14:41 +0800)]
ASoC: es8316: add interface for rk_headset

Change-Id: I62f7e78ca4003f6ab90c943a187babd274acc1de
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
7 years agoarm64: dts: rockchip: remove cpufreq 1.5G on rk3399-sapphire
Zhou weixin [Sun, 9 Oct 2016 00:44:17 +0000 (08:44 +0800)]
arm64: dts: rockchip: remove cpufreq 1.5G on rk3399-sapphire

Change-Id: I1d8919424fd8047bcf077f6f8cbbb18e5a25d553
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
7 years agoARM64: dts: rk3399: add regulator-ramp-delay for dcdc
Elaine Zhang [Mon, 10 Oct 2016 09:07:48 +0000 (17:07 +0800)]
ARM64: dts: rk3399: add regulator-ramp-delay for dcdc

used to calculate the delay time for change dcdc voltage.

Change-Id: I6bb462ef087b9ce6aa98991a1b961ed5f57bb3c8
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
7 years agoUPSTREAM: mmc: block: Use the mmc host device index as the mmcblk device index
Ulf Hansson [Wed, 6 Apr 2016 14:12:08 +0000 (16:12 +0200)]
UPSTREAM: mmc: block: Use the mmc host device index as the mmcblk device index

Commit 520bd7a8b415 ("mmc: core: Optimize boot time by detecting cards
simultaneously") causes regressions for some platforms.

These platforms relies on fixed mmcblk device indexes, instead of
deploying the defacto standard with UUID/PARTUUID. In other words their
rootfs needs to be available at hardcoded paths, like /dev/mmcblk0p2.

Such guarantees have never been made by the kernel, but clearly the above
commit changes the behaviour. More precisely, because of that the order
changes of how cards becomes detected, so do their corresponding mmcblk
device indexes.

As the above commit significantly improves boot time for some platforms
(magnitude of seconds), let's avoid reverting this change but instead
restore the behaviour of how mmcblk device indexes becomes picked.

By using the same index for the mmcblk device as for the corresponding mmc
host device, the probe order of mmc host devices decides the index we get
for the mmcblk device.

For those platforms that suffers from a regression, one could expect that
this updated behaviour should be sufficient to meet their expectations of
"fixed" mmcblk device indexes.

Another side effect from this change, is that the same index is used for
the mmc host device, the mmcblk device and the mmc block queue. That
should clarify their relationship.

Reported-by: Peter Hurley <peter@hurleysoftware.com>
Reported-by: Laszlo Fiat <laszlo.fiat@gmail.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Fixes: 520bd7a8b415 ("mmc: core: Optimize boot time by detecting cards
simultaneously")
Cc: <stable@vger.kernel.org>
Change-Id: I8fe12a3858f3e2ace8fcc785befbae588108e2db
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
(cherry picked from commit 9aaf3437aa72ed5370bf32c99580a3fa2c330e3d)

7 years agoARM64: dts: rk3399-box: add card-detect-delay property
xiaoyao [Sat, 8 Oct 2016 03:39:21 +0000 (11:39 +0800)]
ARM64: dts: rk3399-box: add card-detect-delay property

Practice shows :
The sd cards are easier to be identified after increase delay

Change-Id: I48912e2d184902fab8b27edba70281f0bf19b9ab
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
7 years agoHACK: mmc: core: fixes not send_status after switch timing
xiaoyao [Sat, 8 Oct 2016 03:03:56 +0000 (11:03 +0800)]
HACK: mmc: core: fixes not send_status after switch timing

Fixes 3527e5709 (HACK: mmc: core: fix switching ... ...)
Change-Id: Id46840452e4bc87efb93e785cd8bbac5f708552d
Signed-off-by: xiaoyao <xiaoyao@rock-chips.com>
7 years agoclk: rk3399: add 2016M for clk_cpub
Elaine Zhang [Mon, 10 Oct 2016 09:17:38 +0000 (17:17 +0800)]
clk: rk3399: add 2016M for clk_cpub

Change-Id: I8ce32102a76b3acf45073a8b7d9538ee521b1315
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
7 years agoregulator: mp8865: add set_voltage_time_sel func
Elaine Zhang [Mon, 10 Oct 2016 07:03:38 +0000 (15:03 +0800)]
regulator: mp8865: add set_voltage_time_sel func

support delay time in microseconds required to
rise or fall to this new voltage

Change-Id: I8d096500a3dcb376785285d08228961cf6b26ce0
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
7 years agoregulator: lp8752: add set_voltage_time_sel func
Elaine Zhang [Mon, 10 Oct 2016 06:58:03 +0000 (14:58 +0800)]
regulator: lp8752: add set_voltage_time_sel func

support delay time in microseconds required to
rise or fall to this new voltage

Change-Id: I1f7c77356e650b9ff01ad0e63fd384e25f774eac
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
7 years agomfd: fusb302: add usb super speed property support.
wenping.zhang [Thu, 29 Sep 2016 09:48:50 +0000 (17:48 +0800)]
mfd: fusb302: add usb super speed property support.

The meaning of the property value is as below:
The value of the property EXTCON_PROP_USB_SS is 0: USB1.0 or USB2.0
The value of the property EXTCON_PROP_USB_SS is 1: USB3.0

we change the logic of fusb302 notification , if dp sink device is connected, dfp is set to 1,
and use pin assignment value to define if sink device support usb3.0.

Change-Id: Ib7afaf9b754b4585b0ef211dd246059b8ab72904
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>
7 years agodrivers: sound: usb: fix disvr usb Audio bug
wjh [Tue, 27 Sep 2016 09:33:53 +0000 (17:33 +0800)]
drivers: sound: usb: fix disvr usb Audio bug

The disvr usb audio sampling rate is through nanoc reported to
the kernel, so don't need the kernel again set the sampling rate.

Change-Id: I60409fc579952a196c4fe40f678e87d505a7508d
Signed-off-by: wjh <wjh@rock-chips.com>
7 years agovideo: rockchip: rk fb: add hot plug state indicate extent screen state
Huang Jiachai [Sun, 9 Oct 2016 02:28:03 +0000 (10:28 +0800)]
video: rockchip: rk fb: add hot plug state indicate extent screen state

Change-Id: If7dea36a420ef21763c309d12d64d95574b3dcf3
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
7 years agovideo: rockchip: edp: add support connect to vopl
Xubilv [Sat, 8 Oct 2016 12:01:42 +0000 (20:01 +0800)]
video: rockchip: edp: add support connect to vopl

Change-Id: I13347beed5548b073f616fe94d3b900c19c50c5d
Signed-off-by: Xubilv <xbl@rock-chips.com>
7 years agovideo: rockchip: vop: 3399: fix vop little win1/3 property error
Huang Jiachai [Sun, 9 Oct 2016 06:16:05 +0000 (14:16 +0800)]
video: rockchip: vop: 3399: fix vop little win1/3 property error

Change-Id: I32580745f0b4ad252225756d793ec7c0247be452
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
7 years agousb: phy-rockchip-inno-usb2: fix wrong charging state when otg host connect
Binyuan Lan [Thu, 29 Sep 2016 12:01:55 +0000 (20:01 +0800)]
usb: phy-rockchip-inno-usb2: fix wrong charging state when otg host connect

No need notify charging-external-connector state when otg host connect.

Change-Id: I1d5c6e4fb2ad504f169ef0fd5b82b06f31783922
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
7 years agopower: rk818: use EXTCON_USB_VBUS_EN to notify rk818 enable otg
Bin Yang [Sun, 9 Oct 2016 09:21:58 +0000 (17:21 +0800)]
power: rk818: use EXTCON_USB_VBUS_EN to notify rk818 enable otg

Change-Id: Ica0a28f07d5ca474fb8a8385748a6b4adf9d4b82
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agomfd: fusb302: Add EXTCON_USB_VBUS_EN for fusb302
Bin Yang [Fri, 23 Sep 2016 07:22:34 +0000 (15:22 +0800)]
mfd: fusb302: Add EXTCON_USB_VBUS_EN for fusb302

Some rk3399 board(rk3399 MID or rk3399 VR) is use rk81x generated vbus.
So need fusb302 send a extcon to notify rk818 when OTG or DP cable plugin.

If use EXTCON_USB_HOST, the extcon will notify dwc3 and rk818_charger at
the same time,so need to add a new extcon EXTCON_USB_VBUS_EN.

Change-Id: Ib019ed7c2d4343c50dcef739ab3076f592979ea0
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agovideo: rockchip: edp: read/write register before pm_runtime_put
Xubilv [Sat, 8 Oct 2016 07:46:46 +0000 (15:46 +0800)]
video: rockchip: edp: read/write register before pm_runtime_put

Change-Id: I3a6a910857ff4c6921996f625807b4aefc4cd5a1
Signed-off-by: Xubilv <xbl@rock-chips.com>
7 years agoUPSTREAM: phy: xgene: rename "enum phy_mode" to "enum xgene_phy_mode"
Kishon Vijay Abraham I [Tue, 28 Jun 2016 06:32:08 +0000 (12:02 +0530)]
UPSTREAM: phy: xgene: rename "enum phy_mode" to "enum xgene_phy_mode"

No functional change. Rename "enum phy_mode" to
"enum xgene_phy_mode" in xgene phy driver in
preparation for adding set_mode callback in
phy core.

Change-Id: I7e569e1fb82a308e79d30a80323e0c3c338dd68c
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Loc Ho <lho@apm.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 65048f4dd9fae7335b48ab23a879119c0e7fa105)

7 years agoarm64: dts: rockchip: set dwc3 dr_mode as otg for rk3399-box
Wu Liang feng [Sat, 8 Oct 2016 03:26:40 +0000 (11:26 +0800)]
arm64: dts: rockchip: set dwc3 dr_mode as otg for rk3399-box

rk3399-box Type-C0 USB needs to support peripheral mode
and host mode, so we set dr_mode as otg.

Change-Id: If94cdca3ec1d018c3f9aad14bb2c1e15e10e9c51
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agousb: dwc3: gadget: fix trb ring full bug
Wu Liang feng [Fri, 30 Sep 2016 11:19:40 +0000 (19:19 +0800)]
usb: dwc3: gadget: fix trb ring full bug

The upstream commit 5e8ec28765 (usb: dwc3: gadget: Handle TRB
index 0 when full or empty) only use the HWO = 1 to check if
the TRB ring is full. But refer to DWC3 databook Version 3.00a,
8.2.3.2 TRB Control Bit Rules: When an OUT endpoint receives a
short packet, some TRBs in a chain may still have their HWO bit
set to 1 while belonging to software.

So if HWO=1 and CSP=1 on OUT endpoint, it also means that TRB
ring is empty, software may reclaim those TRBs even though HWO=1.

TEST=use MTP to transfer big data, and then cancel the transition,
check if it can transfer again.

Change-Id: I45cc683dc733ff7a642cfcd3ebc20455ef677753
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
7 years agoUPSTREAM: phy: Add set_mode callback
David Lechner [Mon, 9 May 2016 23:39:59 +0000 (18:39 -0500)]
UPSTREAM: phy: Add set_mode callback

The initial use for this is for PHYs that have a mode related to USB OTG.
There are several SoCs (e.g. TI OMAP and DA8xx) that have a mode setting
in the USB PHY to override OTG VBUS and ID signals.

Of course, the enum can be expaned in the future to include modes for
other types of PHYs as well.

Change-Id: Iebc730d7e41c2910fa1be98cbf275d2c73358050
Suggested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 300eb0139cf27044c67f6005ff17b8434c7843f0)

7 years agoarm64: dts: rockchip: enable ldo5 and ldo6 in suspend for rk3399 mid
Bin Yang [Fri, 7 Oct 2016 06:54:27 +0000 (14:54 +0800)]
arm64: dts: rockchip: enable ldo5 and ldo6 in suspend for rk3399 mid

Hall-sensor must keep power on in suspend.

Change-Id: I149e6434f793a6686693f2dabe5959814d134c5e
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agoextcon: Add EXTCON_USB_VBUS_EN for USB Type-C
Bin Yang [Fri, 23 Sep 2016 02:51:58 +0000 (10:51 +0800)]
extcon: Add EXTCON_USB_VBUS_EN for USB Type-C

Add the new extcon EXTCON_USB_VBUS_EN to enable
vbus output.

Change-Id: I83fb75b2a82ad617dc292967bb4917bbfbcb84cb
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agoUPSTREAM: extcon: Introduce EXTCON_PROP_USB_SS property for SuperSpeed mode
Guenter Roeck [Mon, 15 Aug 2016 13:15:35 +0000 (06:15 -0700)]
UPSTREAM: extcon: Introduce EXTCON_PROP_USB_SS property for SuperSpeed mode

EXTCON_PROP_USB_SS (SuperSpeed)[1] is necessary to distinguish
between USB/USB2 and USB3 connections on USB Type-C cables.

[1] https://en.wikipedia.org/wiki/USB#Overview

Change-Id: Iae845b7e2125291bba0646c7219f485299e7d375
Cc: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit 8df0cfe6c6c4a9355989baa8de9f166b2bc51f76)

7 years agoextcon: remove EXTCON_PROP_USB_ID property
Huang, Tao [Fri, 7 Oct 2016 03:59:39 +0000 (11:59 +0800)]
extcon: remove EXTCON_PROP_USB_ID property

Fix commit 536277d5500a ("FROMLIST: extcon: Add the support for
extcon property according to extcon type"), which introduce
EXTCON_PROP_USB_ID property, but upstream don't have such property.
Remove it make merge easy.

Change-Id: I7905049629aa85158b7e705b40018f83fa85a9ac
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
7 years agoarm64: dts: rockchip: enable cdn_dp_fb node for rk3399-mid
Bin Yang [Fri, 23 Sep 2016 07:27:01 +0000 (15:27 +0800)]
arm64: dts: rockchip: enable cdn_dp_fb node for rk3399-mid

Change-Id: I2f2dd5758f449749e5b25dc1c8bb36aa829401f3
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
7 years agoUPSTREAM: Bluetooth: hci_ldisc: Fix null pointer derefence in case of early data
Jacob Chen [Fri, 7 Oct 2016 01:10:45 +0000 (09:10 +0800)]
UPSTREAM: Bluetooth: hci_ldisc: Fix null pointer derefence in case of early data

HCI_UART_PROTO_SET flag is set before hci_uart_set_proto call. If we
receive data from tty layer during this procedure, proto pointer may
not be assigned yet, leading to null pointer dereference in rx method
hci_uart_tty_receive.

This patch fixes this issue by introducing HCI_UART_PROTO_READY flag in
order to avoid any proto operation before proto opening and assignment.

Signed-off-by: Loic Poulain <loic.poulain@intel.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
Change-Id: Ibe366f3222cbe7a093cd08aaecbc0de1004088c8
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
(cherry picked from commit 84cb3df02aea4b00405521e67c4c67c2d525c364)

7 years agovideo: rockchip: vop: 3399: vop lite lut and edp output is 8 bit
Huang Jiachai [Thu, 29 Sep 2016 02:54:37 +0000 (10:54 +0800)]
video: rockchip: vop: 3399: vop lite lut and edp output is 8 bit

Change-Id: Icb333d92713cba2dda14b977ea9c6a1617e88bbf
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
7 years agomfd: rk808: close rtc int when power off
Binyuan Lan [Fri, 30 Sep 2016 03:40:20 +0000 (11:40 +0800)]
mfd: rk808: close rtc int when power off

Change-Id: I1f1bfe3d6c106632c45b51bec3c18361572df865
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
7 years agovideo: rockchip: vop: 3399: update for cabc
Huang Jiachai [Tue, 27 Sep 2016 08:24:18 +0000 (16:24 +0800)]
video: rockchip: vop: 3399: update for cabc

If enable cabc function, close auto gating, because cabc and auto gating
can't enable at the same time, in addition cabc open and close will lead
to splash screen, so when close cabc, we just set stage up and down to 0.

Change-Id: Ia4561d6adafa956c26d1921caecc7eed97dd218a
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
7 years agoarm64: rockchip_defconfig: enable rk_headset
zhangjun [Tue, 27 Sep 2016 03:10:53 +0000 (11:10 +0800)]
arm64: rockchip_defconfig: enable rk_headset

Change-Id: I6644e71b9a1fc5a10a711b55fab3056c4152105c
Signed-off-by: zhangjun <zhangjun@rock-chips.com>