arm64: dts: rockchip: add USB3 an DP child nodes for tcphy

Since the commit a2be4bc ('FIXUP: UPSTREAM: phy: Add USB
Type-C PHY driver for rk3399') has created 2 PHY devices
separately for tcphy USB3 and DisplyPort, and registered
them under the child node, we should also add the USB3
and DP child nodes to dts.

Change-Id: Iffe5dc961dc96b2b41476b1db2949e95c275e19f
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
index e27e17833d04b96c3dee933bdd18424cff7c74fd..06393a2f4000e59d16c8ce7a70c089ca543068b0 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
@@ -172,7 +172,7 @@
                assigned-clocks = <&cru SCLK_DP_CORE>;
                assigned-clock-rates = <100000000>;
                power-domains = <&power RK3399_PD_HDCP>;
-               phys = <&tcphy0 0>, <&tcphy1 0>;
+               phys = <&tcphy0_dp>, <&tcphy1_dp>;
                resets = <&cru SRST_DPTX_SPDIF_REC>;
                reset-names = "spdif";
                rockchip,grf = <&grf>;

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
index 54528dde37e9217afbb2fd98de21c1e517428fe5..8fd46ea184fc095ee04f1e91fefe429ceae19e06 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
@@ -972,7 +972,7 @@
 &cdn_dp_fb {
        status = "okay";
        extcon = <&fusb0>;
-       phys = <&tcphy0 0>;
+       phys = <&tcphy0_dp>;
 };
 
 &i2s2 {

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
index 9860dbfcc182943a0eedd3a0b380bbdd61eab065..c2a49380f9f9b6fd0c50c82bb7d034a3fe284a79 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
@@ -1187,7 +1187,7 @@
 &cdn_dp_fb {
        status = "okay";
        extcon = <&fusb0>;
-       phys = <&tcphy0 0>;
+       phys = <&tcphy0_dp>;
        dp_vop_sel = <DISPLAY_SOURCE_LCDC1>;
 };
 

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 1d9ca4d20406a94965187dca49af0955ed4b8e6e..fbfec03636bcb288e8fe56feda40bb8e1947fd4b 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -443,7 +443,7 @@
                        reg = <0x0 0xfe800000 0x0 0x100000>;
                        interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "otg";
-                       phys = <&u2phy0_otg>, <&tcphy0 1>;
+                       phys = <&u2phy0_otg>, <&tcphy0_usb3>;
                        phy-names = "usb2-phy", "usb3-phy";
                        phy_type = "utmi_wide";
                        snps,dis_enblslpm_quirk;
@@ -472,7 +472,7 @@
                        reg = <0x0 0xfe900000 0x0 0x100000>;
                        interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
                        dr_mode = "host";
-                       phys = <&u2phy1_otg>, <&tcphy1 1>;
+                       phys = <&u2phy1_otg>, <&tcphy1_usb3>;
                        phy-names = "usb2-phy", "usb3-phy";
                        phy_type = "utmi_wide";
                        snps,dis_enblslpm_quirk;
@@ -1438,6 +1438,14 @@
                rockchip,pipe-status = <0xe5c0 0 0>;
                rockchip,uphy-dp-sel = <0x6268 19 19>;
                status = "disabled";
+
+               tcphy0_dp: dp-port {
+                       #phy-cells = <0>;
+               };
+
+               tcphy0_usb3: usb3-port {
+                       #phy-cells = <0>;
+               };
        };
 
        tcphy1: phy@ff800000 {
@@ -1460,6 +1468,14 @@
                rockchip,pipe-status = <0xe5c0 16 16>;
                rockchip,uphy-dp-sel = <0x6268 3 19>;
                status = "disabled";
+
+               tcphy1_dp: dp-port {
+                       #phy-cells = <0>;
+               };
+
+               tcphy1_usb3: usb3-port {
+                       #phy-cells = <0>;
+               };
        };
 
        watchdog@ff848000 {