Huang Jiachai [Wed, 13 Jul 2016 07:36:32 +0000 (15:36 +0800)]
ARM64: dts: rk3399-box-808-android: add disp policy for box product
Change-Id: Ic191bc7ff0540fa073face6bcd2be8f6de18fcc0
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Mark Yao [Fri, 26 Jun 2015 01:27:18 +0000 (09:27 +0800)]
drm/rockchip: gem: import dma_buf to gem
We want to display a buffer allocated by other driver, need import
the buffer to gem.
Change-Id: Ifd5fef3fbf2b4daea6d624ed2a250c2fe626309d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 01:48:23 +0000 (09:48 +0800)]
power_supply: Add new type for USB chargers
This adds a power supply type for special USB charger,
this kind of USB charger is similar to Dedicated Charging
Port, but not a standard DCP because of D+/D- not short.
Change-Id: I7c478da642b43465a9de65c8b5d7b8250c0da037
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 03:22:49 +0000 (11:22 +0800)]
arm64: dts: rockchip: add u2phy0 and u2phy0_otg node for rk3399
RK3399 SoC usb2 PHY comprises with one host-port and
one otg-port, we support otg-port for the time being.
Change-Id: I7d6a464372603e54c3a06d994e18d80eb84fa5a5
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Yakir Yang [Mon, 11 Jul 2016 10:30:27 +0000 (18:30 +0800)]
FROMLIST: drm/rockchip: dw_hdmi: introduce the pclk for grf
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Change-Id: I8f43e5c46c8559d6b6fe96a12cd026319b1d84e5
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9223317/)
Yakir Yang [Mon, 11 Jul 2016 10:12:29 +0000 (18:12 +0800)]
FROMLIST: drm/rockchip: dw_hdmi: introduce the VPLL clock setting
For RK3399 HDMI, there is an external clock need for HDMI PHY,
and it should keep the same clock rate with VOP DCLK.
VPLL have supported the clock for HDMI PHY, but there is no
clock divider bewteen VPLL and HDMI PHY. So we need to set the
VPLL rate manually in HDMI driver.
Change-Id: I73abc382ff43bfa93d150c3449693f207029549f
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9223327/)
Yakir Yang [Mon, 11 Jul 2016 09:57:57 +0000 (17:57 +0800)]
FROMLIST: drm/rockchip: dw_hdmi: add RK3399 HDMI support
RK3399 and RK3288 shared the same HDMI IP controller, only some light
difference with GRF configure.
Change-Id: Ic404ff3df6004a87b709f00552d91eb546c78450
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9223315/)
Douglas Anderson [Tue, 14 Jul 2015 21:13:00 +0000 (14:13 -0700)]
FROMLIST: drm/rockchip: dw_hdmi: Use auto-generated tables
The previous tables for mpll_cfg and curr_ctrl were created using the
20-pages of example settings provided by the PHY vendor. Those
example settings weren't particularly dense, so there were places
where we were guessing what the settings would be for 10-bit and
12-bit (not that we use those anyway). It was also always a lot of
extra work every time we wanted to add a new clock rate since we had
to cross-reference several tables.
In <http://crosreview.com/285855> I've gone through the work to figure
out how to generate this table automatically. Let's now use the
automatically generated table and then we'll never need to look at it
again.
We only support 8-bit mode right now and only support a small number
of clock rates and and I've verified that the only 8-bit rate that was
affected was 148.5. That mode appears to have been wrong in the old
table.
Change-Id: I42b260300880f2bab6732c5ee3b11bc78e87500c
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
(am from https://patchwork.kernel.org/patch/
9223325)
Yakir Yang [Mon, 3 Aug 2015 01:28:42 +0000 (20:28 -0500)]
FROMLIST: drm/rockchip: dw_hdmi: adjust cklvl & txlvl for RF/EMI
Dut to the high HDMI signal voltage driver, Mickey have meet
a serious RF/EMI problem, so we decided to reduce HDMI signal
voltage to a proper value.
The default params for phy is cklvl = 20 & txlvl = 13 (RF/EMI failed)
ck: lvl = 13, term=100, vlo = 2.71, vhi=3.14, vswing = 0.43
tx: lvl = 20, term=100, vlo = 2.81, vhi=3.16, vswing = 0.35
1. We decided to reduce voltage value to lower, but VSwing still
keep high, RF/EMI have been improved but still failed.
ck: lvl = 6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50
tx: lvl = 6, term=100, vlo = 2.61, vhi=3.11, vswing = 0.50
2. We try to keep voltage value and vswing both lower, then RF/EMI
test all passed ;)
ck: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40
tx: lvl = 11, term= 66, vlo = 2.68, vhi=3.09, vswing = 0.40
When we back to run HDMI different test and single-end test, we see
different test passed, but signle-end test failed. The oscilloscope
show that simgle-end clock's VL value is 1.78v (which remind LowLimit
should not lower then 2.6v).
3. That's to say there are some different between PHY document and
measure value. And according to experiment 2 results, we need to
higher clock voltage and lower data voltage, then we can keep RF/EMI
satisfied and single-end & differen test passed.
ck: lvl = 9, term=100, vlo = 2.65, vhi=3.12, vswing = 0.47
tx: lvl = 16, term=100, vlo = 2.75, vhi=3.15, vswing = 0.39
Change-Id: I766df9ad519ddddb9be76f95fbbdb36c5a2d6e51
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
(am from https://patchwork.kernel.org/patch/
9223303/)
Douglas Anderson [Wed, 26 Aug 2015 20:35:48 +0000 (13:35 -0700)]
FROMLIST: drm/rockchip: dw_hdmi: Set cur_ctr to 0 always
Jitter was improved by lowering the MPLL bandwidth to account for high
frequency noise in the rk3288 PLL. In each case MPLL bandwidth was
lowered only enough to get us a comfortable margin. We believe that
lowering the bandwidth like this is safe given sufficient testing.
Change-Id: Ife266747f0e6ed46f914f4868362fefc481440f9
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9223301/)
Nickey Yang [Wed, 13 Jul 2016 11:25:41 +0000 (19:25 +0800)]
ARM: dts: rockchip: add sdmmc for rk3288 fennec
Add sdmmc dts nodes support for RK3288-Fennec boards
Change-Id: I6e62da8ef84a7c5a492f54448fc7261ff87432bf
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Caesar Wang [Mon, 30 May 2016 08:16:54 +0000 (16:16 +0800)]
ARM: config: add the rockchip_linux_defconfig for rockchip
Add the config for rockchip SoCs with ubuntu os, the most of SoCs will be supported
for this config. (e.g: rk3036. rk3288....)
Change-Id: Ia781de208ccaad7a95b6a325fce97db5e588fafa
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Zheng Yang [Fri, 8 Jul 2016 02:50:24 +0000 (10:50 +0800)]
video: rockchip: hdmi: set default color depth to 8bit
Change-Id: I2e4f8d9f980c4169e254ad56793503f76f091e7f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit
34468c2b30ae361ded2a8867e478c972bb5de5a6)
Zheng Yang [Fri, 8 Jul 2016 02:29:54 +0000 (10:29 +0800)]
video: rockchip: hdmi: fix current color mode and depth info
If current color mode and depth is auto, information in sysfs
node is equal to zero, is not responsed to actual mode and
depth, now fix it.
Change-Id: Ifd2888b2af5522a026be92071d98d6bc081d02db
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit
c2cac5c2cff8464ab4ba2c2638a84d997aa0365e)
Yankun Zheng [Tue, 12 Jul 2016 03:14:51 +0000 (11:14 +0800)]
arm64: dts: rockchip: enable isp0 and isp1 for rk3399 mid board
Change-Id: Ib4404a2af7309200d48e7beeede4f237ee03d455
Signed-off-by: Yankun Zheng <zyk@rock-chips.com>
Zorro Liu [Mon, 11 Jul 2016 11:09:13 +0000 (19:09 +0800)]
arm64: dts: rockchip: add sensors config for rk3399 mid board
Change-Id: Ib97f1802ea14fb0d5fcb043325733f4d58e1188a
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Zorro Liu [Mon, 4 Jul 2016 01:16:43 +0000 (09:16 +0800)]
ARM64: dts: rockchip: add sensor mpu6500 node for rk3399 mid board
Change-Id: If78d74fccf3195e3e81b91dc6d5981929ca16319
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Yankun Zheng [Tue, 12 Jul 2016 06:46:43 +0000 (14:46 +0800)]
ARM64: rockchip_defconfig: enable isp driver
Change-Id: I5025d6301a3f1ec7f6b3e243777216493e77ec9c
Signed-off-by: Yankun Zheng <zyk@rock-chips.com>
Zorro Liu [Tue, 12 Jul 2016 02:45:01 +0000 (10:45 +0800)]
ARM64: rockchip_defconfig: enable sensors devices
Change-Id: I75f4893ffa0842915138b3de7d29afc6ef35e2fc
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Zorro Liu [Mon, 4 Jul 2016 06:16:53 +0000 (14:16 +0800)]
driver, sensors: fix compile err
Change-Id: Ice9e31086b29a20e37bf5ba3bf08d1e77a9a36a3
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Zorro Liu [Mon, 11 Jul 2016 11:07:55 +0000 (19:07 +0800)]
driver, sensors, ak8963: modify for new 64bit akm hal
Change-Id: Idd84d215eaeeec24b687c632189ef1fbbafbbf22
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Zorro Liu [Mon, 4 Jul 2016 06:18:23 +0000 (14:18 +0800)]
drivers, input: add sensors to compile
Change-Id: I7227ab9d989df3adef73883f7be2860d1742c225
Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Xing Zheng [Mon, 11 Jul 2016 11:12:51 +0000 (19:12 +0800)]
ARM: dts: rockchip: turn the gpu and vpu on for rk3288 fennec
Because there are not the gpu and vpu dts nodes in the rk3288-dtsi
on the upstream, and we need to these feature for Rockchip Release
Platform. Let's support them.
Change-Id: I890aeb139476dca26f760db4603bf63a55aa4084
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Xing Zheng [Thu, 7 Jul 2016 10:01:12 +0000 (18:01 +0800)]
UPSTREAM: ARM: dts: rockchip: add dts for RK3288-Fennec boards
This adds support for RK3288-Fennec boards. Currently supported
are serial console, wired networking, hdmi output and USB.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit
4285b7e744ce08e92fd2231c08c34bb674d08f87)
Change-Id: I8bdd6a004c49883cb0d25761275312a6d9267879
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Chen Liang [Mon, 11 Jul 2016 09:41:31 +0000 (17:41 +0800)]
ARM64: dts: rk3399: prevent out of bounds accesses to array
It will return state++ when get the idle state, so we need fill
anothor idle power(=WFI) in the parameter of EAS, code as below:
static int group_idle_state(struct sched_group *sg)
{
int i, state = INT_MAX;
/* Find the shallowest idle state in the sched group. */
for_each_cpu(i, sched_group_cpus(sg))
state = min(state, idle_get_state_idx(cpu_rq(i)));
/* Take non-cpuidle idling into account (active idle/arch_cpu_idle()) */
state++;
return state;
}
Change-Id: I9293da1379746768823df4e75a7478aa50fc0e87
Signed-off-by: Chen Liang <cl@rock-chips.com>
Chen Liang [Fri, 8 Jul 2016 02:12:43 +0000 (10:12 +0800)]
ARM64: sched: fix bug: avoid infinite loop
All of the sched domains will be destroied and then rebuilded when a cpu
online/offline, if a softirq comes after the shced domains are destroied,
this cpu will be stucked in the infinite loop in sched_group_energy(),
because of it can not get the shced donmain in for_each_domain(cpu, sd).
Change-Id: I154cf560e4e1af4a7a2547154ad321e936196ce3
Signed-off-by: Chen Liang <cl@rock-chips.com>
Mark Yao [Mon, 11 Jul 2016 06:50:58 +0000 (14:50 +0800)]
iommu/rockchip: fix old/new iommu driver conflict
Change-Id: I22fcf6be63aebe76417a470975c6c10bbc3ed92a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 8 Jul 2016 09:24:36 +0000 (17:24 +0800)]
drm/rockchip: vop: add x/ymirror support
Change-Id: If7d1ef5f3246f467c48895aa2f54957bd59eed18
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Roger Chen [Mon, 11 Jul 2016 03:12:37 +0000 (11:12 +0800)]
net: phy: fix sysfs operation for writing PHY's registers
Change-Id: Ic6cc82c8eb8e20572e77ae703755440012cd3f46
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Mark Yao [Thu, 7 Jul 2016 00:45:23 +0000 (08:45 +0800)]
drm/rockchip: vop: fixup plane zpos
Set unused plane with top zpos will cause a alpha problem.
if there are two planes use same zpos, hardware will do twice
alpha compute, that would cause display abnormal.
Change-Id: I3b5d15c5239412c670ad377edbcc66d7f6c59341
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Roger Chen [Mon, 11 Jul 2016 02:05:18 +0000 (10:05 +0800)]
net: stmmac: dwmac-rk: fix for GMAC resume after PD off/on
GMAC Power Domain(PD) will be disabled during suspend.
That will causes GRF registers reset.
So corresponding GRF registers for GMAC must be setup again.
Change-Id: I9ca541c4599299bad309b810994824d364c2a510
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Chen Liang [Fri, 8 Jul 2016 02:37:53 +0000 (10:37 +0800)]
ARM64: sched: fix bug: remove printk while schedule is in progress
It will cause deadlock and while(1) if call printk while schedule
is in progress. The block state like as below:
cpu0(hold the console sem):
printk->console_unlock->up_sem->spin_lock(&sem->lock)->wake_up_process(cpu1)
->try_to_wake_up(cpu1)->while(p->on_cpu).
cpu1(request console sem):
console_lock->down_sem->schedule->idle_banlance->update_cpu_capacity->
printk->console_trylock->spin_lock(&sem->lock).
p->on_cpu will be 1 forever, because the task is still running on cpu1,
so cpu0 is blocked in while(p->on_cpu), but cpu1 could not get
spin_lock(&sem->lock), it is blocked too, it means the task will running
on cpu1 forever.
Change-Id: I60d02d8c957273872f97939632bdd235accdad4e
Signed-off-by: Chen Liang <cl@rock-chips.com>
Huang Jiachai [Thu, 7 Jul 2016 07:39:07 +0000 (15:39 +0800)]
video: rockchip: rk fb: add debug message
Change-Id: I9af8c17dd95fbf7c9ce44d9cb912071f05fd6014
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang, Tao [Thu, 7 Jul 2016 13:32:56 +0000 (21:32 +0800)]
regulator: xz3216: Add a sentinel to xz3216_i2c_id[]
This patch fix this bug:
BUG: KASAN: global-out-of-bounds in i2c_device_match+0x64/0xa4 at addr
ffffff9009046800
Read of size 1 by task swapper/0/1
Address belongs to variable xz3216_i2c_id+0x20/0x2c0
CPU: 5 PID: 1 Comm: swapper/0 Not tainted 4.4.14 #21
Hardware name: Rockchip RK3399 Evaluation Board v2 (Android) (DT)
Call trace:
[<
ffffff900808b2d8>] dump_backtrace+0x0/0x288
[<
ffffff900808b574>] show_stack+0x14/0x1c
[<
ffffff90084c16c4>] dump_stack+0xc4/0x100
[<
ffffff900823fdd4>] kasan_report+0x36c/0x49c
[<
ffffff900823f2e4>] __asan_load1+0x24/0x50
[<
ffffff90088f7924>] i2c_device_match+0x64/0xa4
[<
ffffff90086829b8>] __device_attach_driver+0x80/0xd8
[<
ffffff900868064c>] bus_for_each_drv+0xf8/0x12c
[<
ffffff900868232c>] __device_attach+0x114/0x1a4
[<
ffffff9008682b9c>] device_initial_probe+0x10/0x18
[<
ffffff9008680904>] bus_probe_device+0x50/0xe8
[<
ffffff900867ee14>] device_add+0x5f8/0x774
[<
ffffff900867efac>] device_register+0x1c/0x28
[<
ffffff90088f7dd0>] i2c_new_device+0x258/0x2a4
[<
ffffff90088f853c>] i2c_register_adapter+0x4b4/0x600
[<
ffffff90088f8700>] __i2c_add_numbered_adapter+0x78/0x88
[<
ffffff90088f8d9c>] i2c_add_adapter+0x50/0xcc
[<
ffffff9008900c1c>] rk3x_i2c_probe+0x460/0x4fc
[<
ffffff9008684fac>] platform_drv_probe+0x70/0xc8
[<
ffffff9008682648>] driver_probe_device+0x16c/0x364
[<
ffffff90086828d4>] __driver_attach+0x94/0xc8
[<
ffffff9008680010>] bus_for_each_dev+0xe0/0x11c
[<
ffffff9008682bd4>] driver_attach+0x30/0x3c
[<
ffffff9008680ca8>] bus_add_driver+0x160/0x294
[<
ffffff9008683edc>] driver_register+0x10c/0x168
[<
ffffff9008685e34>] __platform_driver_register+0x7c/0x88
[<
ffffff90095da854>] rk3x_i2c_driver_init+0x18/0x20
[<
ffffff90095a4df0>] do_one_initcall+0x168/0x220
[<
ffffff90095a5078>] kernel_init_freeable+0x1d0/0x274
[<
ffffff9008ec5f40>] kernel_init+0x10/0x108
[<
ffffff9008084cd0>] ret_from_fork+0x10/0x40
Memory state around the buggy address:
ffffff9009046700: fa fa fa fa 00 03 fa fa fa fa fa fa 00 00 00 07
ffffff9009046780: fa fa fa fa 07 fa fa fa fa fa fa fa 00 00 00 00
>
ffffff9009046800: fa fa fa fa 00 01 fa fa fa fa fa fa 00 01 fa fa
^
ffffff9009046880: fa fa fa fa 04 fa fa fa fa fa fa fa 00 04 fa fa
ffffff9009046900: fa fa fa fa 00 05 fa fa fa fa fa fa 07 fa fa fa
Change-Id: I624d92b1fefdf87cfb58b9df10db85723b5ed534
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Jeffy Chen [Wed, 6 Jul 2016 08:13:20 +0000 (16:13 +0800)]
ARM: dts: rk3288: limit vpu aclk freq to 400M
Change-Id: I800c50f8c2940921aaa0d388459fb218f1dd874c
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Wed, 6 Jul 2016 08:04:36 +0000 (16:04 +0800)]
ARM: dts: rk3036: limit vpu aclk freq to 297M
Change-Id: I5fe0d49b7bde947188fcf718ffdb850e0c20c066
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Wed, 6 Jul 2016 08:01:46 +0000 (16:01 +0800)]
media: rockchip-vpu: remove force aclk_vcodec 400M
3036's vpu is not stable with 400M.
Change-Id: I5ea988704fd4d82154319cc0b3376aad10d9373b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jacob Chen [Thu, 7 Jul 2016 03:33:40 +0000 (11:33 +0800)]
ARM: dts: rockchip: enable sdmmc for evb rk3288
Change-Id: I9a206e7088afc9910a81c3832d17a6b252d09a1d
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 7 Jul 2016 01:23:37 +0000 (09:23 +0800)]
ARM: dts: rockchip: enable usb host2 for evb rk3288
Change-Id: I2866ef914240a3fb7ae29c35ea61f7a1bf384559
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Thu, 7 Jul 2016 01:22:49 +0000 (09:22 +0800)]
ARM: dts: rockchip: enable gmac for evb rk3288
Change-Id: Ib1fa841da0d5b08f5fe7967a8365b4d7467ca8de
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Mark Yao [Wed, 6 Jul 2016 07:09:39 +0000 (15:09 +0800)]
drm/rockchip: force 8bit mode if vop not support 10bit output
Some vop can't support 10bit mode, if connector needs 10bit output,
force to use 8bit rgb888 mode, because the hardware would do the
format convert.
Change-Id: I8cdfbab12dd0ad63d36f3c52a4c7786a2bdbe6a1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Chen Liang [Thu, 7 Jul 2016 03:41:29 +0000 (11:41 +0800)]
ARM64: sched: cpufreq_sched: fix bug: init data before use it in thread
policy->governor_data will be use in cpufreq_sched_thread, but it is init
after wake thread, it will cause NULL point access.
Change-Id: I320a3da34560e49f293211be92cb8310d8e395d7
Signed-off-by: Chen Liang <cl@rock-chips.com>
Chen Liang [Fri, 1 Jul 2016 07:47:14 +0000 (15:47 +0800)]
ARM64: cpufreq_sched: implement event CPUFREQ_GOV_LIMIT for governor
If we do not limit the freqency immediately when the cpu is overheat,
thermal driver will lost the control of temperature. So implement event
CPUFREQ_GOV_LIMIT for governor to limit the freqency immediately.
Change-Id: Id709edd377226417ead92ead2ae3d3d19b3eeabf
Signed-off-by: Chen Liang <cl@rock-chips.com>
Caesar Wang [Wed, 22 Jun 2016 10:13:57 +0000 (18:13 +0800)]
FIXUP: FROMLIST: thermal: rockchip: fixes the exception interrupts
The hardware-tracked trips will set the alarm interrupt value for
registers. Then when the thermal zone has no trips to be set,
That make the thermal trips callback a over range value.
The root cause is the rk_tsadcv2_temp_to_code() function to handle the
invalid temperature range is indeed incorrect, let's fix it on now.
Otherwise, the thermal alarm interrupt will be triggered all the time
on some SoCs.
Fox example:
localhost tmp # grep thermal /proc/interrupts; sleep 5;
grep thermal /proc/interrupts
23: 994830 .. GICv3 129 Level rockchip_thermal
23:
1003423 .. GICv3 129 Level rockchip_thermal
Change-Id: I0ddbd0b2dd9c03e785e588f5f339f1eeed4e1c5c
Reported-by: Rocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-pm@vger.kernel.org
(am from https://patchwork.kernel.org/patch/
9192357/)
Caesar Wang [Thu, 7 Jul 2016 00:52:34 +0000 (08:52 +0800)]
arm64: dts: rockchip: sync the upstream power domain for rk3399
This patch updates the power domain node to sync upstream.
As Heiko landed on [0].
[0]:
https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/
commit/?id=
6d3cdbf1c219f9817290903e9d1e8de7462a7b54
Change-Id: Ifbf641965d6f66d0f8a941a1162667ac96709847
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Jeffy Chen [Mon, 20 Jun 2016 08:56:41 +0000 (16:56 +0800)]
CHROMIUM: [media]: rockchip-vpu: add rk3288 h264e
Change-Id: Idf6697c107609f5ee80a39c08a5670bebe78c469
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Yakir Yang [Tue, 28 Jun 2016 09:56:31 +0000 (17:56 +0800)]
ARM: dts: rockchip: add the lvds-panel power supply for rk3288-evb-rk808 board
Change-Id: Id90524720ca5012464f8fd7608594b7bdf5d78b0
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Yakir Yang [Tue, 28 Jun 2016 09:54:18 +0000 (17:54 +0800)]
ARM: dts: rockchip: add the lvds-panel power supply for rk3288-evb-act8846 board
Change-Id: I48662e03909459d458ea148b8c37bbffd08371d2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Yakir Yang [Wed, 27 Jan 2016 08:23:43 +0000 (16:23 +0800)]
ARM: dts: rk3288-evb: Add lvds device node on rk3288-evb board
Due to there are only two vop module, that's to say we can't keep
enable eDP / LVDS / HDMI at the same time, so this time we still
keep LVDS device disabled. If you want to enable lvds device,
then you should disable the HDMI or eDP device, and enable the
LVDS device.
And one more thing that eDP panel and LVDS panel can't enable at
the same time, cause both of them have the same enable gpio. If
you still want to do this, there is an hack way that delete the
'enable-gpios' comptabile from 'lvds-panel'.
Change-Id: Iecf71adc4d307dcdb8b7317a93430e99bb12e20a
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Heiko Stuebner [Wed, 1 Apr 2015 10:09:45 +0000 (12:09 +0200)]
ARM: dts: rockchip: add rk3288 lvds node
Add the basic node for the lvds controller of rk3288 and hook it into the
display-subsystem hirarchy.
Change-Id: I150f27e5d9a626342c4fe984167f94ae717ab9ad
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Heiko Stuebner [Wed, 1 Apr 2015 10:09:44 +0000 (12:09 +0200)]
ARM: dts: rockchip: add rk3288 lcdc0 pinmux settings
Add pinctrl settings for the configurable lcdc0 signals dclk, den, hsync
and vsync. The lcdc0 data pin configuration is not software controlable.
Change-Id: I733179908fd4276e919fe44c6125d504926d751a
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Mark Yao [Wed, 1 Apr 2015 10:09:41 +0000 (12:09 +0200)]
drm/rockchip: Add support for Rockchip Soc LVDS
This adds support for Rockchip soc lvds found on rk3288
Change-Id: Iaab32c8c02fb17bf55db97a7952a346ce45c7d09
Signed-off-by: Mark Yao <yzq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Mark Yao [Wed, 1 Apr 2015 10:09:40 +0000 (12:09 +0200)]
dt-bindings: Add documentation for rockchip lvds
Add binding documentation for Rockchip SoC LVDS driver.
Change-Id: Ie5bbf6715d9dc6b1f5793f78f3eec96783c4725e
Signed-off-by: Mark Yao <yzq@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Carlos Palminha [Wed, 10 Feb 2016 16:10:39 +0000 (16:10 +0000)]
UPSTREAM: drm/bridge: removed dummy mode_fixup function from dw-hdmi.
Other bridge drivers don't implement this optional function.
Removed dummy code from dw-hdmi brigde driver.
Signed-off-by: Carlos Palminha <palminha@synopsys.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1455120639-29934-1-git-send-email-palminha@synopsys.com
Change-Id: I1ea1c912885b81e269befb2c83b79f5a261f0881
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
6feea0ebbdca2fe1b7e94ec66aca3aa7279af59f)
Thierry Reding [Mon, 16 Nov 2015 17:19:53 +0000 (18:19 +0100)]
UPSTREAM: drm: Do not set connector->encoder in drivers
An encoder is associated with a connector by the DRM core as a result of
setting up a configuration. Drivers using the atomic or legacy helpers
should never set up this link, even if it is a static one.
While at it, try to catch this kind of error in the future by adding a
WARN_ON() in drm_mode_connector_attach_encoder(). Note that this doesn't
cover all the cases, since drivers could set this up after attaching.
Drivers that use the atomic helpers will get a warning later on, though,
so hopefully the two combined cover enough to help people avoid this in
the future.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Mark yao <mark.yao@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1447694393-24700-1-git-send-email-thierry.reding@gmail.com
Change-Id: Iaec2775976574d93810b4e160ac8889d6bb55cad
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
eb47fe8033d6c2013ce47ec44f39fa0092aa8551)
Mark Yao [Mon, 30 Nov 2015 10:33:40 +0000 (18:33 +0800)]
UPSTREAM: drm: bridge/dw_hdmi: add atomic API support
Fill atomic needed funcs with default atomic helper library.
Rockchip use dw_hdmi, and drm/rockchip will covert to atomic api,
we need dw_hdmi support atomic funcs.
Now another drm driver use dw_hdmi is imx, not yet atomic, so
check DRIVER_ATOMIC at runtime to spilt atomic and not atomic.
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Change-Id: I519527efaf88b1e5c1b30db1fd23e59d45b88d50
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
2c5b2cccdbde278fb702893404a2ea20f81f0345)
Ville Syrjälä [Tue, 15 Dec 2015 11:21:02 +0000 (12:21 +0100)]
UPSTREAM: drm/bridge/dw_hdmi: Constify function pointer structs
Moves a bunch of junk to .rodata from .data.
drivers/gpu/drm/bridge/dw_hdmi.ko:
-.rodata 120
+.rodata 216
-.data 96
+.data 0
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1450178476-26284-15-git-send-email-boris.brezillon@free-electrons.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Change-Id: Ib35041ba0962794da3ff80110c6e429dacaf9178
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
dae91e4d1c7adea85ff97b28dcea72bd234b4bb7)
Thierry Reding [Tue, 24 Nov 2015 16:54:33 +0000 (17:54 +0100)]
UPSTREAM: drm/bridge: Remove gratuitous blank line
A single blank line is enough to separate Kconfig entries.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Change-Id: I325951cc36a4429a8313b61e3f3a44aa24e49958
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
dae91e4d1c7adea85ff97b28dcea72bd234b4bb7)
Thierry Reding [Tue, 24 Nov 2015 16:52:58 +0000 (17:52 +0100)]
UPSTREAM: drm/bridge: dw-hdmi: Use dashes in filenames
For consistency with other drivers, use dashes instead of underscores in
filenames.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Change-Id: Ie872685143935c365b40c3aaf2a104879478ea66
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry pick from
248a86fc3092059324e6f8231abd9134c8188ecc)
Huang, Tao [Tue, 5 Jul 2016 06:33:11 +0000 (14:33 +0800)]
arm64: dts: rockchip: set swiotlb buffer size on rk3399 android board
We don't use swiotlb, so keep the size as small as possible.
Change-Id: I1377f4b31112902a5841eafde094d2d12f48e97c
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 02:35:47 +0000 (10:35 +0800)]
ARM64: configs: rockchip_cros_defconfig: enable extcon support
This allows monitoring external connectors by userspace
via sysfs and uevent and supports external connectors with
multiple states. And extcon notifier mechanism is also
useful.
Change-Id: I670da8efbe20f8f12529e9e062fc38b514524dc3
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 02:29:43 +0000 (10:29 +0800)]
ARM64: configs: rockchip_defconfig: enable extcon support
This allows monitoring external connectors by userspace
via sysfs and uevent and supports external connectors with
multiple states. And extcon notifier mechanism is also
useful.
Change-Id: I7aba50c294b04d48bf5d43bfd90a8280fcbd1081
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Wu Liang feng [Wed, 6 Jul 2016 02:08:56 +0000 (10:08 +0800)]
extcon: fix duplicate create switch class
If "CONFIG_ANDROID" and "CONFIG_SWITCH" are enabled,
/sys/class/switch/* are created in switch classe driver,
so we can't create switch class again in extcon.
Change-Id: Ida627cfdbb3ecb6f0aa40af146a66897edafd2fe
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
Sugar Zhang [Tue, 5 Jul 2016 02:45:11 +0000 (10:45 +0800)]
FROMLIST: ASoC: rockchip: implement system suspend/resume for i2s
restore hw registers after power loss during a suspend/resume cycle.
Change-Id: I109c4acaef8fef12f84e4c1b6d3488891a94ebb2
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9213485/)
Sugar Zhang [Tue, 5 Jul 2016 02:48:06 +0000 (10:48 +0800)]
FROMLIST: ASoC: rockchip: implement system suspend/resume for spdif
restore hw registers after power loss during a suspend/resume cycle.
Change-Id: I8078f5bdd35ff354a375337d641de479b59f14f6
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9213499/)
Jeffy Chen [Wed, 8 Jun 2016 06:05:42 +0000 (14:05 +0800)]
clk: rockchip: rk3036: add ACLK_VCODEC
Change-Id: I36f6b23139345941656c127718cc4ff01c6d629f
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Fri, 1 Jul 2016 08:23:24 +0000 (16:23 +0800)]
ARM: dts: rockchip: enable rockchip-vpu node for rk3036 kylin
Change-Id: I82fe6cd685bbf8e7eb360b40d308890735dcf608
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Wed, 8 Jun 2016 06:04:38 +0000 (14:04 +0800)]
ARM: dts: rockchip: add rockchip-vpu node for rk3036
Change-Id: If4ce05777e4e4fd2460c76a5fff75c8b1901529e
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Rocky Hao [Fri, 1 Jul 2016 08:35:46 +0000 (16:35 +0800)]
thermal: rockchip: optimize sensor auto accessing period
In less than 10 ms, the temperature of soc will arise 10 degree. 250 ms
is too big for soc tempeture control. Setting 2.5 ms will speed up
temperature accessing speed but introduce no more cpu's computing overhead.
We set AUTO_PERIOD_TIME and TSADCV3_AUTO_PERIOD_HT_TIME the same value,
because normal temperature update speed is also our consern in IPA.
Change-Id: Ie8038a1ae5837ad4aa31b04d1f3ace299f82e396
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Rocky Hao [Fri, 1 Jul 2016 08:10:26 +0000 (16:10 +0800)]
arm64: dtsi: rk3399: optimize ipa parameters
Big cores' power consumption is as much as 8 times of little cores'.
Eas tends to bring tasks to big cores to assure the performance, and
this will make the temperature of soc out of control. To resolve this
issue, we set the power request weight of both little cores and gpu is
10 times of big cores, when temperature control occurs. Meanwhile, we
decrease passive polling interval to make temperature control more
accurate.
Change-Id: Ib01948c6a4f4383f03f1317b2397f07fbdc3487e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Huang, Tao [Wed, 6 Jul 2016 03:04:57 +0000 (11:04 +0800)]
rk: gcc-wrapper.py ignore memcontrol.c:5274
Change-Id: I353e7681cb3b6dc9a9019479d3f2628449b8ee54
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Aaro Koskinen [Sat, 23 Jan 2016 22:36:40 +0000 (00:36 +0200)]
UPSTREAM: ASoC: simple-card: don't fail if sysclk setting is not supported
Commit
e22579713ae1 ("ASoC: simple card: set cpu-dai sysclk
with mclk-fs") added sysclk / SND_SOC_CLOCK_OUT setting, that makes
asoc_simple_card_hw_params fail if the operation is not supported,
although the intention clearly was to ignore ENOTSUPP. Fix it.
The patch fixes audio playback on Kirkwood / OpenRD client,
where the following errors are seen:
asoc-simple-card sound: ASoC: machine hw_params failed: -524
alsa-lib: /alsa-lib-1.0.28/src/pcm/pcm_hw.c:327:(snd_pcm_hw_hw_params) SNDRV_PCM_IOCTL_HW_PARAMS failed (-524): Unknown error 524
Fixes: e22579713ae1 ("ASoC: simple card: set cpu-dai sysclk with mclk-fs")
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit git.kernel.org broonie/sound.git for-next
ee43a1a0cd2a8f33cddfa1323a60b5cfcf865ba0)
Change-Id: I979297fa31aa065338804186ee35de948c63a6a4
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 11:06:08 +0000 (19:06 +0800)]
arm64: rockchip_defconfig: merge android config
enable CONFIG_QUOTA
enable CONFIG_IP_NF_NAT
remove CONFIG_UID_STAT
enable CONFIG_SECURITY_PERF_EVENTS_RESTRICT
Change-Id: I989605e59b77294b70d40a8ab67760eae30ec6e4
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 11:00:15 +0000 (19:00 +0800)]
Revert "Revert "drivers: switch: remove S_IWUSR from dev_attr""
This reverts commit
d18fffdddbf0a395440cd8e8e2578d322c8f0dbd.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 10:58:11 +0000 (18:58 +0800)]
Revert "Revert "switch: switch class and GPIO drivers.""
This reverts commit
c631c9800f20373ddafff77ce19844e78d2d2d9d.
We keep switch driver until HDMI work.
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 10:36:47 +0000 (18:36 +0800)]
Merge tag 'lsk-v4.4-16.06-android'
LSK 16.06 v4.4-android
* tag 'lsk-v4.4-16.06-android': (447 commits)
Linux 4.4.14
netfilter: x_tables: introduce and use xt_copy_counters_from_user
netfilter: x_tables: do compat validation via translate_table
netfilter: x_tables: xt_compat_match_from_user doesn't need a retval
netfilter: ip6_tables: simplify translate_compat_table args
netfilter: ip_tables: simplify translate_compat_table args
netfilter: arp_tables: simplify translate_compat_table args
netfilter: x_tables: don't reject valid target size on some architectures
netfilter: x_tables: validate all offsets and sizes in a rule
netfilter: x_tables: check for bogus target offset
netfilter: x_tables: check standard target size too
netfilter: x_tables: add compat version of xt_check_entry_offsets
netfilter: x_tables: assert minimum target size
netfilter: x_tables: kill check_entry helper
netfilter: x_tables: add and use xt_check_entry_offsets
netfilter: x_tables: validate targets of jumps
netfilter: x_tables: don't move to non-existent next rule
drm/core: Do not preserve framebuffer on rmfb, v4.
crypto: qat - fix adf_ctl_drv.c:undefined reference to adf_init_pf_wq
netfilter: x_tables: fix unconditional helper
...
Huang, Tao [Tue, 5 Jul 2016 10:35:00 +0000 (18:35 +0800)]
Revert "cpufreq: interactive: fix cpufreq object duplicate creatation in sysfs"
This reverts commit
857ad0187f6259e429df117480490c1fc587bc36.
Fixes by LSK commit
b42fb9a7101001d14f996fe2e671f3e7eddded3b
("Revert "cpufreq: interactive: build fixes for 4.4"")
and commit
de5723c8a64e7f7a69662b75d4a789a6e5307dd4
("cpufreq: interactive: drop cpufreq_{get,put}_global_kobject func calls")
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Tue, 5 Jul 2016 10:24:14 +0000 (18:24 +0800)]
Revert "netfilter: xt_qtaguid: fix crash on non-full sks"
This reverts commit
1b96a26c65104ee06eaa46dc23bbe22ebe3bf7d0.
Fixes by LSK commit
202d12a1f733a252ee76f4cc497c9ce86270ebb2
("xt_qtaguid: Fix panic caused by synack processing")
and commit
4158b3431f473aad101da1100a9b241ff8b3cc74
("xt_qtaguid: Fix panic caused by processing non-full socket.")
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Xing Zheng [Fri, 24 Jun 2016 03:14:09 +0000 (11:14 +0800)]
clk: rockchip: rk3399: add 106.5MHz clock configuration for 1440x900
Change-Id: I49331fdbf595b731f64f34beb25e817c502984fe
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Peter Ujfalusi [Mon, 14 Dec 2015 20:47:38 +0000 (22:47 +0200)]
UPSTREAM: dmaengine: core: Skip mask matching when it is not provided to private_candidate
If mask is NULL skip the mask matching against the DMA device capabilities.
Change-Id: Iee44026c8d43493e4e73d8d483545267dc2e08a7
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
commit
26b64256e0c4573f3668ac8329a1266ebb9d6120)
Jeffy Chen [Fri, 1 Jul 2016 08:23:24 +0000 (16:23 +0800)]
ARM: dts: rockchip: enable rockchip-vpu node for evb rk3288
Change-Id: Icfc4e5696b2c0d03f79b5927280c2967c256ef8b
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Jeffy Chen [Fri, 24 Jun 2016 08:44:48 +0000 (16:44 +0800)]
ARM: dts: rockchip: add rockchip-vpu node for rk3288
Change-Id: I1821a9a00a8878e061385d841c5c447496bb9434
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Huang Jiachai [Tue, 5 Jul 2016 03:17:42 +0000 (11:17 +0800)]
video: rockchip: vop: 3399: fix disable_irq() after local_irq_save()
[ 0.654187] BUG: sleeping function called from invalid context at kernel/irq/manage.c:110
[ 0.654905] in_atomic(): 0, irqs_disabled(): 128, pid: 1, name: swapper/0
[ 0.655502] 2 locks held by swapper/0/1:
[ 0.655849] #0: (&dev->mutex){......}, at: [<
ffffff800848005c>] __driver_attach+0x38/0x98
[ 0.656630] #1: (&dev->mutex){......}, at: [<
ffffff800848007c>] __driver_attach+0x58/0x98
[ 0.657395] irq event stamp: 419700
[ 0.657705] hardirqs last enabled at (419699): [<
ffffff80081b3f54>] kfree+0x1d0/0x360
[ 0.658409] hardirqs last disabled at (419700): [<
ffffff800839933c>] rk_fb_register+0x8a4/0xc64
[ 0.659181] softirqs last enabled at (419668): [<
ffffff80080a0d58>] __do_softirq+0x41c/0x53c
[ 0.659937] softirqs last disabled at (419663): [<
ffffff80080a1100>] irq_exit+0x70/0xc4
[ 0.660651] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 4.4.11 #1477
[ 0.661194] Hardware name: Rockchip RK3399 Evaluation Board v1 (Android) (DT)
[ 0.661819] Call trace:
[ 0.662044] [<
ffffff800808873c>] dump_backtrace+0x0/0x1a8
[ 0.662521] [<
ffffff80080888f8>] show_stack+0x14/0x1c
[ 0.662970] [<
ffffff800834fd18>] dump_stack+0xb0/0xec
[ 0.663419] [<
ffffff80080cd3e0>] ___might_sleep+0x1c8/0x1d8
[ 0.663911] [<
ffffff80080cd464>] __might_sleep+0x74/0x84
[ 0.664383] [<
ffffff80080fca98>] synchronize_irq+0x30/0x84
[ 0.664867] [<
ffffff80080fd230>] disable_irq+0x20/0x2c
[ 0.665325] [<
ffffff80083ae3c0>] vop_set_irq_to_cpu+0x20/0x2c
[ 0.665832] [<
ffffff8008396144>] rk_fb_poll_wait_frame_complete+0x38/0xd4
[ 0.666429] [<
ffffff80083993a4>] rk_fb_register+0x90c/0xc64
[ 0.666922] [<
ffffff80083afe44>] vop_probe+0x55c/0x5d4
[ 0.667378] [<
ffffff8008481a20>] platform_drv_probe+0x58/0xa4
[ 0.667885] [<
ffffff800847feb0>] driver_probe_device+0x114/0x288
[ 0.668414] [<
ffffff8008480090>] __driver_attach+0x6c/0x98
[ 0.668899] [<
ffffff800847e628>] bus_for_each_dev+0x64/0x88
[ 0.669391] [<
ffffff8008480298>] driver_attach+0x20/0x28
[ 0.669861] [<
ffffff800847ee14>] bus_add_driver+0xe8/0x1e0
[ 0.670345] [<
ffffff8008480fcc>] driver_register+0x98/0xe4
[ 0.670829] [<
ffffff8008482448>] __platform_driver_register+0x48/0x50
[ 0.671398] [<
ffffff8008db5f74>] vop_module_init+0x18/0x20
[ 0.671885] [<
ffffff8008d8facc>] do_one_initcall+0xf0/0x178
[ 0.672378] [<
ffffff8008d8fc9c>] kernel_init_freeable+0x148/0x1e8
[ 0.672916] [<
ffffff8008a03394>] kernel_init+0x10/0xf8
[ 0.673370] [<
ffffff80080844d0>] ret_from_fork+0x10/0x40
Change-Id: If9a39a6800a4a5dd1749f21125c6ba5204bee901
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
dalon.zhang [Fri, 1 Jul 2016 07:03:59 +0000 (15:03 +0800)]
camsys driver: v0.0x21.3
Change-Id: Ibbea044aade566ee95184cc9f6dfec76752a3b0a
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>
dalon.zhang [Fri, 1 Jul 2016 06:41:41 +0000 (14:41 +0800)]
arm64: dts: rockchip: add isp0 and isp1 config for rk3399
Change-Id: I27d5843f1cf549e145d1950c5c40796c55896bff
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>
Huang Jiachai [Tue, 28 Jun 2016 02:45:25 +0000 (10:45 +0800)]
ARM64: dts: rk3399: android: add memory reserved for logo and enable uboot logo
Change-Id: I284d69c6156d2191b96aed92b98c13386a5f5fd9
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Huang Jiachai [Tue, 28 Jun 2016 03:13:05 +0000 (11:13 +0800)]
video: rockchip: fb: use memory reserved for logo
Change-Id: I19e8b1d0cce5b9d025975ca080f56af3b67c67fb
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Finley Xiao [Tue, 5 Jul 2016 02:17:25 +0000 (10:17 +0800)]
ARM64: dts: rockchip: Rename OPP nodes as opp@<opp-hz>
It would be better to name OPP nodes as opp@<opp-hz> as that will ensure
that multiple DT nodes don't contain the same frequency. Of course we
expect the writer to name the node with its opp-hz frequency and not any
other frequency.
And that will let the compile error out if multiple nodes are using the
same opp-hz frequency.
Change-Id: Icefba93f7a95752e344b5a092a83931bf4d1e682
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Huang, Tao [Mon, 4 Jul 2016 11:11:52 +0000 (19:11 +0800)]
stmmac: do not sleep in atomic context while suspend/resume
Change-Id: Ie5da56ec33b202825e23d3a6fde499a6b831004b
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 4 Jul 2016 10:13:57 +0000 (18:13 +0800)]
Revert "net: stmmac: replace msleep with mdelay between spinlock and spinunlock"
This reverts commit
b664a51a074b560e92e5b22523c5cb54833e7bf2.
Upstream commit
f55d84b07c4e ("stmmac: do not sleep in atomic context for mdio_reset")
fixes this bug.
Change-Id: I7332b3586640667f551c7e83eafff560a4f5a478
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Vincent Palatin [Wed, 1 Jun 2016 15:53:48 +0000 (08:53 -0700)]
UPSTREAM: stmmac: do not sleep in atomic context for mdio_reset
stmmac_mdio_reset() has been updated to use msleep rather udelay
(as some PHY requires a one second delay there).
It called from stmmac_resume() within the spin_lock_irqsave block
atomic context triggering 'scheduling while atomic'.
The stmmac_priv lock usage is not fully documented, but it seems
to protect the access to the MAC registers / DMA structures rather
than the MDIO bus or the PHY (which have separate locking),
so we can push the spin_lock after the stmmac_mdio_reset call.
Change-Id: I0e8a0f7e798f89678d59eefdfd251f217c00787e
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
f55d84b07c4e7340473a25dc82b462607578402c)
chenzhen [Thu, 30 Jun 2016 12:01:01 +0000 (20:01 +0800)]
MALI: midgard: rockchip: add .shutdown of GPU platform_driver
Change-Id: I5af2a464db88b08530b063d90b3a7ce61e26f201
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Thu, 30 Jun 2016 06:54:11 +0000 (14:54 +0800)]
MALI: midgard: rockchip: not to enable clk_gpu when probing
Otherwise, clk_gpu won't be disabled actually in the runtime.
Change-Id: If1e32061cbffc1564a5cf95fbf01aa91c827550d
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
Huang Jiachai [Fri, 1 Jul 2016 07:06:22 +0000 (15:06 +0800)]
video: rockchip: vop: 3399: fix layer index for disp info error
Change-Id: I2c45b204d9fafa01b3b05dbb0378bb1b05bd0642
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
Mark Yao [Mon, 6 Jun 2016 07:27:33 +0000 (15:27 +0800)]
drm/rockchip: vop: correct the source size of uv scale factor setting
When the input color format is YUV, we need to do some external scale
for CBCR. Like,
* In YUV420 data format:
cbcr_xscale = dst_w / src_w * 2;
cbcr_yscale = dst_h / src_h * 2;
* In YUV422 data format:
cbcr_xscale = dst_w / src_w * 2;
cbcr_yscale = dst_h / src_h;
* In YUV444 data format
cbcr_xscale = dst_w / src_w;
cbcr_yscale = dst_h / src_h;
Change-Id: I08678fdcc13a5c4055fcc46f20b378ad7fa16761
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9157353/)
Yakir Yang [Mon, 6 Jun 2016 07:20:17 +0000 (15:20 +0800)]
FROMLIST: drm/rockchip: vop: add uv_vir register field for RK3036 VOP
The WIN0 of RK3036 VOP could support YUV data format, but driver
forget to add the uv_vir register field for it.
Change-Id: I1fd6be43308468cf0718b113be74d2170f71eebe
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/
9157349/)
Arnd Bergmann [Thu, 12 Nov 2015 14:14:23 +0000 (15:14 +0100)]
UPSTREAM: mmc: dw_mmc: use resource_size_t to store physical address
The dw_mmc driver stores the physical address of the MMIO registers
in a pointer, which requires the use of type casts, and is actually
broken if anyone ever has this device on a 32-bit SoC in registers
above 4GB. Gcc warns about this possibility when the driver is built
with ARM LPAE enabled:
mmc/host/dw_mmc.c: In function 'dw_mci_edmac_start_dma':
mmc/host/dw_mmc.c:702:17: warning: cast from pointer to integer of different size
cfg.dst_addr = (dma_addr_t)(host->phy_regs + fifo_offset);
^
mmc/host/dw_mmc-pltfm.c: In function 'dw_mci_pltfm_register':
mmc/host/dw_mmc-pltfm.c:63:19: warning: cast to pointer from integer of different size
host->phy_regs = (void *)(regs->start);
This changes the code to use resource_size_t, which gets rid of the
warning, the bug and the useless casts.
Change-Id: I894c49cede8f0626efb80a9a3181a5385bbb2bcd
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
260b31643691e8a58683a4ccc3bdf7abfd86f54a)
Xing Zheng [Wed, 22 Jun 2016 03:16:53 +0000 (11:16 +0800)]
UPSTREAM: ARM: dts: rockchip: add support rk3229 evb board
Initial release for rk3229 evb board, and turn the GMAC on.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
v4.8-armsoc/dts32 commit
241eff3c198492b2d63e75723b774f2836fee8a3)
Conflicts:
Documentation/devicetree/bindings/arm/rockchip.txt
[zx: RK3399 FPGA conflicts with RK3399 evb board, fix it.]
Change-Id: I95cfe430aa0975a748aa203c1f78ba7fceedf9af
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Ulf Hansson [Wed, 27 Jan 2016 08:10:37 +0000 (09:10 +0100)]
UPSTREAM: PM / Domains: Fix potential deadlock while adding/removing subdomains
We must preserve the same order of how we acquire and release the lock for
genpd, as otherwise we may encounter deadlocks.
The power on phase of a genpd starts by acquiring its lock. Then it walks
the hierarchy of its parent domains to be able to power on these first, as
per design of genpd.
From a locking perspective this means the locks of the parents becomes
acquired after the lock of the subdomain.
Let's fix pm_genpd_add|remove_subdomain() to maintain the same order of
acquiring/releasing the genpd lock as being applied in the power on/off
sequence.
Change-Id: I7f56875b7620eee6247efecd502a3ada4bfa4e24
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
cdb300a041f5df1dfbde1367f95109b6449d1371)
Marek Szyprowski [Wed, 20 Jan 2016 09:13:42 +0000 (10:13 +0100)]
UPSTREAM: PM / domains: fix lockdep issue for all subdomains
During genpd_poweron, genpd->lock is acquired recursively for each
parent (master) domain, which are separate objects. This confuses
lockdep, which considers every operation on genpd->lock as being done on
the same lock class. This leads to the following false positive warning:
=============================================
[ INFO: possible recursive locking detected ]
4.4.0-rc4-xu3s #32 Not tainted
---------------------------------------------
swapper/0/1 is trying to acquire lock:
(&genpd->lock){+.+...}, at: [<
c0361550>] __genpd_poweron+0x64/0x108
but task is already holding lock:
(&genpd->lock){+.+...}, at: [<
c0361af8>] genpd_dev_pm_attach+0x168/0x1b8
other info that might help us debug this:
Possible unsafe locking scenario:
CPU0
----
lock(&genpd->lock);
lock(&genpd->lock);
*** DEADLOCK ***
May be due to missing lock nesting notation
3 locks held by swapper/0/1:
#0: (&dev->mutex){......}, at: [<
c0350910>] __driver_attach+0x48/0x98
#1: (&dev->mutex){......}, at: [<
c0350920>] __driver_attach+0x58/0x98
#2: (&genpd->lock){+.+...}, at: [<
c0361af8>] genpd_dev_pm_attach+0x168/0x1b8
stack backtrace:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc4-xu3s #32
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[<
c0016c98>] (unwind_backtrace) from [<
c00139c4>] (show_stack+0x10/0x14)
[<
c00139c4>] (show_stack) from [<
c0270df0>] (dump_stack+0x84/0xc4)
[<
c0270df0>] (dump_stack) from [<
c00780b8>] (__lock_acquire+0x1f88/0x215c)
[<
c00780b8>] (__lock_acquire) from [<
c007886c>] (lock_acquire+0xa4/0xd0)
[<
c007886c>] (lock_acquire) from [<
c0641f2c>] (mutex_lock_nested+0x70/0x4d4)
[<
c0641f2c>] (mutex_lock_nested) from [<
c0361550>] (__genpd_poweron+0x64/0x108)
[<
c0361550>] (__genpd_poweron) from [<
c0361b00>] (genpd_dev_pm_attach+0x170/0x1b8)
[<
c0361b00>] (genpd_dev_pm_attach) from [<
c03520a8>] (platform_drv_probe+0x2c/0xac)
[<
c03520a8>] (platform_drv_probe) from [<
c03507d4>] (driver_probe_device+0x208/0x2fc)
[<
c03507d4>] (driver_probe_device) from [<
c035095c>] (__driver_attach+0x94/0x98)
[<
c035095c>] (__driver_attach) from [<
c034ec14>] (bus_for_each_dev+0x68/0x9c)
[<
c034ec14>] (bus_for_each_dev) from [<
c034fec8>] (bus_add_driver+0x1a0/0x218)
[<
c034fec8>] (bus_add_driver) from [<
c035115c>] (driver_register+0x78/0xf8)
[<
c035115c>] (driver_register) from [<
c0338488>] (exynos_drm_register_drivers+0x28/0x74)
[<
c0338488>] (exynos_drm_register_drivers) from [<
c0338594>] (exynos_drm_init+0x6c/0xc4)
[<
c0338594>] (exynos_drm_init) from [<
c00097f4>] (do_one_initcall+0x90/0x1dc)
[<
c00097f4>] (do_one_initcall) from [<
c0895e08>] (kernel_init_freeable+0x158/0x1f8)
[<
c0895e08>] (kernel_init_freeable) from [<
c063ecac>] (kernel_init+0x8/0xe8)
[<
c063ecac>] (kernel_init) from [<
c000f7d0>] (ret_from_fork+0x14/0x24)
This patch replaces mutex_lock with mutex_lock_nested() and uses
recursion depth to annotate each genpd->lock operation with separate
lockdep subclass.
Change-Id: I9b94b2a571f906ea9e5300abc6f40db343af49e3
Reported-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit
0106ef5146f9e89e4dc9354f308ecaddb9617310)
projects / firefly-linux-kernel-4.4.55.git / log