ARM: dts: rockchip: add rockchip-vpu node for rk3288
authorJeffy Chen <jeffy.chen@rock-chips.com>
Fri, 24 Jun 2016 08:44:48 +0000 (16:44 +0800)
committerGerrit Code Review <gerrit@rock-chips.com>
Tue, 5 Jul 2016 06:02:42 +0000 (14:02 +0800)
Change-Id: I1821a9a00a8878e061385d841c5c447496bb9434
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
arch/arm/boot/dts/rk3288.dtsi

index a2ce0b55421dfb24e2088fbb790d14b0c9c22c54..1157d6888e539eacaeb76f91c013bfcaad1862ba 100644 (file)
                status = "disabled";
        };
 
+       vpu: video-codec@ff9a0000 {
+               compatible = "rockchip,rk3288-vpu";
+               reg = <0xff9a0000 0x800>;
+               interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                               <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vepu", "vdpu";
+               clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+               clock-names = "aclk", "hclk";
+               power-domains = <&power RK3288_PD_VIDEO>;
+               iommus = <&vpu_mmu>;
+               status = "disabled";
+       };
+
+       vpu_mmu: iommu@ff9a0800 {
+               compatible = "rockchip,iommu";
+               reg = <0xff9a0800 0x100>;
+               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "vpu_mmu";
+               power-domains = <&power RK3288_PD_VIDEO>;
+               #iommu-cells = <0>;
+       };
+
        gic: interrupt-controller@ffc01000 {
                compatible = "arm,gic-400";
                interrupt-controller;