UPSTREAM: usb: dwc3: omap: Don't set POWERPRESENT

TRM [1] recommends that POWERPRESENT bit must not be
set and left at it's default value of 0.

[1] OMAP542x TRM - http://www.ti.com/lit/pdf/swpu249
Section 23.11.4.5.1 Mailbox VBUS/ID Management

"Because PIPE powerpresent has a different meaning in host and in device mode,
and because of the redundancy with the UTMI signals, the controller ORes
together the appropriate PIPE and UTMI inputs to create its internal
VBUS status. For that reason, it is recommended to leave field
USBOTGSS_UTMI_OTG_STATUS[9] POWERPRESENT at its default value (=0), and only to
fill in the USB2 VBUS status fields in the same register."

Change-Id: Ieaf8450992e8f8ebba75558937610f428fd46bd5
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
(cherry picked from commit 9ab330bf4dfd677a19d03359af9bc0e168a2c4b2)

diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index bde69fc3fe77ecbecb5974d6ca9a6a4089e64a77..046bb379120e0ca3ad46eb3a9b4db6388057aaf4 100644 (file)
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -234,8 +234,7 @@ static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
                val &= ~(USBOTGSS_UTMI_OTG_CTRL_IDDIG
                                | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
                                | USBOTGSS_UTMI_OTG_CTRL_SESSEND);
                val &= ~(USBOTGSS_UTMI_OTG_CTRL_IDDIG
                                | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
                                | USBOTGSS_UTMI_OTG_CTRL_SESSEND);

-               val |= USBOTGSS_UTMI_OTG_CTRL_SESSVALID
-                               | USBOTGSS_UTMI_OTG_CTRL_POWERPRESENT;
+               val |= USBOTGSS_UTMI_OTG_CTRL_SESSVALID;

                dwc3_omap_write_utmi_ctrl(omap, val);
                break;
 
                dwc3_omap_write_utmi_ctrl(omap, val);
                break;
 


@@ -244,8 +243,7 @@ static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
                val &= ~USBOTGSS_UTMI_OTG_CTRL_SESSEND;
                val |= USBOTGSS_UTMI_OTG_CTRL_IDDIG
                                | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
                val &= ~USBOTGSS_UTMI_OTG_CTRL_SESSEND;
                val |= USBOTGSS_UTMI_OTG_CTRL_IDDIG
                                | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID

-                               | USBOTGSS_UTMI_OTG_CTRL_SESSVALID
-                               | USBOTGSS_UTMI_OTG_CTRL_POWERPRESENT;
+                               | USBOTGSS_UTMI_OTG_CTRL_SESSVALID;

                dwc3_omap_write_utmi_ctrl(omap, val);
                break;
 
                dwc3_omap_write_utmi_ctrl(omap, val);
                break;
 


@@ -256,8 +254,7 @@ static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
        case OMAP_DWC3_VBUS_OFF:
                val = dwc3_omap_read_utmi_ctrl(omap);
                val &= ~(USBOTGSS_UTMI_OTG_CTRL_SESSVALID
        case OMAP_DWC3_VBUS_OFF:
                val = dwc3_omap_read_utmi_ctrl(omap);
                val &= ~(USBOTGSS_UTMI_OTG_CTRL_SESSVALID

-                               | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID
-                               | USBOTGSS_UTMI_OTG_CTRL_POWERPRESENT);
+                               | USBOTGSS_UTMI_OTG_CTRL_VBUSVALID);

                val |= USBOTGSS_UTMI_OTG_CTRL_SESSEND
                                | USBOTGSS_UTMI_OTG_CTRL_IDDIG;
                dwc3_omap_write_utmi_ctrl(omap, val);
                val |= USBOTGSS_UTMI_OTG_CTRL_SESSEND
                                | USBOTGSS_UTMI_OTG_CTRL_IDDIG;
                dwc3_omap_write_utmi_ctrl(omap, val);