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R600/SI: Expand add for v2i32 and v4i32
2013-06-20 Tom StellardR600/SI: Expand add for v2i32 and v4i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-06-20 Tom StellardR600: Expand v2i32 load/store instead of custom lowering
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-06-15 Tom StellardR600: Add SI load support for v[24]i32 and store for...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-06-14 Tom StellardR600: Use correct encoding for Vertex Fetch instructions...
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2013-06-14 Tom StellardR600: Use EXPORT_RAT_INST_STORE_DWORD for stores on...
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2013-06-14 Tom StellardR600: Factor the instruction encoding out the RAT_WRITE_CACH...
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2013-06-14 Tom StellardR600: Move instruction encoding definitions into a...
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2013-06-13 Tom StellardR600: Don't try to fix reg class when copying IMPLICIT_DEF...
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2013-06-07 Tom StellardR600: Fix calculation of stack offset in AMDGPUFrameLowering
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2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice...
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2013-06-07 Tom StellardR600: Fix the fetch limits for R600 generation GPUs
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2013-06-07 Tom StellardR600: Move Subtarget feature definitions into AMDGPU.td
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2013-06-07 Tom StellardR600: Remove unnecessary include
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2013-06-05 Tom StellardR600: Replace predicate loop with predicate function
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2013-06-05 Tom StellardR600: Make sure to schedule AR register uses and defs...
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2013-06-03 Tom StellardR600/SI: Add support for work item and work group intrinsics
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2013-06-03 Tom StellardR600/SI: Add a calling convention for compute shaders
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2013-06-03 Tom StellardR600/SI: Custom lower i64 sign_extend
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2013-06-03 Tom StellardR600/SI: Adjust some instructions' out register class...
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2013-06-03 Tom StellardR600/SI: Handle REG_SEQUENCE in fitsRegClass()
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2013-06-03 Tom StellardR600/SI: Handle nodes with glue results correctly SITargetLo...
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2013-06-03 Tom StellardR600/SI: Fixup CopyToReg register class in PostprocessISelDAG()
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2013-06-03 Tom StellardR600/SI: Add support for global loads
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2013-06-03 Tom StellardR600/SI: Rework MUBUF store instructions
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2013-05-23 Tom StellardR600: Fix R600ControlFlowFinalizer not considering...
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2013-05-20 Tom StellardR600: Fix rotr.ll on non-asserts builds
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2013-05-20 Tom StellardR600/SI: Use a multiclass for MUBUF_Load_Helper
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2013-05-20 Tom StellardR600/SI: Add a pattern for S_LOAD_DWORDX2_* instructions
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2013-05-20 Tom StellardR600/SI: Add pattern for rotr
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2013-05-20 Tom StellardR600: Swap the legality of rotl and rotr
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2013-05-20 Tom StellardR600/SI: Add patterns for 64-bit shift operations
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2013-05-20 Tom StellardR600/SI: Use the same names for VOP3 operands and encoding...
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2013-05-20 Tom StellardR600/SI: Make fitsRegClass() operands const
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2013-05-17 Tom StellardR600: Fix encoding for R600 family GPUs
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2013-05-17 Tom StellardR600: Pass MCSubtargetInfo reference to R600CodeEmitter
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2013-05-14 Tom StellardR600/SI: Add processor type for Hainan asic
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Remove AMDILPeeopholeOptimizer and replace optimizatio...
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2013-05-10 Tom StellardR600: Expand SUB for v2i32/v4i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Expand MUL for v4i32/v2i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Expand SRA for v4i32/v2i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Expand vselect for v4i32 and v2i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcode
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Handle arbitrary destination type in SITargetLoweri...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add intrinsic for texture image loading
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add pattern for uint_to_fp
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add patterns for integer maxima / minima
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add pattern for AMDGPU.trunc intrinsic
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600: Remove dead code from the CodeEmitter v2
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2013-05-06 Tom StellardR600: Emit config values in register / value pairs
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2013-05-06 Tom StellardR600: Stop emitting the instruction type byte before...
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2013-05-06 Tom StellardR600: Emit ISA for CALL_FS_* instructions
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2013-05-03 Tom StellardR600: Expand vector or, shl, srl, and xor nodes
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2013-05-03 Tom StellardR600: BFI_INT is a vector-only instruction
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2013-05-03 Tom StellardR600: Add pattern for SHA-256 Ma function
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2013-05-03 Tom StellardR600: Clean up comments in Processors.td
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2013-05-02 Tom StellardR600: Use new tablegen syntax for patterns
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2013-05-02 Tom StellardR600/SI: remove nonsense select pattern
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2013-04-29 Tom StellardR600: Use correct CF_END instruction on Northern Island...
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2013-04-29 Tom StellardR600: Fix encoding of CF_END_{EG, R600} instructions
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2013-04-26 Tom StellardR600: Initialize AMDGPUMachineFunction::ShaderType...
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2013-04-24 Tom StellardR600: Initialize BooleanVectorContents
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2013-04-24 Tom StellardR600: Use SHT_PROGBITS for the .AMDGPU.config section
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2013-04-23 Tom StellardWrap.h: Define wrap / unwrap function for ExecutionEngine
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2013-04-19 Tom StellardR600: Add pattern for the BFI_INT instruction
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2013-04-19 Tom StellardR600/SI: Use InstFlag for VOP3 modifier operands
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2013-04-19 Tom StellardR600: Reorganize lit tests and document how they should...
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2013-04-18 Tom StellardC API: Fix coding style
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2013-04-16 Tom StellardC API: Add LLVMTargetMachineEmitToMemoryBuffer()
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2013-04-16 Tom StellardC API: Add LLVMGetBufferSize()
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2013-04-16 Tom StellardC API: Add LLVMGetBufferStart()
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2013-04-16 Tom StellardC API: Add LLVMAddTargetDependentFunctionAttr()
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2013-04-15 Tom StellardR600/SI: Emit config values in register value pairs.
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2013-04-15 Tom StellardR600/SI: Emit configuration value in the .AMDGPU.config...
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2013-04-15 Tom StellardR600: Emit ELF formatted code rather than raw ISA.
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2013-04-05 Tom StellardR600/SI: Add support for buffer stores v2
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2013-04-05 Tom StellardR600/SI: Use same names for corresponding MUBUF operands...
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2013-04-05 Tom StellardR600: Add RV670 processor
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2013-04-05 Tom StellardR600/SI: Add processor types for each SI variant
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2013-04-05 Tom StellardR600/SI: Avoid generating S_MOVs with 64-bit immediates v2
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2013-03-08 Tom StellardR600: Optimize another selectcc case
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2013-03-08 Tom StellardR600: Improve custom lowering of select_cc
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2013-03-08 Tom StellardR600: Change operation action from Custom to Expand...
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2013-03-08 Tom StellardR600: Change operation action from Custom to Expand...
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2013-03-08 Tom StellardR600: Set BooleanContents to ZeroOrNegativeOneBooleanContent
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2013-03-08 Tom StellardLegalizeDAG: Respect the result of TLI.getBooleanContents...
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2013-03-08 Tom StellardDAGCombiner: Use correct value type for checking legality...
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2013-03-04 Tom StellardR600: Clean up datalayout strings so they better match...
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2013-02-21 Tom StellardR600: Fix for Unigine when MachineSched is enabled
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-19 Tom StellardR600: Add AR_X to the R600_TReg_X register class.
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2013-02-19 Tom StellardR600: Mark all members of the TRegMem register class...
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2013-02-19 Tom StellardR600: Fix scheduler crash caused by invalid MachinePointerInfo
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2013-02-19 Tom StellardR600: Fix tracking of implicit defs in the IndirectAddressin...
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2013-02-13 Tom StellardR600: Add support for 128-bit parameters
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2013-02-08 Tom StellardReleaseNotes: Add section for R600 backend
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2013-02-08 Tom StellardR600: Dump the function name when TargetLowering::LowerCall...
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2013-02-08 Tom StellardR600: rework flow creation in the structurizer v2
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2013-02-08 Tom StellardR600: fix loop analyses in the structurizer
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2013-02-08 Tom StellardR600: fix PHI value adding in the structurizer
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2013-02-07 Tom StellardR600/SI: cleanup VGPR encoding
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: Handle VGPR64 destination in copyPhysReg().
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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C/C++ LLVM-based compilers that forbids OOTA behaviors