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R600: Expand SUB for v2i32/v4i32
2013-05-10 Tom StellardR600: Expand SUB for v2i32/v4i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Expand MUL for v4i32/v2i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Expand SRA for v4i32/v2i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-10 Tom StellardR600: Expand vselect for v4i32 and v2i32
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcode
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Handle arbitrary destination type in SITargetLoweri...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add intrinsic for texture image loading
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add pattern for uint_to_fp
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add patterns for integer maxima / minima
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600/SI: Add pattern for AMDGPU.trunc intrinsic
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-05-06 Tom StellardR600: Remove dead code from the CodeEmitter v2
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2013-05-06 Tom StellardR600: Emit config values in register / value pairs
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2013-05-06 Tom StellardR600: Stop emitting the instruction type byte before...
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2013-05-06 Tom StellardR600: Emit ISA for CALL_FS_* instructions
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2013-05-03 Tom StellardR600: Expand vector or, shl, srl, and xor nodes
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2013-05-03 Tom StellardR600: BFI_INT is a vector-only instruction
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2013-05-03 Tom StellardR600: Add pattern for SHA-256 Ma function
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2013-05-03 Tom StellardR600: Clean up comments in Processors.td
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2013-05-02 Tom StellardR600: Use new tablegen syntax for patterns
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2013-05-02 Tom StellardR600/SI: remove nonsense select pattern
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2013-04-29 Tom StellardR600: Use correct CF_END instruction on Northern Island...
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2013-04-29 Tom StellardR600: Fix encoding of CF_END_{EG, R600} instructions
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2013-04-26 Tom StellardR600: Initialize AMDGPUMachineFunction::ShaderType...
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2013-04-24 Tom StellardR600: Initialize BooleanVectorContents
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2013-04-24 Tom StellardR600: Use SHT_PROGBITS for the .AMDGPU.config section
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2013-04-23 Tom StellardWrap.h: Define wrap / unwrap function for ExecutionEngine
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2013-04-19 Tom StellardR600: Add pattern for the BFI_INT instruction
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2013-04-19 Tom StellardR600/SI: Use InstFlag for VOP3 modifier operands
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2013-04-19 Tom StellardR600: Reorganize lit tests and document how they should...
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2013-04-18 Tom StellardC API: Fix coding style
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2013-04-16 Tom StellardC API: Add LLVMTargetMachineEmitToMemoryBuffer()
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2013-04-16 Tom StellardC API: Add LLVMGetBufferSize()
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2013-04-16 Tom StellardC API: Add LLVMGetBufferStart()
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2013-04-16 Tom StellardC API: Add LLVMAddTargetDependentFunctionAttr()
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2013-04-15 Tom StellardR600/SI: Emit config values in register value pairs.
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2013-04-15 Tom StellardR600/SI: Emit configuration value in the .AMDGPU.config...
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2013-04-15 Tom StellardR600: Emit ELF formatted code rather than raw ISA.
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2013-04-05 Tom StellardR600/SI: Add support for buffer stores v2
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2013-04-05 Tom StellardR600/SI: Use same names for corresponding MUBUF operands...
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2013-04-05 Tom StellardR600: Add RV670 processor
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2013-04-05 Tom StellardR600/SI: Add processor types for each SI variant
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2013-04-05 Tom StellardR600/SI: Avoid generating S_MOVs with 64-bit immediates v2
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2013-03-08 Tom StellardR600: Optimize another selectcc case
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2013-03-08 Tom StellardR600: Improve custom lowering of select_cc
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2013-03-08 Tom StellardR600: Change operation action from Custom to Expand...
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2013-03-08 Tom StellardR600: Change operation action from Custom to Expand...
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2013-03-08 Tom StellardR600: Set BooleanContents to ZeroOrNegativeOneBooleanContent
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2013-03-08 Tom StellardLegalizeDAG: Respect the result of TLI.getBooleanContents...
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2013-03-08 Tom StellardDAGCombiner: Use correct value type for checking legality...
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2013-03-04 Tom StellardR600: Clean up datalayout strings so they better match...
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2013-02-21 Tom StellardR600: Fix for Unigine when MachineSched is enabled
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-19 Tom StellardR600: Add AR_X to the R600_TReg_X register class.
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2013-02-19 Tom StellardR600: Mark all members of the TRegMem register class...
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2013-02-19 Tom StellardR600: Fix scheduler crash caused by invalid MachinePointerInfo
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2013-02-19 Tom StellardR600: Fix tracking of implicit defs in the IndirectAddressin...
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2013-02-13 Tom StellardR600: Add support for 128-bit parameters
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2013-02-08 Tom StellardReleaseNotes: Add section for R600 backend
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2013-02-08 Tom StellardR600: Dump the function name when TargetLowering::LowerCall...
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2013-02-08 Tom StellardR600: rework flow creation in the structurizer v2
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2013-02-08 Tom StellardR600: fix loop analyses in the structurizer
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2013-02-08 Tom StellardR600: fix PHI value adding in the structurizer
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2013-02-07 Tom StellardR600/SI: cleanup VGPR encoding
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: Handle VGPR64 destination in copyPhysReg().
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: Add pattern for mul.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: simplify and fix SMRD encoding
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: add proper 64bit immediate support v2
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600: Add an explicit default processor
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2013-02-07 Tom StellardR600/SI: Use proper instructions for array/shadow samplers.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: Make sample intrinsic address parameter type...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600/SI: Add basic support for more integer vector...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600: Consolidate sub register indices.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-07 Tom StellardR600: Add support for SET*_DX10 instructions
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2013-02-07 Tom StellardR600: Add tests for unsupported condition codes.
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2013-02-07 Tom StellardR600: Fix assembly name for SETGT_INT
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2013-02-06 Tom StellardR600: Support for indirect addressing v4
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2013-02-05 Tom StellardR600: Fold remaining CONST_COPY after expand pseudo...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-05 Tom StellardR600: improve inputs/interpolation handling
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-02-05 Tom StellardR600: Add tests for instruction predicates
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2013-02-05 Tom StellardR600: Emit function name in the AsmPrinter
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2013-02-05 Tom StellardR600/SI: Add patterns for fcos and fsin.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-31 Tom StellardR600: Fold clamp, neg, abs
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-31 Tom StellardR600: Consider bitcast when folding const_address node.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-31 Tom StellardR600: Make store_dummy intrinsic more general by passing...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: Add a llvm.R600.store.swizzle intrinsics
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: Simplify stream outputs intrinsic
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: rework handling of the constants
Tom Stellard:
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: Add a CONST_ADDRESS node to model constant buf...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-23 Tom StellardR600: Factorise VTX_WORD0 and VTX_WORD1 in tblgen def
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-21 Tom StellardR600/SI: Use unnormalized coordinates for sampling...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-21 Tom StellardR600/SI: Take target parameter for sample intrinsics.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-21 Tom StellardR600/SI: Derive all sample intrinsics from a single...
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-18 Tom StellardR600: Proper insert S_WAITCNT instructions
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-18 Tom StellardR600: Optimize and cleanup KILL on SI
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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2013-01-02 Tom StellardDAGCombiner: Avoid generating illegal vector INT_TO_FP...
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2012-12-21 Tom StellardR600: Coding style - remove empty spaces from the beginning...
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2012-12-21 Tom StellardR600: Fix MAX_UINT definition
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2012-12-21 Tom StellardR600: Add SHADOWCUBE to TEX_SHADOW pattern
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2012-12-21 Tom StellardR600: Expand vec4 INT <-> FP conversions
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2012-12-19 Tom StellardR600: Add entry in CODE_OWNERS.TXT
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2012-12-19 Tom StellardR600: Remove unecessary VREG alignment.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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C/C++ LLVM-based compilers that forbids OOTA behaviors