Programming Languages Research Group: Git

2012-06-22	Andrew Trick	Use "NoItineraries" for processors with no itineraries.	commit \| commitdiff \| tree
2012-06-22	Andrew Trick	ARM scheduling fix: don't guess at implicit operand...	commit \| commitdiff \| tree
2012-06-22	Andrew Trick	ARM scheduling fix: compute predicated implicit use...	commit \| commitdiff \| tree
2012-06-20	Andrew Trick	Restructure PopulateLoopsDFS::insertIntoLoop.	commit \| commitdiff \| tree
2012-06-20	Andrew Trick	Add "extern template" declarations now that we use...	commit \| commitdiff \| tree
2012-06-20	Andrew Trick	A new algorithm for computing LoopInfo. Temporarily...	commit \| commitdiff \| tree
2012-06-20	Andrew Trick	Move the implementation of LoopInfo into LoopInfoImpl.h.	commit \| commitdiff \| tree
2012-06-15	Andrew Trick	Unit test for LSR kind=Special fix: r158536.	commit \| commitdiff \| tree
2012-06-15	Andrew Trick	LSR: fix expansion of scaled reg in non-address type...	commit \| commitdiff \| tree
2012-06-15	Andrew Trick	LSR fix: "Special" users are just like "Basic" users...	commit \| commitdiff \| tree
2012-06-14	Andrew Trick	misched: disable SSA check pending PR13112.	commit \| commitdiff \| tree
2012-06-13	Andrew Trick	sched: fix latency of memory dependence chain edges...	commit \| commitdiff \| tree
2012-06-13	Andrew Trick	sched: Avoid trivially redundant DAG edges. Take the...	commit \| commitdiff \| tree
2012-06-11	Andrew Trick	misched: When querying RegisterPressureTracker, always...	commit \| commitdiff \| tree
2012-06-11	Andrew Trick	misched: regpressure getMaxPressureDelta, revert accidental...	commit \| commitdiff \| tree
2012-06-09	Andrew Trick	Register pressure: added getPressureAfterInstr.	commit \| commitdiff \| tree
2012-06-08	Andrew Trick	Removing strange "using" declarations form TargetInstrInfo.	commit \| commitdiff \| tree
2012-06-08	Andrew Trick	TargetInstrInfo hooks implemented in codegen should...	commit \| commitdiff \| tree
2012-06-08	Andrew Trick	Sched itinerary fix: Avoid static initializers.	commit \| commitdiff \| tree
2012-06-08	Andrew Trick	Fix Target->Codegen dependence.	commit \| commitdiff \| tree
2012-06-07	Andrew Trick	Continue factoring computeOperandLatency. Use it for...	commit \| commitdiff \| tree
2012-06-07	Andrew Trick	ARM getOperandLatency rewrite.	commit \| commitdiff \| tree
2012-06-07	Andrew Trick	ARM getOperandLatency should return -1 for unknown...	commit \| commitdiff \| tree
2012-06-07	Andrew Trick	Fix ARM getInstrLatency logic to work with the current...	commit \| commitdiff \| tree
2012-06-06	Andrew Trick	Move RegisterClassInfo.h.	commit \| commitdiff \| tree
2012-06-06	Andrew Trick	Move RegisterPressure.h.	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	MachineInstr::eraseFromParent fix for removing bundled...	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	misched: API for minimum vs. expected latency.	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	LoopUnroll: always check for NULL LoopPassManager	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	X86 itinerary properties.	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	ARM itinerary properties.	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	misched: Added MultiIssueItineraries.	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	sdsched: Use the right heuristics when -mcpu is not...	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	misched: Allow disabling scoreboard hazard checking...	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	whitespace	commit \| commitdiff \| tree
2012-06-05	Andrew Trick	misched: comments from code review.	commit \| commitdiff \| tree
2012-05-30	Andrew Trick	SCEV: Handle a corner case reducing AddRecExpr * AddRecExpr	commit \| commitdiff \| tree
2012-05-30	Andrew Trick	Reformat the loop that does AddRecExpr * AddRecExpr...	commit \| commitdiff \| tree
2012-05-25	Andrew Trick	misched: trace formatting	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: Use the same scheduling heuristics with -misched...	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: Trace regpressure.	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: Give each ReadyQ a unique ID	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: Added ScoreboardHazardRecognizer.	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: Release bottom roots in reverse order.	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: rename ReadyQ class	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	misched: copy comments so compareRPDelta is readable...	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	regpressure: Added RegisterPressure::dump	commit \| commitdiff \| tree
2012-05-24	Andrew Trick	regpressure: physreg livein/out fix	commit \| commitdiff \| tree
2012-05-22	Andrew Trick	LSR fix: add a missing phi check during IV hoisting.	commit \| commitdiff \| tree
2012-05-19	Andrew Trick	SCEV: Add MarkPendingLoopPredicates to avoid recursive...	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	comments	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	misched: trace ReadyQ.	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	misched: Added 3-level regpressure back-off.	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	comment	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	regpressure: Fix getMaxUpwardPressureDelta.	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	misched: fix liveness iterators	commit \| commitdiff \| tree
2012-05-17	Andrew Trick	whitespace	commit \| commitdiff \| tree
2012-05-15	Andrew Trick	Add -enable-aa-sched-mi, off by default, for AliasAnalysis...	commit \| commitdiff \| tree
2012-05-14	Andrew Trick	Remove a stale forward declaration.	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	misched: Print machineinstrs with -debug-only=misched	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	misched: tracing register pressure heuristics.	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	misched: Add register pressure backoff to ConvergingScheduler.	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	misched: Release only unscheduled nodes into ReadyQ.	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	misched: Added ReadyQ container wrapper for Top and...	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	misched: Introducing Top and Bottom register pressure...	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	RegPressure: API for speculatively checking instruction...	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	RegPressure: fix array index iteration style.	commit \| commitdiff \| tree
2012-05-10	Andrew Trick	Fix TableGen's RegPressureSet weight normalization...	commit \| commitdiff \| tree
2012-05-08	Andrew Trick	Allow NULL LoopPassManager argument in UnrollLoop....	commit \| commitdiff \| tree
2012-05-03	Andrew Trick	Added TargetRegisterInfo::getAllocatableClass.	commit \| commitdiff \| tree
2012-04-28	Andrew Trick	Reapply 155668: Fix the SD scheduler to avoid gluing...	commit \| commitdiff \| tree
2012-04-27	Andrew Trick	Temporarily revert r155668: Fix the SD scheduler to...	commit \| commitdiff \| tree
2012-04-26	Andrew Trick	Fix the SD scheduler to avoid gluing the same node...	commit \| commitdiff \| tree
2012-04-25	Andrew Trick	typo in declaration from earlier today	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	Fix a naughty header include that breaks "installed...	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	cmake: new file	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	misched: DAG builder must special case earlyclobber	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	misched: try (not too hard) to place debug values where...	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	misched: ignore debug values during scheduling	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	misched: DAG builder support for tracking register...	commit \| commitdiff \| tree
2012-04-24	Andrew Trick	RegisterPressure: A utility for computing register...	commit \| commitdiff \| tree
2012-04-20	Andrew Trick	Added TargetRegisterInfo::getRegPressureSetName.	commit \| commitdiff \| tree
2012-04-20	Andrew Trick	TableGen'd RegPressure: Added getPressureSetName.	commit \| commitdiff \| tree
2012-04-20	Andrew Trick	New and improved comment.	commit \| commitdiff \| tree
2012-04-20	Andrew Trick	SparseSet: Add support for key-derived indexes and...	commit \| commitdiff \| tree
2012-04-20	Andrew Trick	misched: initialize BB	commit \| commitdiff \| tree
2012-04-20	Andrew Trick	Allow converting MachineBasicBlock::iterator to const_iterator.	commit \| commitdiff \| tree
2012-04-19	Andrew Trick	Allow targets to select the default scheduler by name.	commit \| commitdiff \| tree
2012-04-19	Andrew Trick	whitespace	commit \| commitdiff \| tree
2012-04-18	Andrew Trick	loop-reduce: Add an early bailout to catch extremely...	commit \| commitdiff \| tree
2012-04-17	Andrew Trick	Test cases that assume layout should use -disable-code...	commit \| commitdiff \| tree
2012-04-17	Andrew Trick	Typo in an unused field.	commit \| commitdiff \| tree
2012-04-13	Andrew Trick	misched: Added CanHandleTerminators.	commit \| commitdiff \| tree
2012-04-11	Andrew Trick	TableGen's regpressure: emit per-registerclass weight...	commit \| commitdiff \| tree
2012-04-11	Andrew Trick	TableGen'd regpressure: register unit set pruning.	commit \| commitdiff \| tree
2012-04-11	Andrew Trick	Tablegen'd regpressure: emit the weighted pressure...	commit \| commitdiff \| tree
2012-04-11	Andrew Trick	Table-generated register pressure fixes.	commit \| commitdiff \| tree
2012-04-10	Andrew Trick	TableGen/reginfo potential bug: typo from previous...	commit \| commitdiff \| tree
2012-04-10	Andrew Trick	Fix 12513: Loop unrolling breaks with indirect branches.	commit \| commitdiff \| tree
2012-04-10	Andrew Trick	whitespace	commit \| commitdiff \| tree
next

C/C++ LLVM-based compilers that forbids OOTA behaviors

RSS Atom