Fix a couple of Doxygen comment issues pointed out by -Wdocumentation.
[oota-llvm.git] / utils / TableGen / EDEmitter.cpp
2012-09-12 Dmitri GribenkoFix a couple of Doxygen comment issues pointed out...
2012-07-18 Craig TopperMake x86 asm parser to check for xmm vs ymm for index...
2012-06-26 Manman RenX86: add GATHER intrinsics (AVX2) in LLVM
2012-06-11 Jakob Stoklund OlesenWrite llvm-tblgen backends as functions instead of...
2012-04-18 Silviu BarangaFixed decoding for the ARM cdp2 instruction. The restri...
2012-04-03 Craig TopperAdd support for AVX enhanced comparison predicates...
2012-03-28 Jakob Stoklund OlesenSpill DPair registers, not just QPR.
2012-03-06 Jim GrosbachARM more NEON VLD/VST composite physical register refac...
2012-03-06 Jim GrosbachARM refactor more NEON VLD/VST instructions to use...
2012-03-05 Jim GrosbachARM Refactor VLD/VST spaced pair instructions.
2012-03-05 Jim GrosbachARM refactor away a bunch of VLD/VST pseudo instructions.
2012-02-18 Craig TopperAdd X86 assembler and disassembler support for AMD...
2012-02-11 Benjamin KramerMake the EDis tables const.
2011-12-22 Jim GrosbachARM VFP assembly parsing and encoding for VCVT(float...
2011-12-21 Jim GrosbachARM NEON VLD2 assembly parsing for structure to all...
2011-12-07 Jim GrosbachARM: NEON SHLL instruction immediate operand range...
2011-12-02 Jim GrosbachARM NEON VEXT aliases for data type suffices.
2011-11-30 Jim GrosbachARM parsing for VLD1 two register all lanes, no writeback.
2011-11-30 Jim Grosbachllvm_unreachable() is not for user diagnostics....
2011-11-30 Jim GrosbachARM parsing aliases for VLD1 single register all lanes.
2011-11-15 Evan ChengAdd vmov.f32 to materialize f32 immediate splats which...
2011-10-21 Jim GrosbachAssembly parsing for 2-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 4-register variant of VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 3-register variant of VLD1.
2011-10-21 Jim GrosbachARM VLD parsing and encoding.
2011-10-18 Jim GrosbachARM VTBL (one register) assembly parsing and encoding.
2011-10-18 Jim GrosbachARM assembly parsing and encoding for VMOV.i64.
2011-10-18 Jim GrosbachARM assembly parsing and encoding for VMOV/VMVN/VORR...
2011-10-17 Jim GrosbachARM assembly parsing and encoding for VMOV/VMVN/VORR...
2011-10-17 Jim GrosbachARM NEON "vmov.i8" immediate assembly parsing and encoding.
2011-10-12 Jim GrosbachARM parsing and encoding for the <option> form of LDC...
2011-10-10 Jakob Stoklund OlesenEmit full ED initializers even for pseudo-instructions.
2011-10-10 Jakob Stoklund OlesenInsert dummy ED table entries for pseudo-instructions.
2011-10-07 Jim GrosbachARM NEON assembly parsing and encoding for VDUP(scalar).
2011-10-06 Craig TopperFix assembling of xchg %eax, %eax to not use the NOP...
2011-10-01 Peter CollingbourneMove TableGen's parser and entry point into a library
2011-09-26 Owen AndersonASR #32 is not allowed on Thumb2 USAT and SSAT instruct...
2011-09-19 Jim GrosbachThumb2 assembly parsing and encoding for TBB/TBH.
2011-09-09 Jim GrosbachThumb2 assembly parsing and encoding for LDREX/LDREXB...
2011-09-07 Jim GrosbachThumb2 assembly parsing and encoding for LDRBT.
2011-09-07 Jim GrosbachThumb2 parsing and encoding for LDR(immediate).
2011-08-26 Owen AndersonImprove encoding support for BLX with immediat eoperand...
2011-08-24 Jim GrosbachThumb parsing and encoding support for ADD SP instructions.
2011-08-24 Jim GrosbachThumb1 ADD/SUB SP instructions are predicable in Thumb2...
2011-08-09 Owen AndersonCreate a new register class for the set of all GPRs...
2011-08-08 Owen AndersonFix encodings for Thumb ASR and LSR immediate operands...
2011-08-04 Owen AndersonLDCL_POST and STCL_POST need one's-complement offsets...
2011-08-03 Jim GrosbachARM refactoring assembly parsing of memory address...
2011-08-02 Jim GrosbachARM: rename addrmode7 to addr_offset_none.
2011-07-27 Kevin EnderbyFix llvm-mc handing of x86 instructions that take 8...
2011-07-26 Owen AndersonSplit am2offset into register addend and immediate...
2011-07-26 Jim GrosbachARM parsing and encoding for SVC instruction.
2011-07-25 Jim GrosbachARM assembly parsing and encoding for SSAT16 instruction.
2011-07-22 Jim GrosbachARM SSAT instruction 5-bit immediate handling.
2011-07-21 Owen AndersonGet rid of the extraneous GPR operand on so_reg_imm...
2011-07-21 Owen AndersonSplit up the ARM so_reg ComplexPattern into so_reg_reg...
2011-07-20 Jim GrosbachARM PKH shift ammount operand printing tweaks.
2011-07-19 Jim GrosbachARM assembly parsing for MOV (immediate).
2011-07-13 Jim GrosbachRange checking for CDP[2] immediates.
2011-07-13 Jim GrosbachGive the ARM BKPT instruction the right operand type.
2011-07-11 Shantonu SenResynchronize EDInfo.h and EDEmitter.cpp.
2011-07-06 Jim GrosbachDon't require pseudo-instructions to carry encoding...
2011-06-27 Jim GrosbachARM Assembly support for Thumb mov-immediate.
2011-05-31 Bruno Cardoso LopesFix ssat and ssat16 encodings for ARM and Thumb. The...
2011-05-09 Mon P WangFixed MC encoding for index_align for VLD1/VST1 (single...
2011-04-23 Jay FoadRemove unused STL header includes.
2011-03-24 Bruno Cardoso LopesAdd asm parsing support w/ testcases for strex/ldrex...
2011-03-18 Owen AndersonThumb2 PC-relative loads require a fixup rather than...
2011-03-07 Bill WendlingRename the narrow shift right immediate operands to...
2011-03-01 Bill WendlingNarrow right shifts need to encode their immediates...
2011-02-14 Bruno Cardoso LopesFix encoding and add parsing support for the arm/thumb...
2011-02-04 Jason W KimTeach ARM/MC/ELF to handle R_ARM_JUMP24 relocation...
2011-01-26 NAKAMURA TakumiTableGen: PointerLikeRegClass can be accepted to operand.
2011-01-18 Bruno Cardoso LopesAdd support for parsing and encoding ARM's official...
2011-01-13 Owen AndersonAdd support to the ARM MC infrastructure to support...
2011-01-13 Evan ChengModel :upper16: and :lower16: as ARM specific MCTargetE...
2010-12-14 Jim GrosbachAdd support for MC-ized encoding of tLEApcrel and tLEAp...
2010-12-14 Bill WendlingThe tLDR et al instructions were emitting either a...
2010-12-14 Owen AndersonSecond attempt at make Thumb2 LEAs pseudos. This time...
2010-12-13 Owen AndersonRevert r121721, which broke buildbots.
2010-12-13 Owen AndersonMake Thumb2 LEA-like instruction into pseudos, which...
2010-12-13 Owen AndersonIn Thumb2, direct branches can be encoded as either...
2010-12-13 Chris Lattnereliminate the Records global variable, patch by Garriso...
2010-12-10 Jim GrosbachThumb unconditional branch binary encoding. rdar:/...
2010-12-10 Jim GrosbachThumb conditional branch binary encodings. rdar://8745367
2010-12-09 Jim GrosbachThumb needs a few different encoding schemes for branch...
2010-12-09 Bill WendlingThe BLX instruction is encoded differently than the...
2010-12-08 Bill WendlingSupport the "target" encodings for the CB[N]Z instructions.
2010-12-08 Bill WendlingAdd support for loading from a constant pool.
2010-12-06 Jim GrosbachAdd fixup for Thumb1 BL/BLX instructions.
2010-12-01 Jim GrosbachRefactor LEApcrelJT as a pseudo-instructionlowered...
2010-11-30 Owen AndersonSimplify the encoding of reg+/-imm12 values that allow...
2010-11-30 Owen AndersonAdd encoding support for Thumb2 PLD and PLI instructions.
2010-11-30 Bob WilsonFix the encoding of VLD4-dup alignment.
2010-11-18 Jason W KimFix .o emission of ARM movt/movw. MCSymbolRefExpr:...
2010-11-17 Bill WendlingProper encoding for VLDM and VSTM instructions. The...
2010-11-11 Jim GrosbachARM fixup encoding for direct call instructions (BL).
2010-11-03 Jim GrosbachBreak ARM addrmode4 (load/store multiple base address...
2010-11-01 Chris Lattnerfactor the operand list (and related fields/operations...
2010-10-27 Evan ChengShifter ops are not always free. Do not fold them ...
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