ARM parsing for VLD1 two register all lanes, no writeback.
authorJim Grosbach <grosbach@apple.com>
Wed, 30 Nov 2011 18:21:25 +0000 (18:21 +0000)
committerJim Grosbach <grosbach@apple.com>
Wed, 30 Nov 2011 18:21:25 +0000 (18:21 +0000)
commit13af222bab6fdc77d8193eb38e78a9cbed1d9d1f
tree96cebac821b4d37db7b673d1939f7b47b69ee1bf
parent78647434ea861806f0c75ef20afe12f3ff6dbbec
ARM parsing for VLD1 two register all lanes, no writeback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145504 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMExpandPseudoInsts.cpp
lib/Target/ARM/ARMInstrNEON.td
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp
lib/Target/ARM/InstPrinter/ARMInstPrinter.h
utils/TableGen/EDEmitter.cpp