Fixed decoding for the ARM cdp2 instruction. The restriction on the coprocessor numbe...
authorSilviu Baranga <silviu.baranga@arm.com>
Wed, 18 Apr 2012 13:02:55 +0000 (13:02 +0000)
committerSilviu Baranga <silviu.baranga@arm.com>
Wed, 18 Apr 2012 13:02:55 +0000 (13:02 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155000 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrInfo.td
test/MC/Disassembler/ARM/arm-tests.txt
utils/TableGen/EDEmitter.cpp

index 9d005eeb81846d8c25460b3b32393656008c6d39..3361ad472a73d47cb293c47aa02e624a985d71c6 100644 (file)
@@ -908,6 +908,11 @@ def p_imm : Operand<i32> {
   let DecoderMethod = "DecodeCoprocessor";
 }
 
+def pf_imm : Operand<i32> {
+  let PrintMethod = "printPImmediate";
+  let ParserMatchClass = CoprocNumAsmOperand;
+}
+
 def CoprocRegAsmOperand : AsmOperandClass {
   let Name = "CoprocReg";
   let ParserMethod = "parseCoprocRegOperand";
@@ -4306,7 +4311,7 @@ def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
   let Inst{23-20} = opc1;
 }
 
-def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1,
+def CDP2 : ABXI<0b1110, (outs), (ins pf_imm:$cop, imm0_15:$opc1,
                c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
                NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
                [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn,
index ce1446b02b1013d480f71a486231269b2043df10..471076a19bd779e0f98d7fc33198b8203713968b 100644 (file)
 # CHECK: ldmgt sp!, {r9}
 0x00 0x02 0xbd 0xc8
 
+# CHECK: cdp2  p10, #0, c6, c12, c0, #7
+0xe0 0x6a 0x0c 0xfe
+
index 3809a4576a54f263b1f656b86b2462108b595489..fe484ca8cf18358f870f00d96e344c219fffe466 100644 (file)
@@ -594,6 +594,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type,
   IMM("jtblock_operand");
   IMM("nohash_imm");
   IMM("p_imm");
+  IMM("pf_imm");
   IMM("c_imm");
   IMM("coproc_option_imm");
   IMM("imod_op");