[PowerPC] Accept 17-bit signed immediates for addis
[oota-llvm.git] / test / CodeGen /
2013-06-26 Elena DemikhovskyOptimized integer vector multiplication operation by...
2013-06-25 Tom StellardR600: Use new getNamedOperandIdx function generated...
2013-06-25 Aaron WatryR600: Add v2i32 test for vselect
2013-06-25 Aaron WatryR600/SI: Expand xor v2i32/v4i32
2013-06-25 Aaron WatryR600: Add v2i32 test for setcc on evergreen
2013-06-25 Aaron WatryR600/SI: Expand urem of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand udiv v[24]i32 for SI and v2i32 for EG
2013-06-25 Aaron WatryR600/SI: Expand ashr of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand srl of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand shl of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand or of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand mul of v2i32/v4i32 for SI
2013-06-25 Aaron WatryR600/SI: Expand and of v2i32/v4i32 for SI
2013-06-25 Andrew TrickRevert "Temporarily enable MI-Sched on X86."
2013-06-25 Tom StellardR600/SI: Report unaligned memory accesses as legal...
2013-06-25 Tom StellardR600: Add support for i32 loads from the constant addre...
2013-06-25 Tom StellardR600/SI: Add support for v4i32 and v4f32 kernel args
2013-06-25 Tom StellardR600: Fix typo in R600Schedule.td
2013-06-24 NAKAMURA Takumillvm/test/CodeGen/X86: Add explicit -mtriple=x86_64...
2013-06-24 NAKAMURA Takumillvm/test/CodeGen/X86/legalize-shift-64.ll: Add explici...
2013-06-24 Andrew TrickAdd -mcpu to some unit tests that only fail on certain...
2013-06-24 Andrew TrickTemporarily enable MI-Sched on X86.
2013-06-24 Andrew TrickFix tail merging to assign the (more) correct BasicBloc...
2013-06-23 Andrew TrickAdd MI-Sched support for x86 macro fusion.
2013-06-22 Reed KotlerReplace with a shorter test case produced by Doug Gillmore.
2013-06-21 David BlaikieDebugInfo: Don't lose unreferenced non-trivial by-value...
2013-06-21 Michael LiaoAdd '-mcpu=' to prevent breaking on ATOM due to differe...
2013-06-21 Justin Holewinski[NVPTX] Add support for selecting CUDA vs OCL mode...
2013-06-21 Andrew TrickAdd missing REQUIRES: asserts in crash.ll.
2013-06-21 Michael LiaoFix PR16360
2013-06-21 Andrew TrickUpdate physreg live intervals during remat.
2013-06-20 Quentin ColombetARM: Remove a (false) dependency on the memoryoperand...
2013-06-20 Tom StellardR600/SI: Expand sub for v2i32 and v4i32 for SI
2013-06-20 Tom StellardR600/SI: Expand add for v2i32 and v4i32
2013-06-20 Tom StellardR600: Expand v2i32 load/store instead of custom lowering
2013-06-20 David BlaikieDebugInfo: don't use location lists when the location...
2013-06-18 Tim NorthoverAArch64: remove accidental test output file.
2013-06-18 Quentin ColombetDuring SelectionDAG building explicitly set a node...
2013-06-17 Andrew TrickReenable, improve, and add MI-Sched unit tests.
2013-06-17 Vincent LejeuneR600: PV stores Reg id, not index
2013-06-17 Vincent LejeuneR600: Properly set COUNT_3 bit in TEX clause initiating...
2013-06-17 Benjamin KramerSwitch spill weights from a basic loop depth estimation...
2013-06-16 David BlaikieDebug Info: Simplify Frame Index handling in DBG_VALUE...
2013-06-15 David BlaikieDebugInfo: follow up to 184045 to constrain the tests...
2013-06-15 David BlaikieDebugInfo: print DBG_VALUE MachineInstrs with [] for...
2013-06-15 Andrew TrickMachine Model: Add MicroOpBufferSize and resource Buffe...
2013-06-15 David BlaikieDebug Info: Don't print the display name and colon...
2013-06-15 Tom StellardR600: Add SI load support for v[24]i32 and store for...
2013-06-14 Tom StellardR600: Use correct encoding for Vertex Fetch instruction...
2013-06-14 Tom StellardR600: Use EXPORT_RAT_INST_STORE_DWORD for stores on...
2013-06-14 Tim NorthoverMark rematerialized super/sub registers as dead.
2013-06-14 Stephen LinSelectionDAG: Fix incorrect condition checks in some...
2013-06-14 Derek SchuffMake PrologEpilogInserter save/restore all callee saved...
2013-06-14 Benjamin KramerX86: cvtpi2ps is just an SSE instruction with MMX opera...
2013-06-14 JF BastienEnable FastISel on ARM for Linux and NaCl, not MCJIT
2013-06-13 Bill Schmidt[PowerPC] Disable fast-isel for existing -O0 tests...
2013-06-11 Akira Hatanaka[mips] Add an IR transformation pass that optimizes...
2013-06-10 Tim NorthoverX86: Stop LEA64_32r doing unspeakable things to its...
2013-06-10 Justin Holewinski[NVPTX] Remove old CONST_NOT_GEN address space that...
2013-06-10 JF BastienAdd test for ARM FastISel load/store register classes
2013-06-09 Reed KotlerFix a regression I introduced when I expanded the compl...
2013-06-09 Logan ChienRefine the ARM EHABI test cases.
2013-06-09 Logan ChienFix ARM unwind opcode assembler in several cases.
2013-06-09 Elena DemikhovskyRemoved PackedDouble domain from scalar instructions...
2013-06-08 Venkatraman Govind... [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instr...
2013-06-08 Quentin ColombetReapply r183552. This time, use a standard type for...
2013-06-07 Vincent LejeuneR600: Anti dep better handled in tex clause
2013-06-07 Jakob Stoklund OlesenAdd missing zextloadi1 to i64 patterns. PR16721.
2013-06-07 Hal FinkelDisallow i64 div/rem in PPC32 counter loops
2013-06-07 Quentin ColombetRevert commits related to stack warning.
2013-06-07 Quentin ColombetExplicit triple in warn stack size test cases to not...
2013-06-07 Tom StellardR600: Fix calculation of stack offset in AMDGPUFrameLow...
2013-06-07 Tom StellardR600: Fix the fetch limits for R600 generation GPUs
2013-06-07 Quentin ColombetAdd a backend option to warn on a given stack size...
2013-06-07 JF BastienARM FastISel integer sext/zext improvements
2013-06-07 Quentin ColombetTeach AsmPrinter how to print odd constants.
2013-06-07 Roman DivackyFix a typo in asm string of BP* family of instructions...
2013-06-07 Rafael EspindolaSupport OpenBSD's native frame protection conventions.
2013-06-07 Venkatraman Govind... [Sparc]: Use cmp instruction instead of subcc to compar...
2013-06-05 Vincent LejeuneR600: Add a pass that merge Vector Register
2013-06-05 Vincent LejeuneR600: Schedule copy from phys register at beginning...
2013-06-05 Akira Hatanaka[mips] brcond + setgt/setugt instruction selection...
2013-06-05 Michael Liao[PATCH] Fix VGATHER* operand constraints
2013-06-05 Tom StellardR600: Make sure to schedule AR register uses and defs...
2013-06-05 Rafael EspindolaRevert "R600: Add a pass that merge Vector Register"
2013-06-04 Vincent LejeuneR600: Add a pass that merge Vector Register
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4
2013-06-04 Evan ChengCortex-R5 can issue Thumb2 integer division instructions.
2013-06-04 David MajnemerARM: Fix crash in ARM backend inside of ARMConstantIsla...
2013-06-04 Vincent LejeuneR600: Swizzle texture/export instructions
2013-06-04 Vincent LejeuneR600: Add a test for r183108
2013-06-03 Tom StellardR600/SI: Add support for work item and work group intri...
2013-06-03 Tom StellardR600/SI: Add a calling convention for compute shaders
2013-06-03 Tom StellardR600/SI: Custom lower i64 sign_extend
2013-06-03 Tom StellardR600/SI: Add support for global loads
2013-06-03 Vincent LejeuneR600: use capital letter for PV channel
2013-06-03 Venkatraman Govind... Sparc: Add support for indirect branch and blockaddress...
2013-06-03 Venkatraman Govind... Sparc: When storing 0, use %g0 directly in the store...
2013-06-02 Venkatraman Govind... Sparc: Combine add/or/sethi instruction with restore...
2013-06-02 Venkatraman Govind... Sparc: Perform leaf procedure optimization by default
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