Enable FastISel on ARM for Linux and NaCl, not MCJIT
authorJF Bastien <jfb@google.com>
Fri, 14 Jun 2013 02:49:43 +0000 (02:49 +0000)
committerJF Bastien <jfb@google.com>
Fri, 14 Jun 2013 02:49:43 +0000 (02:49 +0000)
commitfe532ad6d6643219669056dc268d63fb29a8d1ee
tree875bd0e9a49501c682c9d8306d0d6e8eae70478f
parent97d37e818153c6c5f844ddebaab26be324dbe41c
Enable FastISel on ARM for Linux and NaCl, not MCJIT

This is a resubmit of r182877, which was reverted because it broken
MCJIT tests on ARM. The patch leaves MCJIT on ARM as it was before: only
enabled for iOS. I've CC'ed people from the original review and revert.

FastISel was only enabled for iOS ARM and Thumb2, this patch enables it
for ARM (not Thumb2) on Linux and NaCl, but not MCJIT.

Thumb2 support needs a bit more work, mainly around register class
restrictions.

The patch punts to SelectionDAG when doing TLS relocation on non-Darwin
targets. I will fix this and other FastISel-to-SelectionDAG failures in
a separate patch.

The patch also forces FastISel to retain frame pointers: iOS always
keeps them for backtracking (so emitted code won't change because of
this), but Linux was getting much worse code that was incorrect when
using big frames (such as test-suite's lencod). I'll also fix this in a
later patch, it will probably require a peephole so that FastISel
doesn't rematerialize frame pointers back-to-back.

The test changes are straightforward, similar to:
  http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20130513/174279.html
They also add a vararg test that got dropped in that change.

I ran all of lnt test-suite on A15 hardware with --optimize-option=-O0
and all the tests pass. All the tests also pass on x86 make check-all. I
also re-ran the check-all tests that failed on ARM, and they all seem to
pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183966 91177308-0d34-0410-b5e6-96231b3b80d8
27 files changed:
lib/ExecutionEngine/TargetSelect.cpp
lib/Target/ARM/ARMFastISel.cpp
test/CodeGen/ARM/fast-isel-GEP-coalesce.ll
test/CodeGen/ARM/fast-isel-binary.ll
test/CodeGen/ARM/fast-isel-br-const.ll
test/CodeGen/ARM/fast-isel-call-multi-reg-return.ll
test/CodeGen/ARM/fast-isel-call.ll
test/CodeGen/ARM/fast-isel-cmp-imm.ll
test/CodeGen/ARM/fast-isel-conversion.ll
test/CodeGen/ARM/fast-isel-crash.ll
test/CodeGen/ARM/fast-isel-crash2.ll
test/CodeGen/ARM/fast-isel-ext.ll
test/CodeGen/ARM/fast-isel-fold.ll
test/CodeGen/ARM/fast-isel-frameaddr.ll
test/CodeGen/ARM/fast-isel-icmp.ll
test/CodeGen/ARM/fast-isel-indirectbr.ll
test/CodeGen/ARM/fast-isel-intrinsic.ll
test/CodeGen/ARM/fast-isel-ldrh-strh-arm.ll
test/CodeGen/ARM/fast-isel-mvn.ll
test/CodeGen/ARM/fast-isel-pic.ll
test/CodeGen/ARM/fast-isel-pred.ll
test/CodeGen/ARM/fast-isel-ret.ll
test/CodeGen/ARM/fast-isel-select.ll
test/CodeGen/ARM/fast-isel-shifter.ll
test/CodeGen/ARM/fast-isel-static.ll
test/CodeGen/ARM/fast-isel-vararg.ll [new file with mode: 0644]
test/CodeGen/ARM/fast-isel.ll