Use the DiagnosticHandler to print diagnostics when reading bitcode.
[oota-llvm.git] / test / CodeGen /
2015-01-09 Simon Pilgrim[X86][SSE] Avoid vector byte shuffles with zero by...
2015-01-09 Daniel Sanders[mips] Add support for accessing $gp as a named register.
2015-01-09 Matthias BraunRegisterCoalescer: Fix removeCopyByCommutingDef with...
2015-01-09 Hal Finkel[PowerPC] Fold [sz]ext with fp_to_int lowering where...
2015-01-08 Hal Finkel[PowerPC] Mark all instructions as non-cheap for Machin...
2015-01-08 Akira Hatanaka[ARM] Fix a bug in constant island pass that was trigge...
2015-01-08 Justin HibbitsAdd saving and restoring of r30 to the prologue and...
2015-01-08 Kristof BeylsFix large stack alignment codegen for ARM and Thumb2...
2015-01-08 Tom StellardR600/SI: Remove SIISelLowering::legalizeOperands()
2015-01-08 Elena DemikhovskyMasked Load/Store - fixed a bug in type legalization.
2015-01-08 Michael KupersteinFix a think-o in the test for r225438.
2015-01-08 Michael Kuperstein[X86] Don't try to generate direct calls to TLS globals
2015-01-08 Craig TopperFix test case I missed in r225432.
2015-01-08 Quentin Colombet[RegAllocGreedy] Introduce a late pass to repair broken...
2015-01-07 Matthias BraunRegisterCoalescer: Fix valuesIdentical() in some subran...
2015-01-07 Philip Reames[GC] improve testing around gc.relocate and fix a test
2015-01-07 Tom StellardR600/SI: Commute instructions to enable more folding...
2015-01-07 Tom StellardR600/SI: Only fold immediates that have one use
2015-01-07 Olivier SallenaveMore FMA folding opportunities.
2015-01-07 Tom StellardR600/SI: Add a V_MOV_B64 pseudo instruction
2015-01-07 Tom StellardR600/SI: Teach SIFoldOperands to split 64-bit constants...
2015-01-07 Philip ReamesIntroduce an example statepoint GC strategy
2015-01-07 David MajnemerX86: Allow the stack probe size to be configurable...
2015-01-07 Ahmed Bougacha[X86] Teach FCOPYSIGN lowering to recognize constant...
2015-01-07 Charlie Turner[ARM] Add missing Tag_DIV_use tests.
2015-01-07 Karthik BhatRevert r225165 and r225169
2015-01-06 Matt ArsenaultR600/SI: Add combine for isinfinite pattern
2015-01-06 Matt ArsenaultR600/SI: Pattern match isinf to v_cmp_class instructions
2015-01-06 Matt ArsenaultR600/SI: Add basic DAG combines for fp_class
2015-01-06 Matt ArsenaultR600/SI: Add class intrinsic
2015-01-06 Rafael EspindolaChange the .ll syntax for comdats and add a syntactic...
2015-01-06 Hal Finkel[PowerPC] Reuse a load operand in int->fp conversions
2015-01-06 Tom StellardR600/SI: Insert s_waitcnt before s_barrier instructions.
2015-01-06 Tom StellardR600/SI: Add a stub GCNTargetMachine
2015-01-06 Andrea Di Biagio[CodeGenPrepare] Improved logic to speculate calls...
2015-01-06 Hal Finkel[PowerPC] Add a regression test for r225251
2015-01-06 Colin LeMahieu[Hexagon] Adding dealloc_return encoding and absolute...
2015-01-06 David MajnemerX86: Don't make illegal GOTTPOFF relocations
2015-01-06 Hal Finkel[PowerPC] Improve int_to_fp(fp_to_int(x)) combining
2015-01-05 Hal Finkel[PowerPC] Fix test to pass on Darwin hosts
2015-01-05 Hal Finkel[PowerPC] Convert a README.txt entry into a better...
2015-01-05 Hal Finkel[PowerPC] Add a test for truncating a shifted load
2015-01-05 Hal Finkel[PowerPC] Add another test for load/store with update
2015-01-05 Hal Finkel[PowerPC] Fold i1 extensions with other ops
2015-01-05 Hal Finkel[PowerPC] Remove zexts after i32 ctlz
2015-01-05 Hal Finkel[PowerPC] Remove zexts after byte-swapping loads
2015-01-05 Ahmed Bougacha[AArch64] Improve codegen of store lane instructions...
2015-01-05 Ahmed Bougacha[AArch64] Improve codegen of store lane 0 instructions...
2015-01-05 Karthik BhatSelect lower fsub,fabs pattern to fabd on AArch64
2015-01-05 Charlie TurnerEmit the build attribute Tag_conformance.
2015-01-05 Karthik BhatSelect lower sub,abs pattern to sabd on AArch64
2015-01-05 Hal Finkel[PowerPC] Enable speculation of cttz/ctlz
2015-01-05 Hal Finkel[PowerPC] Materialize i64 constants using rotation...
2015-01-04 Simon Pilgrim[X86][SSE] Added vector packing test for pr12412
2015-01-04 Simon Pilgrim[X86][SSE] Added vector integer truncation tests -...
2015-01-04 Hal Finkel[PowerPC] Materialize i64 constants using rotation
2015-01-04 Hal Finkel[PowerPC] Materialize i64 constants using bit inversion
2015-01-03 Saleem AbdulrasoolARM: permit tail calls to weak externals on COFF
2015-01-03 Hal Finkel[PowerPC/BlockPlacement] Allow target to provide a...
2015-01-03 Hal Finkel[PowerPC] Use 16-byte alignment for modern cores for...
2015-01-03 Hal Finkel[PowerPC] Add support for the CMPB instruction
2015-01-01 Hal Finkel[PowerPC] Improve instruction selection bit-permuting...
2014-12-31 Alexey SamsonovRevert "merge consecutive stores of extracted vector...
2014-12-30 Peter Collingbournex86_64: Fix calls to __morestack under the large code...
2014-12-30 Colin LeMahieu[Hexagon] Adding reg-reg indexed load forms.
2014-12-29 Philip ReamesSemantic tests for memory invalidation at statepoints
2014-12-29 Colin LeMahieu[Hexagon] Adding post-increment register form stores...
2014-12-29 Rafael EspindolaAdd segmented stack support for DragonFlyBSD.
2014-12-28 NAKAMURA Takumillvm/test/CodeGen/X86/fast-isel-call-bool.ll: Add expli...
2014-12-28 Keno Fischer[X86][ISel] Fix a regression I introduced in r224884
2014-12-28 Michael Kuperstein[X86] Add missing memory variants to AVX false dependen...
2014-12-28 Andrea Di Biagio[CodeGenPrepare] Teach when it is profitable to specula...
2014-12-28 Elena DemikhovskyScalarizer for masked load and store intrinsics.
2014-12-27 David MajnemerPowerPC: CTR shouldn't fire if a TLS call is in the...
2014-12-27 Keno Fischer[FastIsel][X86] Fix invalid register replacement for...
2014-12-26 Rafael EspindolaNo need to run llvm-as. NFC.
2014-12-25 Hal Finkel[PowerPC] [FastISel] i1 constants must be zero extended
2014-12-25 Elena DemikhovskyMasked Load/Store - Changed the order of parameters...
2014-12-24 David MajnemerCodeGen: Error on redefinitions instead of asserting
2014-12-24 David MajnemerCodeGen: Allow aliases to be overridden by variables
2014-12-24 David MajnemerMC: Label definitions are permitted after .set directives
2014-12-23 Hal Finkel[PowerPC] Ensure that the TOC reload directly follows...
2014-12-23 Colin LeMahieu[Hexagon] Reapplying 224775 load words.
2014-12-23 Colin LeMahieuReverting 224775 until mayLoad flag is addressed.
2014-12-23 Colin LeMahieu[Hexagon] Adding word loads.
2014-12-23 Elena DemikhovskyAVX-512: Added FMA instructions, intrinsics an tests...
2014-12-23 Hal Finkel[PowerPC] Don't mark the return-address slot as immutable
2014-12-23 Elena DemikhovskyAVX-512: BLENDM - fixed encoding of the broadcast version
2014-12-23 Michael Kuperstein[DagCombine] Improve DAGCombiner BUILD_VECTOR when...
2014-12-23 Hal Finkel[PowerPC] Don't attempt a 64-bit pow2 division on PPC32
2014-12-23 Ahmed Bougacha[ARM] Don't break alignment when combining base updates...
2014-12-23 Jim GrosbachX86: Don't over-align combined loads.
2014-12-22 Reid KlecknerMake musttail more robust for vector types on x86
2014-12-22 Colin LeMahieu[Hexagon] Adding memb instruction. Fixing whitespace...
2014-12-22 Bruno Cardoso Lopes[x86] Add vector @llvm.ctpop intrinsic custom lowering
2014-12-22 Quentin Colombet[CodeGenPrepare] Handle properly the promotion of opera...
2014-12-22 Elena DemikhovskyAVX-512: Added all forms of BLENDM instructions,
2014-12-22 Karthik BhatLower multiply-negate operation to mneg on AArch64
2014-12-22 Rafael EspindolaConvert a few tests to FileCheck. NFC.
2014-12-21 Matt ArsenaultEnable (sext x) == C --> x == (trunc C) combine
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