R600/SI: Add pattern for rotr
[oota-llvm.git] / test / CodeGen /
2013-05-20 Tom StellardR600/SI: Add pattern for rotr
2013-05-20 Tom StellardR600: Swap the legality of rotl and rotr
2013-05-20 Tom StellardR600/SI: Add patterns for 64-bit shift operations
2013-05-20 Richard Sandiford[SystemZ] Add long branch pass
2013-05-20 Justin Holewinski[NVPTX] Add GenericToNVVM IR converter to better handle...
2013-05-20 Justin Holewinski[NVPTX] Fix i1 kernel parameters and global variables...
2013-05-20 Stepan DyatkovskiyPR15868 fix.
2013-05-20 Jakob Stoklund OlesenAlso expand 64-bit bitcasts.
2013-05-20 Jakob Stoklund OlesenImplement spill and fill of I64Regs.
2013-05-20 Jakob Stoklund OlesenMark i64 SETCC as expand so it is turned into a SELECT_CC.
2013-05-19 Jakob Stoklund OlesenDon't use %g0 to materialize 0 directly.
2013-05-19 Jakob Stoklund OlesenSelect i64 values with %icc conditions.
2013-05-19 Jakob Stoklund OlesenAdd floating point selects on %xcc predicates.
2013-05-19 Jakob Stoklund OlesenImplement SPselectfcc for i64 operands.
2013-05-19 Venkatraman Govind... [Sparc] Rearrange integer registers' allocation order...
2013-05-19 Jakob Stoklund OlesenHandle i64 FrameIndex nodes in SPARC v9 mode.
2013-05-18 Hal FinkelCheck InlineAsm clobbers in PPCCTRLoops
2013-05-18 David MajnemerX86: Bad peephole interaction between adc, MOV32r0
2013-05-17 JF BastienSupport unaligned load/store on more ARM targets
2013-05-17 Vincent LejeuneR600: Lower int_load_input to copyFromReg instead of...
2013-05-17 Vincent LejeuneR600: Use bottom up scheduling algorithm
2013-05-17 Vincent LejeuneR600: Use depth first scheduling algorithm
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4.
2013-05-17 Vincent LejeuneR600: Improve texture handling
2013-05-17 Vincent LejeuneR600: Rename 128 bit registers.
2013-05-17 Tom StellardR600: Fix encoding for R600 family GPUs
2013-05-17 Venkatraman Govind... [Sparc] Implements hasReservedCallFrame and hasFP.
2013-05-17 Benjamin KramerX86: Make shuffle -> shift conversion more aggressive...
2013-05-17 Benjamin KramerFileCheckize test.
2013-05-16 Venkatraman Govind... [Sparc] Prevent instructions that defines or uses ...
2013-05-16 Akira Hatanaka[mips] Improve instruction selection for pattern (store...
2013-05-16 Rafael EspindolaMore test coverage for addFrameMove.
2013-05-16 Hal FinkelFix cpu on test CodeGen/PowerPC/ctrloop-fp64.ll
2013-05-16 Rafael EspindolaMore addFrameMove test coverage.
2013-05-16 Hal FinkelCreate an new preheader in PPCCTRLoops to avoid counter...
2013-05-16 Akira Hatanaka[mips] Test case for r182042. Add comment.
2013-05-16 Rafael EspindolaMore test coverage for addFrameMove.
2013-05-16 Benjamin KramerDAGCombine: Also shrink eq compares where the constant...
2013-05-16 Ulrich Weigand[PowerPC] Use true offset value in "memrix" machine...
2013-05-16 Hal FinkelPPC32 cannot form counter loops around i64 FP conversions
2013-05-16 Rafael EspindolaAdd a triple to the test to try to fix the windows...
2013-05-16 Rafael EspindolaMore addFrameMove test coverage.
2013-05-16 Bill SchmidtUse new CHECK-DAG support to stabilize CodeGen/PowerPC...
2013-05-16 Rafael EspindolaAdd more addFrameMove test coverage.
2013-05-16 Rafael EspindolaAdd more test coverage for addFrameMove.
2013-05-16 Ulrich Weigand[PowerPC] Report true displacement value from getPreInd...
2013-05-16 Rafael EspindolaAdd more addFrameMove test coverage.
2013-05-16 Rafael EspindolaExtend test to check the .cfi instructions.
2013-05-16 Benjamin KramerRelax CHECK-NEXTs a bit to cope with atom's return...
2013-05-16 Rafael EspindolaExtend test for better coverage.
2013-05-16 Reed KotlerPatch number 2 for mips16/32 floating point interoperab...
2013-05-15 David MajnemerSet an explicit triple for this test.
2013-05-15 David MajnemerX86: Remove redundant test instructions
2013-05-15 Hal FinkelImplement PPC counter loops as a late IR-level pass
2013-05-15 Derek SchuffFix miscompile due to StackColoring incorrectly merging...
2013-05-15 Richard Sandiford[SystemZ] Make use of SUBTRACT HALFWORD
2013-05-14 Arnold SchwaighoferARM ISel: Don't create illegal types during LowerMUL
2013-05-14 Jyotsna VermaHexagon: Pass to replace tranfer/copy instructions...
2013-05-14 Eric ChristopherReapply "Subtract isn't commutative, fix this for MMX...
2013-05-14 Eric ChristopherTemporarily revert "Subtract isn't commutative, fix...
2013-05-14 Eric ChristopherSubtract isn't commutative, fix this for MMX psub.
2013-05-14 Jakob Stoklund OlesenRecognize sparc64 as an alias for sparcv9 triples.
2013-05-14 Jyotsna VermaHexagon: Add patterns to generate 'combine' instructions.
2013-05-14 Jyotsna VermaHexagon: ArePredicatesComplement should not restrict...
2013-05-14 Derek SchuffFix ARM FastISel tests, as a first step to enabling...
2013-05-14 Bill SchmidtPPC32: Fix stack collision between FP and CR save areas.
2013-05-14 Jyotsna VermaHexagon: Test case to check if branch probabilities...
2013-05-14 Michel DanzerR600/SI: Add lit test coverage for the remaining patter...
2013-05-14 Reed KotlerThis is the first of three patches which creates stubs...
2013-05-14 Akira HatanakaStackColoring: don't clear an instruction's mem operand...
2013-05-13 Bill SchmidtPPC64: Constant initializers with dynamic relocations...
2013-05-13 Akira Hatanaka[mips] Add option -mno-ldc1-sdc1.
2013-05-13 Lang HamesCorrectly preserve the input chain for potential tailca...
2013-05-13 Hao LiuFix PR15950 A bug in DAG Combiner about undef mask
2013-05-11 Reed KotlerAdd -mtriple=mipsel-linux-gnu to the test so that the...
2013-05-10 Reed KotlerCheckin in of first of several patches to finish implem...
2013-05-10 Jyotsna VermaHexagon: Fix switch cases in HexagonVLIWPacketizer...
2013-05-10 Benjamin KramerDAGCombiner: Generate a correct constant for vector...
2013-05-10 Tom StellardR600: Remove AMDILPeeopholeOptimizer and replace optimi...
2013-05-10 Tom StellardR600: Expand SUB for v2i32/v4i32
2013-05-10 Tom StellardR600: Expand MUL for v4i32/v2i32
2013-05-10 Tom StellardR600: Expand SRA for v4i32/v2i32
2013-05-10 Tom StellardR600: Expand vselect for v4i32 and v2i32
2013-05-09 Owen AndersonTeach SelectionDAG to constant fold all-constant FMA...
2013-05-09 Bill WendlingGenerate a compact unwind encoding in the face of a...
2013-05-09 Jyotsna VermaHexagon: Use relation map for getMatchingCondBranchOpco...
2013-05-09 Richard Osborne[XCore] Fix handling of functions where only the LR...
2013-05-08 Akira Hatanaka[mips] Add instruction selection pattern for (seteq...
2013-05-08 Bill SchmidtFix handling of anonymous aggregate parameters for...
2013-05-08 Michel DanzerR600/SI: Add lit tests for llvm.SI.imageload and llvm...
2013-05-08 Hal FinkelPPCInstrInfo::optimizeCompareInstr should not optimize...
2013-05-08 Nick LewyckyFix a bug in codegenprep where it was losing track...
2013-05-08 David MajnemerDAGCombiner: Simplify inverted bit tests
2013-05-07 Jyotsna VermaHexagon: Fix Small Data support to handle -G 0 correctly.
2013-05-07 Jyotsna VermaReverting r181331.
2013-05-07 Jyotsna VermaHexagon: Fix Small Data support to handle -G 0 correctly.
2013-05-06 Bill WendlingReduce attributes.
2013-05-06 Tom StellardR600: Emit config values in register / value pairs
2013-05-06 Tom StellardR600: Stop emitting the instruction type byte before...
2013-05-06 Tom StellardR600: Emit ISA for CALL_FS_* instructions
next