R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*
[oota-llvm.git] / test / CodeGen / R600 / fdiv.ll
2013-10-10 Tom StellardR600/SI: Use -verify-machineinstrs for most tests
2013-09-04 Vincent LejeuneR600: Non vector only instruction can be scheduled...
2013-08-16 Tom StellardR600: Expand vector float operations for both SI and...
2013-08-01 Tom StellardR600: Add 64-bit float load/store support
2013-07-31 Tom StellardRevert "R600: Non vector only instruction can be schedu...
2013-07-31 Vincent LejeuneR600: Non vector only instruction can be scheduled...
2013-07-23 Tom StellardR600: Use KCache for kernel arguments
2013-06-29 Vincent LejeuneR600: Support schedule and packetization of trans-only...
2013-05-17 Vincent LejeuneR600: Use bottom up scheduling algorithm
2013-05-02 Vincent LejeuneR600: Prettier asmPrint of Alu
2013-04-19 Tom StellardR600: Reorganize lit tests and document how they should...