Target/LLVMBuild: Order components alphabetically.
[oota-llvm.git] / lib / Target /
2011-11-11 Daniel DunbarTarget/LLVMBuild: Order components alphabetically.
2011-11-11 Bruno Cardoso LopesMips MC object code emission improvements:
2011-11-11 Jim GrosbachNuke no longer accurate comment.
2011-11-11 Andrew TrickPreserve MachineMemOperands in ARMLoadStoreOptimizer.
2011-11-11 Jim GrosbachARM allow Q registers in vldm/vstm register lists.
2011-11-11 Dan Baileyallow non-device function calls in PTX when natively...
2011-11-11 Dan Baileyadd rules in tabgen for PTX COPY_ADDRESS of frameindex
2011-11-11 Benjamin KramerRemove the unnecessary dependency on libARMCodeGen...
2011-11-11 Benjamin KramerRemove the unnecessary dependency on libMBlazeCodeGen...
2011-11-11 Craig TopperAdd lowering for AVX2 shift instructions.
2011-11-11 Chad RosierRename variables to avoid confusion. No functionallity...
2011-11-11 Chad RosierAdd support for using immediates with select instructions.
2011-11-11 Akira HatanakaDo not try to detect DAG combine patterns for integer...
2011-11-11 Akira Hatanaka64-bit atomic instructions.
2011-11-11 Akira HatanakaModify LowerFRAMEADDR. Use 64-bit register FP_64 when...
2011-11-11 Akira HatanakaAdd 64-bit versions of LEA_ADDiu and DynAlloc. Modify...
2011-11-11 Akira Hatanaka64-bit versions of jal, jalr and bal.
2011-11-11 Akira HatanakaEmit Mips64's sequence of instructions that set global...
2011-11-11 Akira HatanakaFix printing of MCSymbolRegExpr. Needs three closing...
2011-11-11 Eli FriedmanMake sure to expand SIGN_EXTEND_INREG for NEON vectors...
2011-11-11 Chad RosierWhen loading a value, treat an i1 as an i8.
2011-11-11 Bill WendlingIf we have to reset the calculation of the compact...
2011-11-11 Chad RosierAdd support for using MVN to materialize negative const...
2011-11-11 Daniel DunbarLLVMBuild: Add explicit information on whether targets...
2011-11-10 Jim GrosbachThumb2 ldm/stm updating w/ one register in the list...
2011-11-10 Jim GrosbachARM let processInstruction() tranforms chain.
2011-11-10 Jim GrosbachThumb2 parsing for push/pop w/ hi registers in the...
2011-11-10 Jim GrosbachThumb1 diagnostics for reglist on PUSH/POP fix.
2011-11-10 Jim GrosbachThumb MUL assembly parsing for 3-operand form.
2011-11-10 Daniel Dunbarbuild/MBlazeDisassembler: Some compilers may generate...
2011-11-10 Chad RosierWhen in ARM mode, LDRH/STRH require special handling...
2011-11-10 Jim GrosbachARM .thumb_func directive for quoted symbol names.
2011-11-10 Jim GrosbachARM assembly parsing for LSR/LSL/ROR(immediate).
2011-11-10 Jim GrosbachARM assembly parsing for ASR(immediate).
2011-11-10 Daniel Dunbarbuild: Rename CBackend and CppBackend libraries to...
2011-11-10 Nadav RotemAVX2: Add variable shift from memory.
2011-11-10 Chad RosierFor immediate encodings of icmp, zero or sign extend...
2011-11-10 Daniel Dunbarbuild/Make & CMake: Pass the appropriate --native-targe...
2011-11-10 Daniel Dunbarllvm-build: Add --native-target and --enable-targets...
2011-11-10 Daniel Dunbarllvm-build: Change CBackend and CppBackend to not use...
2011-11-10 Daniel Dunbarllvm-build: Add an explicit component type to represent...
2011-11-10 Jim GrosbachTidy up.
2011-11-09 Jim GrosbachThumb2 assembly parsing STMDB w/ optional .w suffix.
2011-11-09 Eli FriedmanMake sure we correctly unroll conversions between v2f64...
2011-11-09 Chad RosierThe ARM LDRH/STRH instructions use a +/-imm8 encoding...
2011-11-09 Nadav RotemAVX2: Add patterns for variable shift operations
2011-11-09 Devang PatelRemove unnecessary include.
2011-11-09 Nadav RotemAdd AVX2 support for vselect of v32i8
2011-11-09 Craig TopperEnable execution dependency fix pass for YMM registers...
2011-11-09 Craig TopperAdd instruction selection for AVX2 integer comparisons.
2011-11-09 Craig TopperAdd AVX2 instruction lowering for add, sub, and mul.
2011-11-09 Chad RosierAdd support for encoding immediates in icmp and fcmp...
2011-11-09 Evan ChengHide cpu name checking in ARMSubtarget.
2011-11-08 Bruno Cardoso LopesProperly handle Mips MC relocations and lower cpload...
2011-11-08 Evan ChengAdd workaround for Cortex-M3 errata 602117 by replacing...
2011-11-08 Chad RosierARMFastISel doesn't support thumb1. Rename isThumb...
2011-11-08 Lang HamesLower mem-ops to unaligned i32/i16 load/stores on ARM...
2011-11-08 Pete CooperAdded invariant field to the DAG.getLoad method and...
2011-11-08 Bruno Cardoso LopesThis patch handles unaligned loads and stores in Mips...
2011-11-08 NAKAMURA TakumiPPCInstrInfo.cpp: Fix one "unused" warning.
2011-11-08 Eli FriedmanMake sure to mark vector extload's as expand on ARM...
2011-11-08 Evan ChengAdd x86 isel logic and patterns to match movlps from...
2011-11-08 Chad RosierEnable support for returning i1, i8, and i16. Nothing...
2011-11-07 Chad RosierAllow i1 to be promoted to i32 for ARM AAPCS and AAPCS...
2011-11-07 Akira HatanakaVarious Mips64 floating point instruction patterns.
2011-11-07 Akira HatanakaAdd definition of the base class for floating point...
2011-11-07 Akira HatanakaAdd code needed for copying between 64-bit integer...
2011-11-07 Akira HatanakaAdd definitions of 64-bit instructions which move data...
2011-11-07 Benjamin KramerSimplify some uses of utohexstr.
2011-11-07 Benjamin KramerSimplify code. No functionality change.
2011-11-07 Jakob Stoklund OlesenExpand V_SET0 to xorps by default.
2011-11-07 Akira HatanakaAdd definition of 64-bit load upper immediate.
2011-11-07 Akira HatanakaInclude RegSaveAreaSize in the computation of stack...
2011-11-07 Akira HatanakaDefine functions that get or set the size of area on...
2011-11-07 Akira HatanakaUse array_lengthof to compute the number of iterations...
2011-11-07 Akira HatanakaFix patterns for unaligned 32-bit load. DSLL32 or DSRL3...
2011-11-07 Akira HatanakaMake the type of shift amount i32 in order to reduce...
2011-11-07 Akira HatanakaAdd 64-bit to 32-bit trunc pattern.
2011-11-07 Craig TopperAdd AVX2 variable shift instructions and intrinsics.
2011-11-07 Craig TopperAdd AVX2 VPMOVMASK instructions and intrinsics.
2011-11-07 Craig TopperAdd AVX2 VEXTRACTI128 and VINSERTI128 instructions...
2011-11-06 Craig TopperMore AVX2 instructions and their intrinsics.
2011-11-06 Benjamin KramerReplace (Lower|Upper)caseString in favor of StringRef...
2011-11-06 Craig TopperAdd more AVX2 instructions and intrinsics.
2011-11-05 Chad RosierAdd support for passing i1, i8, and i16 call parameters...
2011-11-05 Benjamin KramerAdd more PRI.64 macros for MSVC and use them throughout...
2011-11-05 Chad RosierAllow i1 to be promoted to i32 for ARM APCS calling...
2011-11-04 Eli FriedmanEnhanced vzeroupper insertion pass that avoids insertin...
2011-11-04 Chad RosierCannot create a result register for non-legal types.
2011-11-04 Chad RosierWhen materializing an i32, SExt vs ZExt doesn't matter...
2011-11-04 Chad RosierEnable support for materializing i1, i8, and i16 intege...
2011-11-04 Daniel Dunbarbuild/cmake: Coalesce the configuration time header...
2011-11-04 Daniel Dunbarbuild/cmake: Use tblgen macro directly instead of llvm_...
2011-11-04 Eli FriedmanAdd missing argument for atomic instructions in c+...
2011-11-04 Craig TopperAdd intrinsics for X86 vcvtps2ph and vcvtph2ps instructions
2011-11-04 Evan ChengFix some minor scheduling itinerary bug. It's not expec...
2011-11-04 Chad RosierIndentation.
2011-11-04 Chad RosierAdd fast-isel support for returning i1, i8, and i16.
2011-11-03 Dan GohmanReapply r143206, with fixes. Disallow physical register...
2011-11-03 Dan Baileyfixed global array handling for ptx to use the correct...
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