Add a target-specific branchless method for double-width relational
[oota-llvm.git] / lib / Target /
2011-03-18 Eli FriedmanAdd a target-specific branchless method for double...
2011-03-18 Johnny ChenThe disassembler for Thumb was wrongly adding 4 to...
2011-03-17 Owen AndersonThere are two pseudos in this case that are Thumb mode...
2011-03-17 Johnny ChenIt used to be that t_addrmode_s4 was used for both:
2011-03-17 Richard OsborneAdd XCore intrinsic for setpsc.
2011-03-17 Cameron ZwarichMove more logic into getTypeForExtArgOrReturn.
2011-03-17 Cameron ZwarichRename getTypeForExtendedInteger() to getTypeForExtArgO...
2011-03-17 Nick LewyckyAdd "swi" which is an obsolete mnemonic for "svc".
2011-03-17 Eli FriedmanA couple new README entries.
2011-03-16 Cameron ZwarichThe x86-64 ABI says that a bool is only guaranteed...
2011-03-16 Richard OsborneAdd XCore intrinsics for setclk, setrdy.
2011-03-16 Richard OsborneAdd checkevent intrinsic to check if any resources...
2011-03-15 Johnny ChenThere were two issues fixed:
2011-03-15 Bill WendlingThe VTBL (and VTBX) instructions are rather permissive...
2011-03-15 Bill WendlingSome minor cleanups based on feedback.
2011-03-15 Evan ChengDo not form thumb2 ldrd / strd if the offset is by...
2011-03-15 Richard OsborneDon't indent cases in a switch, no functionality change.
2011-03-15 Richard OsborneOn the XCore the scavenging slot should be closest...
2011-03-15 Richard OsborneAdd XCore intrinsics for getps, setps, setsr and clrsr.
2011-03-15 Justin HolewinskiPTX: Set PTX 2.0 as the minimum supported version
2011-03-15 Duncan SandsAvoid a compiler warning about reg possibly being used...
2011-03-15 Sean CallananEnabled disassembler support for AVX instructions
2011-03-15 Sean CallananX86 table-generator and disassembler support for the AVX
2011-03-15 Johnny ChenFixed an ARM disassembler bug where it does not handle...
2011-03-15 Jim GrosbachClean up ARM tail calls a bit. They're pseudo-instructi...
2011-03-14 Bill WendlingGenerate a VTBL instruction instead of a series of...
2011-03-14 Jim GrosbachRemove some dead patterns.
2011-03-14 Evan ChengIndentation.
2011-03-14 Justin HolewinskiPTX: Emit global arrays with proper sizes
2011-03-14 Justin HolewinskiPTX: Add support for sqrt/sin/cos intrinsics
2011-03-14 Che-Liang Chiouptx: add set.p instruction and related changes to predi...
2011-03-13 Che-Liang Chiouptx: add basic support of predicate execution
2011-03-12 Eric ChristopherSometimes isPredicable lies to us and tells us we don...
2011-03-12 Jim GrosbachAdd FIXME.
2011-03-12 Jim GrosbachPseudo-ize the ARM Darwin *r9 call instruction definiti...
2011-03-11 Jim GrosbachAdd a FIXME.
2011-03-11 Jim GrosbachPseudo-ize the ARM 'B' instruction.
2011-03-11 Jim GrosbachRemove dead code. These ARM instruction definitions...
2011-03-11 Jim GrosbachPseudo-ize VMOVDcc and VMOVScc.
2011-03-11 Jim Grosbach80 columns
2011-03-11 Jim GrosbachProperly pseudo-ize the ARM LDMIA_RET instruction....
2011-03-11 Jim GrosbachARM VDUPfd and VDUPfq can just be patterns. The instruc...
2011-03-11 Jim GrosbachARM VDUPLNfq and VDUPLNfd definitions can just be Pat...
2011-03-11 Jim GrosbachARM VREV64df and VREV64qf can just be patterns. The...
2011-03-11 Jim GrosbachThis FIXME has been fixed.
2011-03-11 Jim GrosbachProperly pseudo-ize ARM MVNCCi.
2011-03-11 Jim GrosbachFix MOVCCi32imm to be have ARM-mode Requires and a...
2011-03-11 Chris Lattnersilence a conditional assignment -Wuninitialized warning.
2011-03-11 Jim GrosbachProperly pseudo-ize ARM MOVCCi and MOVCCi16.
2011-03-11 Eric ChristopherChange the x86 32-bit scheduler to register pressure...
2011-03-10 Jim GrosbachProperly pseudo-ize MOVCCr and MOVCCs.
2011-03-10 Jim GrosbachDMB can just be a pat referencing MCR.
2011-03-10 Jim GrosbachReorganize a bit. No functional change, just moving...
2011-03-10 Jim GrosbachPseudo-instructions are codegenonly by definition.
2011-03-10 Justin HolewinskiPTX: Add preliminary support for floating-point divide...
2011-03-10 Che-Liang Chiouptx: add the rest of special registers of ISA version 2.0
2011-03-10 Stuart HastingsRevert 127359; it broke lencod.
2011-03-10 Evan ChengRe-commit 127368 and 127371. They are exonerated.
2011-03-09 Evan ChengRevert 127368 and 127371 for now.
2011-03-09 Evan ChengChange the definition of TargetRegisterInfo::getCrossCo...
2011-03-09 Benjamin KramerFix a pasto that broke all x86_64-elf targets.
2011-03-09 Stuart HastingsX86 byval copies no longer always_inline. <rdar:/...
2011-03-09 Johnny ChenLLVM combines the offset mode of A8.6.199 A1 & A2 into...
2011-03-09 Bruno Cardoso LopesImprove varags handling, with testcases. Patch by Sasa...
2011-03-09 Jan SjödinAdd createELFObjectTargetWriter method to TargetAsmBack...
2011-03-09 NAKAMURA TakumiTarget/X86: Tweak va_arg for Win64 not to miss taking...
2011-03-09 Bill Wendling* Correct encoding for VSRI.
2011-03-09 Bill WendlingCorrect the encoding for VRSRA and VSRA instructions.
2011-03-08 Bill Wendling* Fix VRSHR and VSHR to have the correct encoding for...
2011-03-08 Benjamin KramerX86: Fix the (saddo/ssub x, 1) -> incl/decl selection...
2011-03-08 Justin HolewinskiPTX: Add intrinsic support for ntid, ctaid, and nctaid...
2011-03-08 Eric ChristopherTurn on list-ilp scheduling by default on x86 and x86...
2011-03-08 Bob WilsonFix a compiler crash where a Glue value had multiple...
2011-03-08 Bob WilsonFix comment typos.
2011-03-07 Bill WendlingRename the narrow shift right immediate operands to...
2011-03-07 Cameron ZwarichMove getRegPressureLimit() from TargetLoweringInfo...
2011-03-05 Anton KorobeynikovARM assembler stuff is crazy: for .setfp positive value...
2011-03-05 Anton KorobeynikovIn Thumb1 mode the constant might be materialized via...
2011-03-05 Anton KorobeynikovImplement frame unwinding information emission for...
2011-03-05 Anton KorobeynikovAdd unwind information emission for thumb stuff
2011-03-05 Anton KorobeynikovHandle MI flags inside Thumb2SizeReduction pass.
2011-03-05 Anton KorobeynikovPreliminary support for ARM frame save directives emiss...
2011-03-05 Anton KorobeynikovSome first rudimentary support for ARM EHABI: print...
2011-03-05 Bob WilsonRemove unused conditional negate operations.
2011-03-05 Che-Liang Chiouptx: add basic intrinsic support
2011-03-05 Andrew TrickIncreased the register pressure limit on x86_64 from...
2011-03-05 Andrew Trickwhitespace
2011-03-04 Bill WendlingInitialize variable.
2011-03-04 Bruno Cardoso LopesImprove div/rem node handling on mips. Patch by Akira...
2011-03-04 Bruno Cardoso LopesExpands register/immediate pairs when the immediate...
2011-03-04 Bruno Cardoso LopesRewrite and simplify o32 vaarg passing, no functional...
2011-03-04 Bruno Cardoso LopesLowers block address. Currently asserts when relocation...
2011-03-04 Bruno Cardoso LopesFix an old copy-n-paste
2011-03-04 Devang PatelDisable ARMGlobalMerge on darwin. The debugger is not...
2011-03-04 Bruno Cardoso LopesExpands FCOS and FSIN nodes when type is f64.
2011-03-04 Bruno Cardoso LopesFixes addc pattern when immediate cannot be represented...
2011-03-04 Bruno Cardoso LopesRemove (hopefully) all trailing whitespaces from the...
2011-03-04 Kalle RaiskilaAllow vector shifts (shl,lshr,ashr) on SPU.
2011-03-04 Kalle RaiskilaAllow load from constant on SPU.
2011-03-04 Eli FriedmanPR9377: Handle x86 str with register operand in a way...
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