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(parent: 7f5de8b) | patch
Allow vector shifts (shl,lshr,ashr) on SPU.
authorKalle Raiskila <kalle.raiskila@nokia.com>
Fri, 4 Mar 2011 13:19:18 +0000 (13:19 +0000)
committerKalle Raiskila <kalle.raiskila@nokia.com>
Fri, 4 Mar 2011 13:19:18 +0000 (13:19 +0000)
commit31cbac1cfea8703098e09e7ff5fa8a626eebc920
tree0b2d9b3125b06540b0a247a67758989e91e03380tree | snapshot
parent7f5de8b4c64280587c2c9a9a0ba4e1ada7e050e5commit | diff
Allow vector shifts (shl,lshr,ashr) on SPU.
There was a previous implementation with patterns that would
have matched e.g.
shl <v4i32> <i32>,
but this is not valid LLVM IR so they never were selected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126998 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/CellSPU/SPUInstrInfo.td diff | blob | history
test/CodeGen/CellSPU/shift_ops.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors