Change the x86 32-bit scheduler to register pressure and fix up the

corresponding testcases back to the previous versions.

Fixes some performance regressions only seen on 32-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127441 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 9ce0046f12b854ab21a416dba6fec89c65e0ec7b..910ed2abd1f93f94157c7c5dbd202543a57dc31a 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -221,7 +221,13 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
 
   // X86 is weird, it always uses i8 for shift amounts and setcc results.
   setBooleanContents(ZeroOrOneBooleanContent);
-  setSchedulingPreference(Sched::ILP);
+    
+  // For 64-bit since we have so many registers use the ILP scheduler, for
+  // 32-bit code use the register pressure specific scheduling.
+  if (Subtarget->is64Bit())
+    setSchedulingPreference(Sched::ILP);
+  else
+    setSchedulingPreference(Sched::RegPressure);
   setStackPointerRegisterToSaveRestore(X86StackPtr);
 
   if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing()) {

diff --git a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
index da93dc21cf2fe3abea925783bd3ceb4684b2fd8f..b0453299669e2680f90528dfe151789109bfa472 100644 (file)
--- a/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
+++ b/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
@@ -1,4 +1,3 @@
-; XFAIL: *
 ; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \
 ; RUN:   not grep {Number of register spills}
 ; END.

diff --git a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
index b106d7f802740a2be821e21ac4708239480053fd..b92c789a30c72374452af860744ac1b06dcef28e 100644 (file)
--- a/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
+++ b/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
@@ -1,6 +1,6 @@
 ; Check that eh_return & unwind_init were properly lowered
 ; RUN: llc < %s | grep %ebp | count 7
-; RUN: llc < %s | grep %edx | count 5
+; RUN: llc < %s | grep %ecx | count 5
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
 target triple = "i386-pc-linux"

diff --git a/test/CodeGen/X86/fold-pcmpeqd-0.ll b/test/CodeGen/X86/fold-pcmpeqd-0.ll
index d6b974d7936370231c6d74d25997795ec90fc1a7..e5be58e1aaa3cec2aa484ae81c78bf194aa08a87 100644 (file)
--- a/test/CodeGen/X86/fold-pcmpeqd-0.ll
+++ b/test/CodeGen/X86/fold-pcmpeqd-0.ll
@@ -1,4 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep pcmpeqd | count 1
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah  | not grep pcmpeqd
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah  | grep orps | grep CPI0_2  | count 2
 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
 
 ; This testcase shouldn't need to spill the -1 value,

diff --git a/test/CodeGen/X86/pr1505b.ll b/test/CodeGen/X86/pr1505b.ll
index 91533e2be610b2eb036820ff52f2bbc1b6e0cbb5..6a08dae51f8ae8d99acfaf33fea1486949208e4a 100644 (file)
--- a/test/CodeGen/X86/pr1505b.ll
+++ b/test/CodeGen/X86/pr1505b.ll
@@ -1,4 +1,3 @@
-; XFAIL: *
 ; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5
 ; RUN: llc < %s -mcpu=i486 | grep fstps | count 2
 ; PR1505

diff --git a/test/CodeGen/X86/v-binop-widen.ll b/test/CodeGen/X86/v-binop-widen.ll
index 4c3bc3b770e8f2feacaa8cf70962dcd1b9830526..3bee7007749cf917779807e64603953871cbb330 100644 (file)
--- a/test/CodeGen/X86/v-binop-widen.ll
+++ b/test/CodeGen/X86/v-binop-widen.ll
@@ -1,7 +1,7 @@
 ; RUN: llc -march=x86 -mattr=+sse < %s | FileCheck %s
-; CHECK: divps
 ; CHECK: divss
 ; CHECK: divps
+; CHECK: divps
 
 %vec = type <9 x float>
 define %vec @vecdiv( %vec %p1, %vec %p2)