[cmake] Teach the llvm-config program to respect LLVM_LIBDIR_SUFFIX.
[oota-llvm.git] / lib / Target /
2014-12-28 Keno Fischer[X86][ISel] Fix a regression I introduced in r224884
2014-12-28 Michael Kuperstein[X86] Add missing memory variants to AVX false dependen...
2014-12-28 Andrea Di Biagio[CodeGenPrepare] Teach when it is profitable to specula...
2014-12-27 Craig Topper[x86] Prevent instruction selection of AVX512 cmp.ps...
2014-12-27 David MajnemerPowerPC: CTR shouldn't fire if a TLS call is in the...
2014-12-27 Aaron BallmanFixing another -Wunused-variable warning, this time...
2014-12-27 Aaron BallmanRemoving a variable that is set but never used, to...
2014-12-27 Craig Topper[x86] Prevent instruction selection of AVX512 cmp.ps...
2014-12-27 Craig Topper[x86] Assert on invalid immediates in the instruction...
2014-12-27 Craig Topper[x86] Prevent llvm.x86.cmp.ps/pd/ss/sd from being selec...
2014-12-27 Keno Fischer[FastIsel][X86] Fix invalid register replacement for...
2014-12-26 Colin LeMahieu[Hexagon] Adding auto-incrementing loads with and witho...
2014-12-26 Colin LeMahieu[Hexagon] Adding locked loads.
2014-12-26 Colin LeMahieu[Hexagon] Adding deallocframe and circular addressing...
2014-12-26 Colin LeMahieu[Hexagon] Adding remaining post-increment instruction...
2014-12-26 Colin LeMahieu[Hexagon] Adding post-increment unsigned byte loads.
2014-12-26 Colin LeMahieu[Hexagon] Adding post-increment signed byte loads with...
2014-12-26 Craig Topper[X86] Add the debug registers DR8-DR15 so we can assemb...
2014-12-26 Craig Topper[X86] Don't fail disassembly if REX.R/REX.B is used...
2014-12-26 Craig TopperTeach disassembler to handle illegal immediates on...
2014-12-26 Craig TopperUse MCPhysReg for table of register encodings.
2014-12-25 Hal Finkel[PowerPC] [FastISel] i1 constants must be zero extended
2014-12-25 Elena DemikhovskyMasked Load/Store - Changed the order of parameters...
2014-12-24 Saleem AbdulrasoolMC: address some comments in deprecation checks
2014-12-24 Craig Topper[X86] Remove the single AdSize indicator and replace...
2014-12-24 Colin LeMahieu[Hexagon] Removing old classes.
2014-12-23 Hal Finkel[PowerPC] Ensure that the TOC reload directly follows...
2014-12-23 Colin LeMahieu[Hexagon] Adding doubleword load.
2014-12-23 Colin LeMahieu[Hexagon] Reapplying 224775 load words.
2014-12-23 Jozef Kolek[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB...
2014-12-23 Colin LeMahieuReverting 224775 until mayLoad flag is addressed.
2014-12-23 Colin LeMahieu[Hexagon] Adding word loads.
2014-12-23 Colin LeMahieu[Hexagon] Adding signed halfword loads.
2014-12-23 Colin LeMahieu[Hexagon] Adding unsigned halfword load.
2014-12-23 Jozef Kolek[mips][microMIPS] Implement LWSP and SWSP instructions
2014-12-23 Elena DemikhovskyAVX-512: Added FMA instructions, intrinsics an tests...
2014-12-23 Hal Finkel[PowerPC] Don't mark the return-address slot as immutable
2014-12-23 Elena DemikhovskyAVX-512: BLENDM - fixed encoding of the broadcast version
2014-12-23 Hal Finkel[PowerPC] Don't attempt a 64-bit pow2 division on PPC32
2014-12-23 Ahmed Bougacha[ARM] Don't break alignment when combining base updates...
2014-12-23 Alexey SamsonovFix UBSan bootstrap: replace shift of negative value...
2014-12-23 Jim GrosbachX86: Don't over-align combined loads.
2014-12-22 Reid KlecknerMake musttail more robust for vector types on x86
2014-12-22 Adrian PrantlThumb1 frame lowering: Mark CFI instructions with the...
2014-12-22 Colin LeMahieu[Hexagon] Adding memb instruction. Fixing whitespace...
2014-12-22 Colin LeMahieu[Hexagon] Adding classes and load unsigned byte instruc...
2014-12-22 Bruno Cardoso Lopes[x86] Add vector @llvm.ctpop intrinsic custom lowering
2014-12-22 Elena DemikhovskyAVX-512: Added all forms of BLENDM instructions,
2014-12-22 Karthik BhatLower multiply-negate operation to mneg on AArch64
2014-12-21 Craig Topper[X86] Add hasSideEffects = 0 to CALLpcrel16. This match...
2014-12-21 Matt ArsenaultEnable (sext x) == C --> x == (trunc C) combine
2014-12-20 Craig Topper[X86] Swap operand order in Intel syntax on a bunch...
2014-12-20 Craig Topper[X86] Swap operand order of imul aliases in Intel synta...
2014-12-20 Craig Topper[X86] Remove '*' from asm strings in far call/jump...
2014-12-20 Craig Topper[X86] Don't swap the order of segment and offset in...
2014-12-20 Saleem AbdulrasoolARM: further improve deprecated diagnosis (LDM)
2014-12-20 Craig Topper[X86] Immediate forms of far call/jump are not valid...
2014-12-20 Eric ChristopherRemove unused variable and initialization.
2014-12-19 Eric ChristopherRemove unused variable, initializer, and accessor.
2014-12-19 Matt ArsenaultR600: Remove outdated comment
2014-12-19 Elena DemikhovskyMasked load and store codegen - fixed 128-bit vectors
2014-12-19 Matt ArsenaultR600/SI: Only form min/max with 1 use.
2014-12-19 Reid KlecknerAdd the ExceptionHandling::MSVC enumeration
2014-12-19 Sanjay PatelModel sqrtss as a binary operation with one source...
2014-12-19 Tom StellardR600/SI: isLegalOperand() shouldn't check constant...
2014-12-19 Tom StellardR600/SI: Make sure non-inline constants aren't folded...
2014-12-19 Colin LeMahieu[Hexagon] Removing old variants of instructions and...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit extraction and table indexing...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit insertion instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding more xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding transfers to and from control registers.
2014-12-19 Colin LeMahieu[Hexagon] Adding doubleregs for control registers....
2014-12-19 Tilmann Scheller[ARM] Remove dead assignment.
2014-12-19 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-18 Colin LeMahieuReverting 224550, was not ready for commit.
2014-12-18 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-18 Jozef Kolek[mips][microMIPS] Fix bugs related to atomic SC/LL...
2014-12-18 Saleem AbdulrasoolARM: fix an off-by-one in the register list access
2014-12-18 Robert Khasanov[AVX512] Enable FP arithmetic lowering for AVX512VL...
2014-12-18 Saleem AbdulrasoolARM: improve instruction validation for thumb mode
2014-12-18 Craig Topper[PowerPC] Use MCPhysReg for tables of registers. Const...
2014-12-18 Craig Topper[X86] Use correct opsize on indirect call and jump...
2014-12-18 Craig Topper[X86] Don't use PS prefix on LDMXCSR/STMXCSR.
2014-12-18 Craig Topper[X86] Remove unnecessary 'In64BitMode' predicate for...
2014-12-18 Eric ChristopherAdd a new string member to the TargetOptions struct...
2014-12-18 Eric ChristopherModel ARM backend ABI selection after the front end...
2014-12-17 Matt ArsenaultR600/SI: Fix f64 inline immediates
2014-12-17 Colin LeMahieu[Hexagon] Reconfiguring register alternate names.
2014-12-17 Will SchmidtEnable the P8Model entry
2014-12-17 Jingyue Wu[NVPTX] Fix bugs related to isSingleValueType
2014-12-17 Saleem AbdulrasoolARM: correct an off-by-one in an assert
2014-12-17 Michael Kuperstein[DAGCombine] Slightly improve lowering of BUILD_VECTOR...
2014-12-17 Vladimir MedicMipsABIInfo class is used in different libraries. Movin...
2014-12-17 Toma Tabacu[mips] Set GCC-compatible MIPS asssembler options befor...
2014-12-17 Quentin Colombet[CodeGenPrepare] Reapply r224351 with a fix for the...
2014-12-17 Reid KlecknerRevert "[CodeGenPrepare] Move sign/zero extensions...
2014-12-16 Colin LeMahieu[Hexagon] Updating doubleword shift usages to new versions.
2014-12-16 Simon Pilgrim[X86][SSE] Vector double -> float conversion memory...
2014-12-16 Colin LeMahieu[Hexagon] Removing old XTYPE/BIT instructions and repla...
next